#
#For detailed view of mmWave Radar configuration structure
#please refer 
#ti\control\mmwavelink\docs\doxygen\html\index.html
#

#
#cascade mode enable
#
cascade_enable=0;
#END

#
#power on master arguments, please modify if needed.
#rlClientCbs_t: crcType 0:16Bit/1:32Bit/2:64Bit, ackTimeout
#
crcType=0;
ackTimeout=1000;
#END

#
#channel config parameters, please modify if needed.
#rlChanCfg_t
#
channelTx=7;
channelRx=15;
cascading=0;
#END

#
#ADC out config parameters, please modify if needed.
#rlAdcOutCfg_t
# adcFormat= {0(Real), 1(Complex), 2(Complex with Image band), 3(Pseudo Real)}
# adcbits = {0(12 Bits), 1(14 Bits), 2(16 Bits)}
#
adcBits=2;
adcFormat=2;
#END

#
#DATA format config parameters, please modify if needed.
#rlDevDataFmtCfg_t
# adcBitsD = {0(12 Bits), 1(14 Bits), 2(16 Bits)}
# adcFmt = {0(Real), 1(Complex), 2(Complex with Image band), 3(Pseudo Real)}
# iqSwapSel = {0 (I sample first), 1 (Q sample first)}
# chInterleave={0 (interleaved), 1 (non interleaved)}
#
rxChanEn=15;
adcBitsD=2;
adcFmt=1;
iqSwapSel=0;
chInterleave=0;
#END

#
#Low power config Paramters, please modify if needed.
#rlLowPowerModeCfg_t
# lpAdcMode = {0 (regular ADC mode), 1 (low power ADC mode)}
#
anaCfg=0;
lpAdcMode=0;
#END

#
#Data Path config parameters, please modify if needed
#rlDevDataPathCfg_t
# intfSel = {0 (CSI2), 1 (LVDS), 2 (SPI)}
# transferFmtPkt0 = {1 (ADC_DATA_ONLY), 6 (CP_ADC_DATA), 9 (ADC_CP_DATA), 54 (CP_ADC_CQ_DATA), b7:6= 00 (Virtual channel number 0), 01 (Virtual channel number 1), 10 (Virtual channel number 2), 11 (Virtual channel number 0)}
# transferFmtPkt1 = {0 (Suppress Packet 1), 14 (CP_CQ_DATA), 11 (CQ_CP_DATA), b7:6= 00 (Virtual channel number 0), 01 (Virtual channel number 1), 10 (Virtual channel number 2), 11 (Virtual channel number 0)}
# cqConfig = {0 (12 bit), 1 (14 bit), 2 (16 bit)}
# cq0TransSize = 32-128
#
intfSel=1;
transferFmtPkt0=1;
transferFmtPkt1=0;
cqConfig=2;
cq0TransSize=132;
cq1TransSize=132;
cq2TransSize=72;
#END

#
#LVDS clock config parameters, please modify if needed
#rlDevDataPathClkCfg_t
# laneClk = {0 (SDR), 1 (DDR)}
# dataRate = {0 (900 Mbps in DDR), 1 (600 Mbps in DDR), 2 (450 Mbps in SDR, DDR), 3 (400 Mbps in DDR), 4 (300 Mbps in SDR, DDR), 5 (225 Mbps in DDR), 6 (150 Mbps in SDR, DDR)}
# 
laneClk=1;
dataRate=1;
#END

#
#SET HSI clock parameters, please modify if needed.
#rlDevHsiClk_t
# hsiClk = {9 (600 Mbps in DDR), ...}
#
hsiClk=9
#END

#
#LANE config parameters, please modify if needed.
#rlDevLaneEnable_t
# laneEn = 0-15 indicating how many lanes are active 
laneEn=15;
#END

#
#LVDS Lane Config parameters, please modify if needed.
#rlDevLvdsLaneCfg_t
# laneFmtMap = {0 (Rx0,Rx1,...), 1 (Rx3,Rx2,...)}
# laneParamCfg = {b0: (0(LSB first), 1(MSB first)), b1: (0(Packet End Pulse Disable), 1(enable)), b2: (0(CRC disabled), 1(CRC enabled))} 
#
laneFmtMap=0;
laneParamCfg=1;
#END

#
#Profile config parameters, please modify if needed.
#rlProfileCfg_t
# startFreqConst = freq/(53.644 Hz), so if freq is ~77 Ghz, then startFreqConst = 1435388860
# idleTimeConst = (idle time) / (10 ns)
# freqSlopeConst = (slope KHz/us)/(48.279 KHz/us)
# txStartTime = (t)/(10 ns)
# 
#
profileId=0;
startFreqConst=1435388860;
idleTimeConst=25000;
adcStartTimeConst=200;
rampEndTime=4000;
txOutPowerBackoffCode=0;
txPhaseShifter=0;
freqSlopeConst=2030;
txStartTime=100;
numAdcSamples=162;
digOutSampleRate=4400;
hpfCornerFreq1=0;
hpfCornerFreq2=0;
rxGain=30;
#END

#
#Chirp #1 Configuration parameters, please modify if needed.
#rlChirpCfg_t
# txEnable = {b0 (ant0), b1 (ant1), b2 (ant2)}
# 
chirpStartIdx=0;
chirpEndIdx=0;
profileIdCPCFG=0;
startFreqVar=0;
freqSlopeVar=0;
idleTimeVar=0;
adcStartTimeVar=0;
txEnable=1;
#END

#
#Frame configuration parameters, please modify if needed.
#rlFrameCfg_t
# triggerSelect = {1,2} for {SW,HW} triggers 
# numAdcSamples = should be the same as the profile config.
# periodicity = t / (5 ns)
#
chirpStartIdxFCF=0;
chirpEndIdxFCF=0;
frameCount=0;
loopCount=32;
numFrames=0;
periodicity=6000000;
triggerDelay=0;
numAdcSamples=162;
triggerSelect=1;
#END

#
#Advance Frame configuration parameters, please modify if needed.
numOfSubFrames=4;
forceProfile=0;
numFrames=100;
loopBackCfg=0;
triggerSelect=1;
frameTrigDelay=0;
#end

#
#4th sub Frame configuration parameters, please modify if needed.
forceProfileIdx=0;
chirpStartIdxAF=0;
numOfChirps=1;
numLoops=8;
burstPeriodicity=5000000;
chirpStartIdxOffset=0;
numOfBurst=1;
numOfBurstLoops=1;
subFramePeriodicity=5000000;
numAdcSamplesAF=256
numChirpsInDataPacket=1
#end

#
#3rd sub Frame configuration parameters, please modify if needed.
forceProfileIdx=0;
chirpStartIdxAF=0;
numOfChirps=1;
numLoops=8;
burstPeriodicity=5000000;
chirpStartIdxOffset=0;
numOfBurst=1;
numOfBurstLoops=1;
subFramePeriodicity=5000000;
numAdcSamplesAF=256
numChirpsInDataPacket=1
#end

#
#2nd sub Frame configuration parameters, please modify if needed.
forceProfileIdx=0;
chirpStartIdxAF=0;
numOfChirps=1;
numLoops=8;
burstPeriodicity=5000000;
chirpStartIdxOffset=0;
numOfBurst=1;
numOfBurstLoops=1;
subFramePeriodicity=5000000;
numAdcSamplesAF=256
numChirpsInDataPacket=1
#end

#
#1st sub Frame configuration parameters, please modify if needed.
forceProfileIdx=0;
chirpStartIdxAF=0;
numOfChirps=1;
numLoops=8;
burstPeriodicity=5000000;
chirpStartIdxOffset=0;
numOfBurst=1;
numOfBurstLoops=1;
subFramePeriodicity=5000000;
numAdcSamplesAF=256
numChirpsInDataPacket=1
#end

#
#Continuous mode config parameters
#startFreqConst=1435384036;
#txOutPowerBackoffCode=0;
#txPhaseShifter=0;
#digOutSampleRate=10000;
#hpfCornerFreq1=0;
#hpfCornerFreq2=0;
contModeRxGain=30;
vcoSelect=2;
#end

#
#Dynamic Chirp Config parameters
chirpSegSel=0;
chirpNR1=167918592
chirpNR2=8388000
chirpNR3=262148080