#ifndef __PANEL_DSI85_H__
#define __PANEL_DSI85_H__

/* Register addresses */

#define DSI85_SOFT_RESET		    0x09
#define DSI85_CORE_PLL			    0x0A
#define DSI85_PLL_DIV			    0x0B
#define DSI85_PLL_EN			    0x0D
#define DSI85_DSI_CFG			    0x10
#define DSI85_DSI_EQ			    0x11
#define DSI85_CHA_DSI_CLK_RNG       0x12
#define DSI85_CHB_DSI_CLK_RNG       0x13
#define DSI85_LVDS_MODE			    0x18
#define DSI85_LVDS_SIGN			    0x19
#define DSI85_LVDS_TERM			    0x1A
#define DSI85_CHA_LINE_LEN_LO		0x20
#define DSI85_CHA_LINE_LEN_HI		0x21
#define DSI85_CHB_LINE_LEN_LO		0x22
#define DSI85_CHB_LINE_LEN_HI		0x23
#define DSI85_CHA_VERT_LINES_LO		0x24
#define DSI85_CHA_VERT_LINES_HI		0x25
#define DSI85_CHB_VERT_LINES_LO		0x26
#define DSI85_CHB_VERT_LINES_HI		0x27
#define DSI85_CHA_SYNC_DELAY_LO		0x28
#define DSI85_CHA_SYNC_DELAY_HI		0x29
#define DSI85_CHB_SYNC_DELAY_LO		0x2A
#define DSI85_CHB_SYNC_DELAY_HI		0x2B
#define DSI85_CHA_HSYNC_WIDTH_LO	0x2C
#define DSI85_CHA_HSYNC_WIDTH_HI	0x2D
#define DSI85_CHB_HSYNC_WIDTH_LO	0x2E
#define DSI85_CHB_HSYNC_WIDTH_HI	0x2F
#define DSI85_CHA_VSYNC_WIDTH_LO	0x30
#define DSI85_CHA_VSYNC_WIDTH_HI	0x31
#define DSI85_CHB_VSYNC_WIDTH_LO	0x32
#define DSI85_CHB_VSYNC_WIDTH_HI	0x33
#define DSI85_CHA_HORZ_BACKPORCH	0x34
#define DSI85_CHB_HORZ_BACKPORCH	0x35
#define DSI85_CHA_VERT_BACKPORCH	0x36
#define DSI85_CHB_VERT_BACKPORCH	0x37
#define DSI85_CHA_HORZ_FRONTPORCH	0x38
#define DSI85_CHB_HORZ_FRONTPORCH	0x39
#define DSI85_CHA_VERT_FRONTPORCH	0x3A
#define DSI85_CHB_VERT_FRONTPORCH	0x3B


#endif