==========================
      ENET LWIP App
==========================
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:0 From 4 To 2
Mdio_open:320
Open MAC port 1
PHY 0 is alive

============= DP83869 FULL DUMP =============
Reg[0x00] (BMCR              ) = 0x1140
Reg[0x01] (BMSR              ) = 0x796D
Reg[0x02] (PHYIDR1           ) = 0x2000
Reg[0x03] (PHYIDR2           ) = 0xA0F1
Reg[0x04] (ANAR              ) = 0x01E1
Reg[0x05] (ANLPAR            ) = 0xCD81
Reg[0x06] (ANER              ) = 0x006F
Reg[0x07] (ANNPTR            ) = 0x2001
Reg[0x08] (ANNLPTR           ) = 0x6001
Reg[0x09] (GEN_CFG1          ) = 0x0200
Reg[0x0A] (GEN_STATUS1       ) = 0x0000
Reg[0x0B] (RESB              ) = 0x0000
Reg[0x0C] (RESC              ) = 0x0000
Reg[0x0D] (REGCR             ) = 0x401F
Reg[0x0E] (ADDAR             ) = 0x0000
Reg[0x0F] (1KSCR             ) = 0xF000
Reg[0x10] (PHY_CONTROL       ) = 0x5048
Reg[0x11] (PHY_STATUS        ) = 0x7C02
Reg[0x12] (INT_MASK          ) = 0x0000
Reg[0x13] (INT_STATUS        ) = 0x1C40
Reg[0x14] (GEN_CFG2          ) = 0x29C7
Reg[0x15] (RX_ERR_CNT        ) = 0x0000
Reg[0x16] (BIST_CONTROL      ) = 0x0000

------ C22 EXTENDED REGISTERS ------
Reg[0x17] (STATUS2                       ) = 0x0040
Reg[0x18] (LEDS_CFG1                     ) = 0x5160
Reg[0x19] (LEDS_CFG2                     ) = 0x4444
Reg[0x1A] (LEDS_CFG3                     ) = 0x0002
Reg[0x1E] (GEN_CFG4                      ) = 0x0212
Reg[0x1F] (GEN_CTRL                      ) = 0x0000
Reg[0x25] (ANALOG_TEST_CTRL              ) = 0xCD81
Reg[0x2C] (GEN_CFG_ENH_AMIX              ) = 0x0000
Reg[0x2D] (GEN_CFG_FLD                   ) = 0x401F
Reg[0x2E] (GEN_CFG_FLD_THR               ) = 0x0000
Reg[0x31] (GEN_CFG3                      ) = 0x6C02
Reg[0x32] (RGMII_CTRL                    ) = 0x0000
Reg[0x33] (RGMII_CTRL2                   ) = 0x0000
Reg[0x37] (SGMII_AUTO_NEG_STATUS         ) = 0x0040
Reg[0x39] (PRBS_TX_CHK_CTRL              ) = 0x4444
Reg[0x3A] (PRBS_TX_CHK_BYTE_CNT          ) = 0x0002
Reg[0x43] (G_100BT_REG0                  ) = 0xA0F1
Reg[0x4F] (SERDES_SYNC_STS               ) = 0xF000
Reg[0x55] (G_1000BT_PMA_STATUS           ) = 0x0000
Reg[0x6E] (STRAP_STS                     ) = 0x0000
Reg[0x71] (DBG_PRBS_BYTE_CNT             ) = 0x6C02
Reg[0x72] (DBG_PRBS_ERR_CNT              ) = 0x0000
Reg[0x7B] (DBG_PKT_LEN_PRBS              ) = 0x0000
Reg[0x7C] (DBG_IPG_LEN                   ) = 0x0000

------ CLAUSE45 EXTENDED REGISTERS ------
Reg[0x0086] (ANA_RGMII_DLL_CTRL            ) = 0x0377
Reg[0x00A0] (ANA_LD_TXG_FINE_GAINSEL_AB    ) = 0x0806
Reg[0x00A1] (ANA_LD_TXG_FINE_GAINSEL_CD    ) = 0x0808
Reg[0x00A2] (ANA_LD_FILTER_TUNE_AB         ) = 0x1010
Reg[0x00A3] (ANA_LD_FILTER_TUNE_CD         ) = 0x1010
Reg[0x00C6] (ANA_PLL_PROG                  ) = 0x0000
Reg[0x00D6] (SGMII_TESTMODE                ) = 0x0000
Reg[0x00E9] (DSP_HYBRID_CFG2               ) = 0x9F22
Reg[0x00FE] (LOOPCR                        ) = 0xE721
Reg[0x0134] (RXF_CFG                       ) = 0x1000
Reg[0x0135] (RXF_STATUS                    ) = 0x0000

============= END OF DUMP =============
[0]: Starting lwIP, local interface IP is 192.168.1.200
[LWIPIF_LWIP] NETIF INIT SUCCESS
Host MAC address-0 : 70:ff:76:1d:ec:f2
[LWIPIF_LWIP] Enet has been started successfully
[0]status_callback==UP, local interface IP is 192.168.1.200
UDP server listening on port 5001
[0] link_callback==UP
      8. 32s : CPU load =   7.46 %
     13. 32s : CPU load =   1.68 %