
| Application | |
| Name | D9020DPHC MIPI D-PHY Test |
| Version | 3.90.0.0 |
| Device Description | |
| High Speed Data Rate(Mbps) | 1430 |
| CTS Version | v1.2 |
| ZID | 100 ohm |
| CLoad | 50pF |
| Fixture Setup | Auto Load Switching |
| Test Session Details | |
| Infiniium SW Version | 06.50.00906 |
| Infiniium Model Number | DSOV084A |
| Infiniium Serial Number | MY57220101 |
| Debug Mode Used | No |
| Compliance Limits | MIPI D-PHY Test Limit v1.2 (official) |
| Probe (Channel 1) | Model: 1169B Serial: US55390644 Head: N5425A/B Atten: Calibrated (19 OCT 2022 17:27:05), Using Cal Atten (3.2276E+00) Skew: Calibrated (19 OCT 2022 17:27:23), Using Cal Skew |
| Probe (Channel 2) | Model: 1169B Serial: US55390676 Head: N5425A/B Atten: Calibrated (19 OCT 2022 17:28:31), Using Cal Atten (3.2304E+00) Skew: Calibrated (19 OCT 2022 17:28:45), Using Cal Skew |
| Probe (Channel 3) | Model: 1169B Serial: US55390699 Head: N5425A/B Atten: Calibrated (19 OCT 2022 17:30:14), Using Cal Atten (3.2298E+00) Skew: Calibrated (19 OCT 2022 17:30:26), Using Cal Skew |
| Probe (Channel 4) | Model: 1169B Serial: US55390726 Head: N5425A/B Atten: Calibrated (19 OCT 2022 17:31:24), Using Cal Atten (3.1287E+00) Skew: Calibrated (19 OCT 2022 17:31:35), Using Cal Skew |
| Last Test Date | 2022-10-20 19:06:55 UTC +08:00 |
| Test Statistics | |
| Failed | 8 |
| Passed | 24 |
| Total | 32 |
| Margin Thresholds | |
| Warning | < 2 % |
| Critical | < 0 % |
1.3.7 HS Data TX Static Common Mode Voltage(Vcmtx)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.3.7)
1.3.8 HS Data TX Vcmtx Mismatch
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.3.8)
1.3.10 HS Data TX Common-Level Variations Above 450MHz (VCMTX(HF))
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.3.10)
1.3.9 HS Data TX Common-Level Variations Between 50-450MHz (VCMTX(LF))
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.3.9)
1.3.4 HS Data TX Differential Voltage(VOD0 Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.3.4)
1.3.4 HS Data TX Differential Voltage(VOD1 Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.3.4)
1.3.5 HS Data TX Differential Voltage Mismatch (Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.3.5)
1.3.6 HS Data TX Single Ended Output High Voltage(VOHHS Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.3.6)

1.4.17 HS Clock Instantaneous (UIinst)(Max)
Reference:
D-PHY Specification v1.2 Section 10.1 Table 29, CTS v1.2(Test 1.4.17)
1.3.3 HS Entry: DATA TX THS-PREPARE+THS-ZERO
Reference:
D-PHY Specification v1.2 Section 6.9 Table 14, CTS v1.2(Test 1.3.3)
1.3.11 HS Data TX 20%-80% Rise Time (tR)[Burst Data]
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.3.11)
1.3.12 HS Data TX 80%-20% Fall Time (tF)[Burst Data]
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.3.12)
1.4.9 HS Clock TX Common-Level Variations Between 50-450MHz (VCMTX(LF))
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.4.9)
1.4.7 HS Clock TX Static Common Mode Voltage(Vcmtx)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.4.7)
1.4.8 HS Clock TX Vcmtx Mismatch
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.4.8)
1.4.10 HS Clock TX Common-Level Variations Above 450MHz (VCMTX(HF))
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.4.10)
1.4.4 HS Clock TX Differential Voltage(VOD0 Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.4.4)
1.4.4 HS Clock TX Differential Voltage(VOD1 Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.4.4)
1.4.5 HS Clock TX Differential Voltage Mismatch (Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.4.5)
1.4.6 HS Clock TX Single Ended Output High Voltage(VOHHS Pulse)
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 19, CTS v1.2(Test 1.4.6)

1.4.11 HS Clock TX 20%-80% Rise Time (tR)[Continuous Clock, Burst Data]
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.4.11)
1.4.12 HS Clock TX 80%-20% Fall Time (tF)[Continuous Clock, Burst Data]
Reference:
D-PHY Specification v1.2 Section 9.1.1 Table 20, CTS v1.2(Test 1.4.12)
1.4.17 HS Clock Instantaneous (UIinst)(Min)
Reference:
D-PHY Specification v1.2 Section 10.1 Table 29, CTS v1.2(Test 1.4.17)
1.4.18 Clock Lane HS Clock Delta UI (UI variation)
Reference:
D-PHY Specification v1.2 Section 10.1 Table 29, CTS v1.2(Test 1.4.18)
1.3.1 HS Entry: DATA TLPX
Reference:
D-PHY Specification v1.2 Section 6.9 Table 14, CTS v1.2(Test 1.3.1)
1.3.2 HS Entry: DATA TX THS-PREPARE
Reference:
D-PHY Specification v1.2 Section 6.9 Table 14, CTS v1.2(Test 1.3.2)
1.3.13 HS Exit: DATA TX THS-TRAIL
Reference:
D-PHY Specification v1.2 Section 6.9 Table 14, CTS v1.2(Test 1.3.13)
1.3.14 HS Exit: DATA TX TREOT
Reference:
D-PHY Specification v1.2 Section 9.1.2 Table 22, CTS v1.2(Test 1.3.14)
1.3.15 HS Exit: DATA TX TEOT
Reference:
D-PHY Specification v1.2 Section 6.9 Table 14, CTS v1.2(Test 1.3.15)
1.3.16 HS Exit: DATA TX THS-EXIT
Reference:
D-PHY Specification v1.2 Section 6.9 Table 14, CTS v1.2(Test 1.3.16)
1.5.4 Data-to-Clock Skew (TSKEW(TX))(Max,Min)
Reference:
D-PHY Specification v1.2 Section 10.2.1 Table 30, CTS v1.2(Test 1.5.4)
1.5.4 Data-to-Clock Skew (TSKEW(TX))(Mean)
Reference:
D-PHY Specification v1.2 Section 10.2.1 Table 30, CTS v1.2(Test 1.5.4)