* THS4541 ***************************************************************************** * (C) Copyright 2018 Texas Instruments Incorporated. All rights reserved. ***************************************************************************** ** This model is designed as an aid for customers of Texas Instruments. ** TI and its licensors and suppliers make no warranties, either expressed ** or implied, with respect to this model, including the warranties of ** merchantability or fitness for a particular purpose. The model is ** provided solely on an "as is" basis. The entire risk as to its quality ** and performance is with the customer. ***************************************************************************** * ** Released by: Texas Instruments Inc. * Part: THS4541 * Date: 07/06/2018 * Model Type: All In One * Simulator: Pspice * Simulator Version: 17.2 * EVM Order Number: N/A * EVM Users Guide: N/A * Datasheet: August 2014 * * Model Version: 2.0 * ***************************************************************************** * * Updates: * * Version 1.0 : Release to Web * 2.0 : Improving Convergence * ***************************************************************************** * Notes: * 1. The following parameters are modeled: * Input Offset Voltage, Input Bias Current, Input Bias Current Offset * Current Consumption, Frequency Response, Voltage Noise, Current Noise, * Slew Rate, Large Signal Bandwidth, CMRR, PSRR, Input Resistance and * Cap, Input range, Output Impendance, Output swing, Output current * CMFB frequency response, CMFB Slew Rate, CMFB offset, CMFB ib current, * CMFB input resistance and capacitance, CMFB input range * * 2. The following parameters are not modeled: * Harmonic Distortion ***************************************************************************** .subckt THS4541 VOUTM VOUTP VOCM VINM VINP VEE VCC PD XI0 VOUTM VOUTP VOCM VINM VINP VEE VCC PD THS4541_HT1 .ends .subckt BALUN V VCM VN VP R9 V NET023 1e-6 R4 NET035 VCM 1e-6 R5 NET023 NET016 1e-6 R3 NET027 VN 1e-6 R6 0 NET021 1e-6 R7 NET023 NET019 1e-6 R8 0 NET017 1e-6 R1 NET022 VP 1e-6 XTRANSFORMEREK0 NET016 NET021 NET022 NET035 TRANSFORMEREK0 XTRANSFORMEREK1 NET019 NET017 NET035 NET027 TRANSFORMEREK1 .ends BALUN .subckt THS4541_SWITCHES_HT1 PD VCC VEE IN OUT XAHDLINV3 PD PDINV VCC VEE HPA_INV_IDEAL XAHDLI0 PDINV OUT 0 sw_l4 PARAMS: VON=1.1 XAHDLI34 PD OUT IN sw_l4 PARAMS: VON=1.1 .ends THS4541_SWITCHES_HT1 .subckt THS4541_IQ_HT1 PD VCC VCCMAIN VEE VEEMAIN X1 PD PDINV VCC VEE LOGIC1 0 DIGLEVSHIFTINV VLOGIC1 LOGIC1 0 1 G1 VCCMAIN VEEMAIN VALUE = + { ( 9.1e-3 + 200e-6*V(VCC,VEE) ) * ( 1-V(PDINV) ) + 5e-6 * V(PDINV) } *G0 NET4 NET7 POLY(1) VCC VEE 9.1e-3 200e-6 *I2 NET037 NET051 5e-6 *XAHDLI3 PDINV NET051 VEEMAIN sw_l4 PARAMS: VON=1.1 *XAHDLI5 PD 0 NET037 sw_l4 PARAMS: VON=1.1 *XAHDLI6 PD NET051 0 sw_l4 PARAMS: VON=1.1 *XAHDLI7 PDINV VCCMAIN NET037 sw_l4 PARAMS: VON=1.1 *XAHDLI23 PD NET7 VEEMAIN sw_l4 PARAMS: VON=1.1 *XAHDLI38 PDINV 0 NET4 sw_l4 PARAMS: VON=1.1 *XAHDLI39 PDINV NET7 0 sw_l4 PARAMS: VON=1.1 *XAHDLI22 PD VCCMAIN NET4 sw_l4 PARAMS: VON=1.1 *XAHDLINV3 PD PDINV VCC VEE HPA_INV_IDEAL .ends THS4541_IQ_HT1 .subckt THS4541_ZIN_HT1 IN1 IN2 OUT1 OUT2 C6 OUT1 OUT2 850e-15 C8 OUT2 0 1e-15 C7 0 OUT1 1e-15 R10 IN2 OUT2 100e-3 R9 IN1 OUT1 100e-3 R5 OUT1 OUT2 110e3 .ends THS4541_ZIN_HT1 .subckt THS4541_CMFB_VINRANGE_HT1 VCC VEE VIH VIL VIN VOUT R0 VIN NET011 1e-3 XD6 VIL NET011 DIDEAL1 XD7 NET011 VIH DIDEAL1 V0 NET011 VOUT 0 V14 VIL VEE 870e-3 V12 VCC VIH 1.09 .ends THS4541_CMFB_VINRANGE_HT1 .subckt THS4541_CMFB_HT1 VCC VEE VOCM VOUT VOUTM VOUTP CMFBVIHVILSIGNAL XAHDLI43 NET041 NET036 CMFBVIHVILSIGNAL VCC VEE HPA_OR2 XAHDLI41 NET026 NET045 NET041 VCC VEE HPA_COMP_IDEAL XAHDLI42 NET042 NET026 NET036 VCC VEE HPA_COMP_IDEAL V0 NET029 VOCM 2e-3 V22 VIH NET045 10e-3 V23 NET042 VIL 10e-3 I3 0 VOCM 1e-15 XI1 VCC VEE VIH VIL NET029 NET026 THS4541_CMFB_VINRANGE_HT1 C1 VOCM 0 1.2e-12 C0 VOUT 0 1e-15 GAHDLI6 0 VOUT VALUE { LIMIT(V(NET026,NET8)*1.85, -870e-3, 870e-3) } R3 VOUT 0 350.4e3 R1 VCC VOCM 93.6e3 R0 VEE VOCM 94.4e3 R5 VOUTM NET8 1e6 R2 VOUTP NET8 1e6 .ends THS4541_CMFB_HT1 .subckt ANALOG_BUFFER VOUT VIN R0 VIN 0 1e9 R1 VOUT 0 1e9 E0 VOUT 0 VIN 0 1 .ends ANALOG_BUFFER .subckt THS4541_OUTPUTCIR_HT1 PD RECCIRSIGNAL VCC VCCMAIN VEE VEEMAIN VOH VOL VIN VOUT H2 VIMON 0 VCURSOURCEDETECT 1 R1 VIMON 0 1e9 R4 NET48 NET15 100e-3 R12 NET50 NET17 1.233 XI11 NET76 NET15 ANALOG_BUFFER XI2 NET22 VIN ANALOG_BUFFER XD5 VOL NET15 DIDEAL1 XD0 NET15 VOH DIDEAL1 XD9 NET48 NET75 DIDEAL1 XD8 NET76 NET79 DIDEAL1 VE1 NET31 VEE 200e-3 VCURSOURCEDETECT NET15 NET34 0 VCURSINKDETECT VOUT NET34 0 V13 VCC NET41 200e-3 V18 NET53 NET17 0 H0 NET41 VOH POLY(1) Vcursourcedetect 0 17.2 0 0 1e-9 0 0 0 0 0 1e-9 H1 VOL NET31 POLY(1) Vcursinkdetect 0 17.2 0 0 1e-9 0 0 0 0 0 1e-9 *XI0 VCCMAIN VEEMAIN NET45 THS4541_OUTPUTCIR_ILOAD_HT1 XI0 VCCMAIN VEEMAIN NET45 PD THS4541_OUTPUTCIR_ILOAD_HT1 L0 NET17 NET48 1.8e-9 C3 NET22 NET50 1e-6 XI1 NET22 NET53 VIMON THS4541_OutputCir_Rout_HT1 XAHDLINV0 RECCIRSIGNAL NET55 VCC VEE HPA_INV_IDEAL *GE0 0 NET67 NET22 NET50 200 *XAHDLI49 NET55 NET67 0 sw_l4 PARAMS: VON=1.1 *XAHDLI50 RECCIRSIGNAL NET67 NET50 sw_l4 PARAMS: VON=1.1 *XI3 PD VCC VEE VIMON NET45 THS4541_SWITCHES_HT1 VXI3 VIMON NET45 0 E2 NET75 NET76 POLY(1) VCC VEE 0 2e-3 E1 NET79 NET48 POLY(1) VCC VEE 0 2e-3 .ends THS4541_OUTPUTCIR_HT1 .subckt THS4541_VINRANGE_HT1 VCC VEE VIN VOUT R0 VIN NET011 1e-3 XD6 NET9 NET011 DIDEAL1 XD7 NET011 NET8 DIDEAL1 V0 NET011 VOUT 0 V14 NET9 VEE -200e-3 V12 VCC NET8 1.2 .ends THS4541_VINRANGE_HT1 .subckt THS4541_NONDOMPOLE_HT1 VIN VOUT XI23 NET4 VIN ANALOG_BUFFER C1 VOUT 0 75e-12 R3 VOUT NET4 1 .ends THS4541_NONDOMPOLE_HT1 .subckt THS4541_RECOVERYCIRCUIT_HT1 A B RECCIRSIGNAL VCC VEE VOH VOL VOUT *XAHDLI34 RECCIRSIGNAL A NET015 sw_l4 PARAMS: VON=1.1 XAHDLI41 VOUT NET019 NET027 VCC VEE HPA_COMP_IDEAL XAHDLI42 NET021 VOUT NET026 VCC VEE HPA_COMP_IDEAL XAHDLI43 NET027 NET026 RECCIRSIGNAL VCC VEE HPA_OR2 XD6 NET9 NET015 DIDEAL1 XD7 NET015 NET8 DIDEAL1 V22 VOH NET019 10e-3 V23 NET021 VOL 10e-3 V0 A B 0 V14 NET9 VEE -2.5 V12 VCC NET8 -2.5 .ends THS4541_RECOVERYCIRCUIT_HT1 .subckt THS4541_DOMPOLE_HT1 A B R0 B A 175.2e3 C0 A 0 925e-12 .ends THS4541_DOMPOLE_HT1 .subckt THS4541_HT1 VOUTM VOUTP VOCM VINM VINP VEE VCC PD *XAHDLI46 CMFBVIHVILSIGNAL NET0233 NET050 sw_l4 PARAMS: VON=1.1 *XAHDLI44 CMFBVIHVILSIGNAL NET20 NET34 sw_l4 PARAMS: VON=1.1 XI43 NET050 NET0233 NET058 NET40 VCC_INT VEE_INT Power THS4541_GmItail_HT1 *XI42 POWER VCC_INT VEE_INT VOUTM_INT VOUTM THS4541_SWITCHES_HT1 *XI41 POWER VCC_INT VEE_INT VOUTP_INT VOUTP THS4541_SWITCHES_HT1 VI42 VOUTM_INT VOUTM 0 VI41 VOUTP_INT VOUTP 0 R0 VCC_INT PD 10e6 XAHDLINV3 PD NET070 VCC_INT VEE_INT HPA_INV_IDEAL XAHDLINV0 NET070 POWER VCC_INT VEE_INT HPA_INV_IDEAL XI40 POWER VCC_INT VCC VEE_INT VEE THS4541_IQ_HT1 XI33 VINM VINP NET053 NET086 THS4541_ZIN_HT1 XI32 VCC_INT VEE_INT VOCM NET10 VOUTM_INT VOUTP_INT CMFBVIHVILSIGNAL THS4541_CMFB_HT1 XI31 POWER VOUTM_RCS VCC_INT VCC VEE_INT VEE VOUTM_VOH VOUTM_VOL NET0105 VOUTM_INT + THS4541_OUTPUTCIR_HT1 XI30 POWER VOUTP_RCS VCC_INT VCC VEE_INT VEE VOUTP_VOH VOUTP_VOL NET062 VOUTP_INT + THS4541_OUTPUTCIR_HT1 XI24 VCC_INT VEE_INT NET0120 NET0233 THS4541_VINRANGE_HT1 XI25 VCC_INT VEE_INT NET0104 NET050 THS4541_VINRANGE_HT1 XI26 NET057 NET062 THS4541_NONDOMPOLE_HT1 XI27 NET061 NET0105 THS4541_NONDOMPOLE_HT1 XI29 NET0124 NET061 VOUTM_RCS VCC_INT VEE_INT VOUTM_VOH VOUTM_VOL VOUTM_INT + THS4541_RECOVERYCIRCUIT_HT1 XI28 NET0122 NET057 VOUTP_RCS VCC_INT VEE_INT VOUTP_VOH VOUTP_VOL VOUTP_INT + THS4541_RECOVERYCIRCUIT_HT1 XI16 NET34 NET10 THS4541_DOMPOLE_HT1 XI11 NET20 NET10 THS4541_DOMPOLE_HT1 I0 NET0233 0 -9.925e-6 I3 NET050 0 -10.075e-6 XI17 NET053 NET064 THS4541_Vnoise_HT1 XI18 NET064 NET086 THS4541_Inoise_HT1 XI19 VCC_INT VEE_INT NET086 NET046 THS4541_PSRR_HT1 XI21 NET046 NET0104 THS4541_CMRR_HT1 V2 NET064 NET0120 100e-6 V1 NET40 NET20 0 V0 NET20 NET0122 0 V9 NET34 NET0124 0 V10 NET058 NET34 0 XI12 VCC_INT VCC ANALOG_BUFFER XI13 VEE_INT VEE ANALOG_BUFFER .ends THS4541_HT1 .SUBCKT HPA_OR2 1 2 3 VDD VSS E1 4 0 VALUE = { IF( ((V(1)< (V(VDD)+V(VSS))/2 ) & (V(2)< (V(VDD)+V(VSS))/2 )), V(VSS), V(VDD) ) } R1 4 3 1 C1 3 0 1e-12 .ENDS .SUBCKT HPA_INV_IDEAL 1 2 VDD VSS E1 2 0 VALUE = { IF( V(1)> (V(VDD)+V(VSS))/2, V(VSS), V(VDD) ) } .ENDS .SUBCKT HPA_COMP_IDEAL INP INN OUT VDD VSS E1 OUT 0 VALUE = { IF( (V(INP) > V(INN)), V(VDD), V(VSS) ) } .ENDS .SUBCKT sw_l4 S A B PARAMS: VON=1.1 S1 A B S 0 VSWITCH2 .MODEL VSWITCH2 VSWITCH Roff=1e9 Ron=1e-3 Voff=-0.01 Von={VON} .ENDS .SUBCKT TRANSFORMEREK0 1 2 3 4 K1 L1 L2 0.5 L1 1 2 10uH L2 3 4 10uH .ends .SUBCKT TRANSFORMEREK1 1 2 3 4 K1 L1 L2 0.5 L1 1 2 10uH L2 3 4 10uH .ends *.MODEL DIDEAL1 D N=10m *.MODEL DIDEAL2 D N=0.1m .SUBCKT DIGLEVSHIFTINV 1 2 VDD_OLD VSS_OLD VDD_NEW VSS_NEW E1 3 0 VALUE = { IF( V(1) > (V(VDD_OLD)+V(VSS_OLD))/2, V(VSS_NEW), V(VDD_NEW) ) } R1 3 2 1 C1 2 0 1p .ENDS .SUBCKT THS4541_GmItail_HT1 VINP VINM IOUTP IOUTM VCC VEE PD X1 PD PDINV VCC VEE LOGIC1 0 DIGLEVSHIFTINV VLOGIC1 LOGIC1 0 1 .PARAM ITAILMAX_X1 = { 3.0 } .PARAM ITAILMAX_Y1 = { 590m } .PARAM ITAILMAX_X2 = { 5.0 } .PARAM ITAILMAX_Y2 = { 680m } .PARAM ITAILMAX_SLOPE = + { ( ITAILMAX_Y2 - ITAILMAX_Y1 ) / ( ITAILMAX_X2 - ITAILMAX_X1 ) } .PARAM ITAILMAX_INTCP = + { ITAILMAX_Y1 - ITAILMAX_SLOPE * ITAILMAX_X1 } EITAILMAX ITAILMAX 0 VALUE = + { ITAILMAX_SLOPE * V(VCC,VEE) + ITAILMAX_INTCP } .PARAM ITAILMIN_X1 = { 3.0 } .PARAM ITAILMIN_Y1 = { 590m } .PARAM ITAILMIN_X2 = { 5.0 } .PARAM ITAILMIN_Y2 = { 680m } .PARAM ITAILMIN_SLOPE = + { ( ITAILMIN_Y2 - ITAILMIN_Y1 ) / ( ITAILMIN_X2 - ITAILMIN_X1 ) } .PARAM ITAILMIN_INTCP = + { ITAILMIN_Y1 - ITAILMIN_SLOPE * ITAILMIN_X1 } EITAILMIN ITAILMIN 0 VALUE = + { ITAILMIN_SLOPE * V(VCC,VEE) + ITAILMIN_INTCP } G1 IOUTP IOUTM VALUE = { LIMIT ( 2.543 * V(VINP,VINM) * ( 1-V(PDINV) ) , -V(ITAILMIN), V(ITAILMAX) ) } .ENDS .SUBCKT THS4541_OutputCir_Rout_HT1 A B VIMON .PARAM Ro_Iout_0A = 160 .PARAM Multiplier = 0 G1 A B VALUE = { V(A,B) * 1/(Ro_Iout_0A - Multiplier * ABS(V(VIMON)) ) } .ENDS .SUBCKT THS4541_OUTPUTCIR_ILOAD_HT1 VDD VSS VIMON PD X1 PD PDINV VDD VSS LOGIC1 0 DIGLEVSHIFTINV VLOGIC1 LOGIC1 0 1 G1 VDD 0 VALUE = {IF(V(VIMON) >= 0, V(VIMON)*( 1-V(PDINV) ), 0)} G2 VSS 0 VALUE = {IF(V(VIMON) < 0, V(VIMON)*( 1-V(PDINV) ), 0)} .ENDS .SUBCKT THS4541_Vnoise_HT1 A B .PARAM X = { 1k } .PARAM Y = { 6.1 } .PARAM Z = { 2.2 } X1 A B VNSE PARAMS: NLF = { Y } FLW = { X } NVR = { Z } .ENDS .SUBCKT THS4541_Inoise_HT1 A B .PARAM X = { 10k } .PARAM Y = { 5e3 } .PARAM Z = { 1.9e3 } X1 A B FEMT PARAMS: NLFF = { Y } FLWF = { X } NVRF = { Z } .ENDS .SUBCKT THS4541_PSRR_HT1 VDD VSS A B X1 VDD VSS A B 0 PSRR_DUAL_NEW PARAMS: + PSRRP = 109.5 FPSRRP = 1000k + PSRRN = 109.5 FPSRRN = 1000k .ENDS .SUBCKT THS4541_CMRR_HT1 A B X1 A B 0 CMRR_NEW PARAMS: CMRR = 106 FCMRR = 1000K .ENDS .SUBCKT VNSE 1 2 PARAMS: NLF = 10 FLW = 4 NVR = 4.6 .PARAM GLF={PWR(FLW,0.25)*NLF/1164} .PARAM RNV={1.184*PWR(NVR,2)} .MODEL DVN D KF={PWR(FLW,0.5)/1E11} IS=1.0E-16 I1 0 7 10E-3 I2 0 8 10E-3 D1 7 0 DVN D2 8 0 DVN E1 3 6 7 8 {GLF} R1 3 0 1E9 R2 3 0 1E9 R3 3 6 1E9 E2 6 4 5 0 10 R4 5 0 {RNV} R5 5 0 {RNV} R6 3 4 1E9 R7 4 0 1E9 E3 1 2 3 4 1 C1 1 0 1E-15 C2 2 0 1E-15 C3 1 2 1E-15 .ENDS .SUBCKT FEMT 1 2 PARAMS: NLFF = 0.1 FLWF = 0.001 NVRF = 0.1 .PARAM GLFF={PWR(FLWF,0.25)*NLFF/1164} .PARAM RNVF={1.184*PWR(NVRF,2)} .MODEL DVNF D KF={PWR(FLWF,0.5)/1E11} IS=1.0E-16 I1 0 7 10E-3 I2 0 8 10E-3 D1 7 0 DVNF D2 8 0 DVNF E1 3 6 7 8 {GLFF} R1 3 0 1E9 R2 3 0 1E9 R3 3 6 1E9 E2 6 4 5 0 10 R4 5 0 {RNVF} R5 5 0 {RNVF} R6 3 4 1E9 R7 4 0 1E9 G1 1 2 3 4 1E-6 C1 1 0 1E-15 C2 2 0 1E-15 C3 1 2 1E-15 .ENDS .SUBCKT PSRR_SINGLE VDD VSS VI VO GNDF PARAMS: PSRR = 130 FPSRR = 1.6 .PARAM PI = 3.141592 .PARAM RPSRR = 1 .PARAM GPSRR = {PWR(10,-PSRR/20)/RPSRR} .PARAM LPSRR = {RPSRR/(2*PI*FPSRR)} G1 GNDF 1 VDD VSS {GPSRR} R1 1 2 {RPSRR} L1 2 GNDF {LPSRR} E1 VO VI 1 GNDF 1 C2 VDD VSS 10P .ENDS .SUBCKT PSRR_SINGLE_NEW VDD VSS VI VO GNDF PARAMS: PSRR = 130 FPSRR = 1.6 .PARAM PI = 3.141592 .PARAM RPSRR = 1 .PARAM GPSRR = {PWR(10,-PSRR/20)/RPSRR} .PARAM LPSRR = {RPSRR/(2*PI*FPSRR)} G1 GNDF 1 VDD VSS {GPSRR} R1 1 2 {RPSRR} L1 2 GNDF {LPSRR} EA 101 GNDF 1 GNDF 1 GRA 101 102 VALUE = { V(101,102)/1e6 } CA 102 GNDF 1e3 EB 1 1a VALUE = {V(102,GNDF)} E1 VO VI 1a GNDF 1 C2 VDD VSS 10P .ENDS .SUBCKT PSRR_DUAL VDD VSS VI VO GNDF + PARAMS: PSRRP = 130 FPSRRP = 1.6 + PSRRN = 130 FPSRRN = 1.6 .PARAM PI = 3.141592 .PARAM RPSRRP = 1 .PARAM GPSRRP = {PWR(10,-PSRRP/20)/RPSRRP} .PARAM LPSRRP = {RPSRRP/(2*PI*FPSRRP)} .PARAM RPSRRN = 1 .PARAM GPSRRN = {PWR(10,-PSRRN/20)/RPSRRN} .PARAM LPSRRN = {RPSRRN/(2*PI*FPSRRN)} G1 GNDF 1 VDD GNDF {GPSRRP} R1 1 2 {RPSRRP} L1 2 GNDF {LPSRRP} G2 GNDF 3 VSS GNDF {GPSRRN} R2 3 4 {RPSRRN} L2 4 GNDF {LPSRRN} E1 VO VI VALUE = {V(1,GNDF) + V(3,GNDF)} C3 VDD VSS 10P .ENDS .SUBCKT PSRR_DUAL_NEW VDD VSS VI VO GNDF + PARAMS: PSRRP = 130 FPSRRP = 1.6 + PSRRN = 130 FPSRRN = 1.6 .PARAM PI = 3.141592 .PARAM RPSRRP = 1 .PARAM GPSRRP = {PWR(10,-PSRRP/20)/RPSRRP} .PARAM LPSRRP = {RPSRRP/(2*PI*FPSRRP)} .PARAM RPSRRN = 1 .PARAM GPSRRN = {PWR(10,-PSRRN/20)/RPSRRN} .PARAM LPSRRN = {RPSRRN/(2*PI*FPSRRN)} G1 GNDF 1 VDD GNDF {GPSRRP} R1 1 2 {RPSRRP} L1 2 GNDF {LPSRRP} EA 101 GNDF 1 GNDF 1 GRA 101 102 VALUE = { V(101,102)/1e6 } CA 102 GNDF 1e3 EB 1 1a VALUE = {V(102,GNDF)} G2 GNDF 3 VSS GNDF {GPSRRN} R2 3 4 {RPSRRN} L2 4 GNDF {LPSRRN} EC 301 GNDF 3 GNDF 1 GRC 301 302 VALUE = { V(301,302)/1e6 } CC 302 GNDF 1e3 ED 3 3a VALUE = {V(302,GNDF)} E1 VO VI VALUE = {V(1a,GNDF) + V(3a,GNDF)} C3 VDD VSS 10P .ENDS .SUBCKT CMRR VI VO GNDF PARAMS: CMRR = 130 FCMRR = 1.6K .PARAM PI = 3.141592 .PARAM RCMRR = 1 .PARAM GCMRR = {PWR(10,-CMRR/20)/RCMRR} .PARAM LCMRR = {RCMRR/(2*PI*FCMRR)} G1 GNDF 1 VI GNDF {GCMRR} R1 1 2 {RCMRR} L1 2 GNDF {LCMRR} E1 VI VO 1 GNDF 1 .ENDS .SUBCKT CMRR_NEW VI VO GNDF PARAMS: CMRR = 130 FCMRR = 1.6K .PARAM PI = 3.141592 .PARAM RCMRR = 1 .PARAM GCMRR = {PWR(10,-CMRR/20)/RCMRR} .PARAM LCMRR = {RCMRR/(2*PI*FCMRR)} G1 GNDF 1 VI GNDF {GCMRR} R1 1 2 {RCMRR} L1 2 GNDF {LCMRR} EA 101 GNDF 1 GNDF 1 GRA 101 102 VALUE = {V(101,102)/1e6} CA 102 GNDF 1e3 EB 1 1a VALUE = {V(102,GNDF)} E1 VI VO 1a GNDF 1 .ENDS .SUBCKT DIDEAL1 POS NEG G1 POS NEG VALUE = { IF ( V(POS,NEG) <= 0 , 0, V(POS,NEG)*0.01G ) } R0 POS NEG 1000G .ENDS