//////////////////////////
//        433 Mhz       //
//////////////////////////
#ifdef MOD_2GFSK_38_4KBPS
#error "For 433Mhz band ,2GFSK @ 38.4KBPS  is not yet implemented !!!"
#elif defined(MOD_2GFSK_250KBPS) //250K 2GFSK 433Mhz highest sensitivity
static const RF_SETTINGS s_rfSettings_433 = {
    //0x08,  // 0x0C,  // FSCTRL1       Frequency Synthesizer Control
    0x0C,//

    //0x00,//0x2D,  // IOCFG0        GDO0 Output Configuration
    0x06,

    0x00,  // FSCTRL0       Frequency Synthesizer Control
    0x10,  // FREQ2         Frequency Control Word, High Byte
    0xA7,  // FREQ1         Frequency Control Word, Middle Byte
    0x62,  // FREQ0         Frequency Control Word, Low Byte
    0x2D,  // MDMCFG4       Modem Configuration
    0x3B,  // MDMCFG3       Modem Configuration
    0x13,  //0x10,  // MDMCFG2       Modem Configuration
    0x22,  // MDMCFG1       Modem Configuration
    0xF8,  // MDMCFG0       Modem Configuration
    0x00,  // CHANNR        Channel Number
    0x62,  // DEVIATN       Modem Deviation Setting
    0xB6,  // FREND1        Front End RX Configuration
    0x10,  // FREND0        Front End TX Configuration
    0x10,  // MCSM0         Main Radio Control State Machine Configuration
    0x1D,  // FOCCFG        Frequency Offset Compensation Configuration
    0x1C,  // BSCFG         Bit Synchronization Configuration
    0xC7,  // AGCCTRL2      AGC Control
    0x00,  // AGCCTRL1      AGC Control
    0xB0,  // AGCCTRL0      AGC Control
    0xEA,  // FSCAL3        Frequency Synthesizer Calibration
    0x2A,  // FSCAL2        Frequency Synthesizer Calibration
    0x00,  // FSCAL1        Frequency Synthesizer Calibration
    0x1F,  // FSCAL0        Frequency Synthesizer Calibration
    0x59,  // FSTEST        Frequency Synthesizer Calibration Control
    0x88,  // TEST2         Various Test Settings
    0x31,  // TEST1         Various Test Settings
    0x09,  // TEST0         Various Test Settings
    0x07,  // FIFOTHR       RX FIFO and TX FIFO Thresholds
    0x29,  //0x0B,  // IOCFG2        GDO2 Output Configuration
    0x04,  // PKTCTRL1      Packet Automation Control
    0x05,  //0x12,  // PKTCTRL0      Packet Automation Control
    0x00,  // ADDR          Device Address
    0x3F   //0xFF  // PKTLEN        Packet Length
};