/*
 * msp_wm430fr4_cc1120.c
 *
 *  Created on: 2014Äê7ÔÂ20ÈÕ
 *      Author: a0222632
 *     wM-Bus code added: in Q1 2015
 * 		author: a0797195
 */

#include <msp_wm430fr4_rtc.h>
#include <mbus_packet.h>
#include <chip_detect.h>
#include <cc112x_wmbus868.h>

#ifdef Comm_Sub1GHz

extern unsigned char * chip_ver;

static void TrxReadWriteBurstSingle(uint8_t addr, volatile uint8_t *pData,uint16_t len) ;
void ManualCalibration(void);
extern uint16_t rf_device;
extern volatile unsigned char * mode;
extern volatile uint16_t *rxPackets; // = &BAKMEM15;
extern uint8_t TXpacket;
void RegisterConfig(void);

extern uint8_t TXbytes;
/******************************************************************************
 */
void SPI_Config()
{
	/* Configuration
	 * -  8-bit
	 * -  Master Mode
	 * -  3-pin
	 * -  synchronous mode
	 * -  MSB first
	 * -  Clock phase select = captured on first edge
	 * -  Inactive state is low
	 * -  SMCLK as clock source
	 * -  Spi clk is adjusted corresponding to systemClock as the highest rate
	 *    supported by the supported radios: this could be optimized and done
	 *    after chip detect.
	 */
	RST_PORT_DIR |= CC1120_RST_BIT;
	RST_PORT_OUT |= CC1120_RST_BIT;//RST
	// 1) Set USCI in reset state
	UCB0CTLW0 |= UCSWRST;
	// 2) Init USCI registers with UCSWRST = 1
	UCB0CTLW0 |= + UCMST + UCSYNC + UCMSB + UCCKPH;
	UCB0CTLW0 |=  UCSSEL__SMCLK; //SMCLK as SPI clock
	//data rate:
	UCB0BR1   =  0x00;
	UCB0BR0   =  0x02; // division factor of clock source is 3+1 = 4 (16Mhz /4 is 4MHz) WORKS fine on 17. Feb'15
//	UCB0BR0   =  0x02; // division factor of clock source is 2+1 = 3 (16Mhz /3 is 5.33MHz) does NOT work on 17. Feb'15!

	// 3) Configure ports
	// MISO -> P5.3
	// MOSI -> P5.2
	// SCLK -> P5.1
	// CS_N -> manualy set. (P1.6)

	// select bit 1, 2 and 3 as peripheral
	SPI_PORT_SEL |= SPI_SCLK_BIT + SPI_MISO_BIT + SPI_MOSI_BIT; //Setting function select to second peripheral module
	// manually set CS_N P5.0
	SPI_PORT_SEL &= ~SPI_CS_BIT;

//	SPI_PORT_OUT |= SPI_MISO_BIT;
	SPI_CS_OUT |= SPI_CS_BIT;

	// Set direction
	SPI_CS_OUT |= SPI_CS_BIT;
	//	SPI_PORT_DIR |= SPI_MOSI_PIN + SPI_SCLK;
	//	SPI_PORT_DIR &= ~SPI_MISO_BIT;

	// 4) Clear UCSWRST. Release for operation
	UCB0CTL1 &= ~UCSWRST;
	// 5) Enable interrupts UCxRXIE and UCxTXIE
}

void SPI_Standby()
{
	P5SEL0 &= ~(BIT1 + BIT2 + BIT3);
	P5OUT &= ~(BIT1 + BIT2 + BIT3 + BIT5 + BIT6 + BIT7);
	P5DIR |= BIT0 + BIT1 + BIT2 + BIT3 + BIT5 + BIT6 + BIT7;
}
/******************************************************************************
 * @fn          function name
 *
 * @brief       Description of the function
 *
 * @param       input, output parameters
 *
 * @return      describe return value, if any
 */
uint8_t Trx8BitRegAccess(uint8_t accessType, uint8_t addrByte, volatile uint8_t *pData, uint16_t len)
{
	uint8_t readValue;

	//Pull CS_N low and wait for SO to go low before communication starts
	SPI_CS_OUT &= ~SPI_CS_BIT;
	while(SPI_PORT_IN & SPI_MISO_BIT);
	// send register address byte
	UCB0IFG &= ~UCRXIFG;
	UCB0TXBUF = accessType|addrByte;
	while(!(UCB0IFG & UCRXIFG));
	// Storing chip status
	readValue = UCB0RXBUF;

	TrxReadWriteBurstSingle(accessType|addrByte,pData,len);
	SPI_CS_OUT |= SPI_CS_BIT;
	// return the status byte value */
	return(readValue);
}
/******************************************************************************
 * @fn          trx16BitRegAccess
 *
 * @brief       This function performs a read or write in the extended adress
 *              space of CC112X.
 *
 * input parameters
 *
 * @param       accessType - Specifies if this is a read or write and if it's
 *                           a single or burst access. Bitmask made up of
 *                           RADIO_BURST_ACCESS/RADIO_SINGLE_ACCESS/
 *                           RADIO_WRITE_ACCESS/RADIO_READ_ACCESS.
 * @param       extAddr - Extended register space address = 0x2F.
 * @param       regAddr - Register address in the extended address space.
 * @param       *pData  - Pointer to data array for communication
 * @param       len     - Length of bytes to be read/written from/to radio
 *
 * output parameters
 *
 * @return      rfStatus_t
 */
rfStatus_t Trx16BitRegAccess(uint8_t accessType, uint8_t extAddr, uint8_t regAddr, volatile uint8_t *pData, uint8_t len)
{
	uint8_t readValue;

	SPI_CS_OUT &= ~SPI_CS_BIT;
	while(SPI_PORT_IN & SPI_MISO_BIT);
	/* send extended address byte with access type bits set */
	UCB0IFG &= ~UCRXIFG;
	UCB0TXBUF = accessType|extAddr;
	while(!(UCB0IFG & UCRXIFG));
	/* Storing chip status */
	readValue = UCB0RXBUF;
	UCB0IFG &= ~UCRXIFG;
	UCB0TXBUF = regAddr;
	while(!(UCB0IFG & UCRXIFG));
	/* Communicate len number of bytes */
	TrxReadWriteBurstSingle(accessType|extAddr,pData,len);
	SPI_CS_OUT |= SPI_CS_BIT;
	/* return the status byte value */
	return(readValue);
}
/*******************************************************************************
 * @fn          TrxSpiCmdStrobe
 *
 * @brief       Send command strobe to the radio. Returns status byte read
 *              during transfer of command strobe. Validation of provided
 *              is not done. Function assumes chip is ready.
 *
 * input parameters
 *
 * @param       cmd - command strobe
 *
 * output parameters
 *
 * @return      status byte
 */
rfStatus_t TrxSpiCmdStrobe(uint8_t cmd)
{
	uint8_t rc;
	SPI_CS_OUT &= ~SPI_CS_BIT;
	while(SPI_PORT_IN & SPI_MISO_BIT);
	UCB0IFG &= ~UCRXIFG;
	UCB0TXBUF = cmd;
	while(!(UCB0IFG & UCRXIFG));
	rc = UCB0RXBUF;
	SPI_CS_OUT |= SPI_CS_BIT;
	return(rc);
}
/*******************************************************************************
 * @fn          trxReadWriteBurstSingle
 *
 * @brief       When the address byte is sent to the SPI slave, the next byte
 *              communicated is the data to be written or read. The address
 *              byte that holds information about read/write -and single/
 *              burst-access is provided to this function.
 *
 *              Depending on these two bits this function will write len bytes to
 *              the radio in burst mode or read len bytes from the radio in burst
 *              mode if the burst bit is set. If the burst bit is not set, only
 *              one data byte is communicated.
 *
 *              NOTE: This function is used in the following way:
 *
 *              SPI_BEGIN();
 *              while(TRXEM_PORT_IN & SPI_MISO_BIT);
 *              ...[Depending on type of register access]
 *              trxReadWriteBurstSingle(uint8 addr,uint8 *pData,uint16 len);
 *              SPI_END();
 *
 * input parameters
 *
 * @param       none
 *
 * output parameters
 *
 * @return      void
 */
static void TrxReadWriteBurstSingle(uint8_t addr, volatile uint8_t *pData,uint16_t len)
{
	uint16_t i;
	/* Communicate len number of bytes: if RX - the procedure sends 0x00 to push bytes from slave*/
	if(addr&RADIO_READ_ACCESS)
	{
		if(addr&RADIO_BURST_ACCESS)
		{
			for (i = 0; i < len; i++)
			{
				UCB0IFG &= ~UCRXIFG;
				UCB0TXBUF = 0;            /* Possible to combining read and write as one access type */
				while(!(UCB0IFG & UCRXIFG));
				*pData = UCB0RXBUF;     /* Store pData from last pData RX */
				pData++;
			}
		}
		else
		{
			UCB0IFG &= ~UCRXIFG;
			UCB0TXBUF = 0;
			while(!(UCB0IFG & UCRXIFG));
			*pData = UCB0RXBUF;
		}
	}
	else
	{
		if(addr&RADIO_BURST_ACCESS)
		{
			/* Communicate len number of bytes: if TX - the procedure doesn't overwrite pData */
			for (i = 0; i < len; i++)
			{
				UCB0IFG &= ~UCRXIFG;
				UCB0TXBUF = *pData;
				while(!(UCB0IFG & UCRXIFG));
				pData++;
			}
		}
		else
		{
			UCB0IFG &= ~UCRXIFG;
			UCB0TXBUF = *pData;
			while(!(UCB0IFG & UCRXIFG));
		}
	}
	return;
}


/******************************************************************************
 * FUNCTIONS
 */

/******************************************************************************
 * @fn          cc112xSpiReadReg
 *
 * @brief       Read value(s) from config/status/extended radio register(s).
 *              If len  = 1: Reads a single register
 *              if len != 1: Reads len register values in burst mode
 *
 * input parameters
 *
 * @param       addr   - address of first register to read
 * @param       *pData - pointer to data array where read bytes are saved
 * @param       len   - number of bytes to read
 *
 * output parameters
 *
 * @return      rfStatus_t
 */
rfStatus_t cc112xSpiReadReg(uint16_t addr,  volatile uint8_t *pData, uint8_t len)
{
	uint8_t tempExt  = (uint8_t)(addr>>8);
	uint8_t tempAddr = (uint8_t)(addr & 0x00FF);
	uint8_t rc;

	/* Checking if this is a FIFO access -> returns chip not ready  */
	if((CC112X_SINGLE_TXFIFO<=tempAddr)&&(tempExt==0)) return STATUS_CHIP_RDYn_BM;

	/* Decide what register space is accessed */
	if(!tempExt)
	{
		rc = Trx8BitRegAccess((RADIO_BURST_ACCESS|RADIO_READ_ACCESS),tempAddr,pData,len);
	}
	else if (tempExt == 0x2F)
	{
		rc = Trx16BitRegAccess((RADIO_BURST_ACCESS|RADIO_READ_ACCESS),tempExt,tempAddr,pData,len);
	}
	return (rc);
}

/******************************************************************************
 * @fn          cc112xSpiWriteReg
 *
 * @brief       Write value(s) to config/status/extended radio register(s).
 *              If len  = 1: Writes a single register
 *              if len  > 1: Writes len register values in burst mode
 *
 * input parameters
 *
 * @param       addr   - address of first register to write
 * @param       *pData - pointer to data array that holds bytes to be written
 * @param       len    - number of bytes to write
 *
 * output parameters
 *
 * @return      rfStatus_t
 */
rfStatus_t cc112xSpiWriteReg(uint16_t addr, uint8_t *pData, uint8_t len)
{
	uint8_t tempExt  = (uint8_t)(addr>>8);
	uint8_t tempAddr = (uint8_t)(addr & 0x00FF);
	uint8_t rc;

	/* Checking if this is a FIFO access - returns chip not ready */
	if((CC112X_SINGLE_TXFIFO<=tempAddr)&&(tempExt==0)) return STATUS_CHIP_RDYn_BM;

	/* Decide what register space is accessed */
	if(!tempExt)
	{
		rc = Trx8BitRegAccess((RADIO_BURST_ACCESS|RADIO_WRITE_ACCESS),tempAddr,pData,len);
	}
	else if (tempExt == 0x2F)
	{
		rc = Trx16BitRegAccess((RADIO_BURST_ACCESS|RADIO_WRITE_ACCESS),tempExt,tempAddr,pData,len);
	}
	return (rc);
}

/*******************************************************************************
 * @fn          cc112xSpiWriteTxFifo
 *
 * @brief       Write pData to radio transmit FIFO.
 *
 * input parameters
 *
 * @param       *pData - pointer to data array that is written to TX FIFO
 * @param       len    - Length of data array to be written
 *
 * output parameters
 *
 * @return      rfStatus_t
 */
rfStatus_t cc112xSpiWriteTxFifo(uint8_t *pData, uint8_t len)
{
	uint8_t rc;
	rc = Trx8BitRegAccess(0x00,CC112X_BURST_TXFIFO, pData, len);
	return (rc);
}

/*******************************************************************************
 * @fn          cc112xSpiReadRxFifo
 *
 * @brief       Reads RX FIFO values to pData array
 *
 * input parameters
 *
 * @param       *pData - pointer to data array where RX FIFO bytes are saved
 * @param       len    - number of bytes to read from the RX FIFO
 *
 * output parameters
 *
 * @return      rfStatus_t
 */
rfStatus_t cc112xSpiReadRxFifo(uint8_t * pData, uint8_t len)
{
	uint8_t rc;
	rc = Trx8BitRegAccess(0x00,CC112X_BURST_RXFIFO, pData, len);
	return (rc);
}

/******************************************************************************
 * @fn      cc112xGetTxStatus(void)
 *
 * @brief   This function transmits a No Operation Strobe (SNOP) to get the
 *          status of the radio and the number of free bytes in the TX FIFO.
 *
 *          Status byte:
 *
 *          ---------------------------------------------------------------------------
 *          |          |            |                                                 |
 *          | CHIP_RDY | STATE[2:0] | FIFO_BYTES_AVAILABLE (free bytes in the TX FIFO |
 *          |          |            |                                                 |
 *          ---------------------------------------------------------------------------
 *
 *
 * input parameters
 *
 * @param   none
 *
 * output parameters
 *
 * @return  rfStatus_t
 *
 */
rfStatus_t cc112xGetTxStatus(void)
{
	return(TrxSpiCmdStrobe(CC112X_SNOP));
}

/******************************************************************************
 *
 *  @fn       cc112xGetRxStatus(void)
 *
 *  @brief
 *            This function transmits a No Operation Strobe (SNOP) with the
 *            read bit set to get the status of the radio and the number of
 *            available bytes in the RXFIFO.
 *
 *            Status byte:
 *
 *            --------------------------------------------------------------------------------
 *            |          |            |                                                      |
 *            | CHIP_RDY | STATE[2:0] | FIFO_BYTES_AVAILABLE (available bytes in the RX FIFO |
 *            |          |            |                                                      |
 *            --------------------------------------------------------------------------------
 *
 *
 * input parameters
 *
 * @param     none
 *
 * output parameters
 *
 * @return    rfStatus_t
 *
 */
rfStatus_t cc112xGetRxStatus(void)
{
	return(TrxSpiCmdStrobe(CC112X_SNOP | RADIO_READ_ACCESS));
}


void RegisterConfig(void)
{
	uint8_t writeByte;

	// reset radio
	TrxSpiCmdStrobe(CC112X_SRES);
	// write registers to radio
	uint16_t i;

	//init for wMbus_Mode and CC1120 or CC1200
		 if (WMbus_mode == WMBUS_SMODE) {  //Write register settings to radio S-mode
			  for(i = 0; i < (sizeof  WMbusCC112xRfSettingsSmode/sizeof(registerSetting_t));i++)
					  {
						 writeByte =  WMbusCC112xRfSettingsSmode[i].data;
						 cc112xSpiWriteReg(WMbusCC112xRfSettingsSmode[i].addr,&writeByte,1);
					  }
				 if (*chip_ver < 0x22 )
					 ManualCalibration();
					  /*
			   case 0x1200:  //0x1200 = 4608
					  for(i = 0; i < (sizeof  WMbusCC112xRfSettingsSmode/sizeof(registerSetting_t));i++)
					  {
						 writeByte =  WMbusCC112xRfSettingsSmode[i].data;
						 cc112xSpiWriteReg(WMbusCC112xRfSettingsSmode[i].addr,&writeByte,1);
					  }
					  break;
					  */
			}
				//init T-mode if WMbus_mode == 2;
			 else if (WMbus_mode == WMBUS_TMODE){
				for(i = 0; i < (sizeof  WMbusCC112xRfSettingsTmode/sizeof(registerSetting_t));i++)
				 		  {
				 		     writeByte =  WMbusCC112xRfSettingsTmode[i].data;
				 		     cc112xSpiWriteReg(WMbusCC112xRfSettingsTmode[i].addr,&writeByte,1);
				 		  }
				 if (*chip_ver < 0x22 )
					 ManualCalibration();
				 //init T-mode
			 }
			 else  if (WMbus_mode == WMBUS_CMODE){ //C-mode modifications on top of T-mode (WMbus_mode == 3)
				 for(i = 0; i < (sizeof  WMbusCC112xRfSettingsCmode/sizeof(registerSetting_t));i++)  {
				 		writeByte =  WMbusCC112xRfSettingsCmode[i].data;
				 		cc112xSpiWriteReg(WMbusCC112xRfSettingsCmode[i].addr,&writeByte,1);
				 }
				 if (*chip_ver < 0x22 )
					 ManualCalibration();
			 }	 //Init C-mode

			 else  if (WMbus_mode == WMBUS_C2MODE){ //C-mode modifications on top of T-mode (WMbus_mode == 3)
			 				 for(i = 0; i < (sizeof  WMbusCC112xRfSettingsC2mode/sizeof(registerSetting_t));i++)  {
			 				 		writeByte =  WMbusCC112xRfSettingsC2mode[i].data;
			 				 		cc112xSpiWriteReg(WMbusCC112xRfSettingsC2mode[i].addr,&writeByte,1);
			 				 }
			 				 if (*chip_ver < 0x22 )
			 					 ManualCalibration();
			 }	 //Init C-mode



			 else  if (WMbus_mode == WMBUS_FMODE){ //F-mode modifications on top of T-mode (WMbus_mode == 3)
				 for(i = 0; i < (sizeof  WMbusCC112xRfSettingsFmode/sizeof(registerSetting_t));i++)  {
			 			writeByte =  WMbusCC112xRfSettingsFmode[i].data;
			 			cc112xSpiWriteReg(WMbusCC112xRfSettingsFmode[i].addr,&writeByte,1);
			     }
				 if (*chip_ver < 0x22 )
					 ManualCalibration();
			 }	 //Init C-mode

			 else  if (WMbus_mode == WMBUS_NabefMODE){ //Nabef-mode modifications on top of T-mode (WMbus_mode == 3)
							 for(i = 0; i < (sizeof  WMbusCC112xRfSettingsNabef/sizeof(registerSetting_t));i++)  {
						 			writeByte =  WMbusCC112xRfSettingsNabef[i].data;
						 			cc112xSpiWriteReg(WMbusCC112xRfSettingsNabef[i].addr,&writeByte,1);
						     }
							 if (*chip_ver < 0x22 )
								 ManualCalibration();
						 }	 //Init Nabef-mode

			 else  if (WMbus_mode == WMBUS_NcdMODE){ //Ncd-mode modifications on top of T-mode (WMbus_mode == 3)
							 for(i = 0; i < (sizeof  WMbusCC112xRfSettingsNcd/sizeof(registerSetting_t));i++)  {
						 			writeByte =  WMbusCC112xRfSettingsNcd[i].data;
						 			cc112xSpiWriteReg(WMbusCC112xRfSettingsNcd[i].addr,&writeByte,1);
						     }
							 if (*chip_ver < 0x22 )
													 ManualCalibration();
						 }	 //Init Ncd-mode

			 else  if (WMbus_mode == WMBUS_NgMODE){ //Ncd-mode modifications on top of T-mode (WMbus_mode == 3)
										 for(i = 0; i < (sizeof  WMbusCC112xRfSettingsNg/sizeof(registerSetting_t));i++)  {
									 			writeByte =  WMbusCC112xRfSettingsNg[i].data;
									 			cc112xSpiWriteReg(WMbusCC112xRfSettingsNg[i].addr,&writeByte,1);
									     }
										 if (*chip_ver < 0x22 )
																 ManualCalibration();
			}	 //Init Ncd-mode
}

//From Erratasheet
#define VCDAC_START_OFFSET 2
#define FS_VCO2_INDEX 0
#define FS_VCO4_INDEX 1
#define FS_CHP_INDEX 2
void ManualCalibration(void)
{

	uint8_t original_fs_cal2;
	uint8_t calResults_for_vcdac_start_high[3];
	uint8_t calResults_for_vcdac_start_mid[3];
	uint8_t marcstate;
	uint8_t writeByte;

	// 1) Set VCO cap-array to 0 (FS_VCO2 = 0x00)
	writeByte = 0x00;
	cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);

	// 2) Start with high VCDAC (original VCDAC_START + 2):
	cc112xSpiReadReg(CC112X_FS_CAL2, &original_fs_cal2, 1);
	writeByte = original_fs_cal2 + VCDAC_START_OFFSET;
	cc112xSpiWriteReg(CC112X_FS_CAL2, &writeByte, 1);

	// 3) Calibrate and wait for calibration to be done (radio back in IDLE state)
	TrxSpiCmdStrobe(CC112X_SCAL);

	do {
		cc112xSpiReadReg(CC112X_MARCSTATE, &marcstate, 1);
	} while (marcstate != 0x41);

	// 4) Read FS_VCO2, FS_VCO4 and FS_CHP register obtained with high VCDAC_START value
	cc112xSpiReadReg(CC112X_FS_VCO2,
			&calResults_for_vcdac_start_high[FS_VCO2_INDEX], 1);
	cc112xSpiReadReg(CC112X_FS_VCO4,
			&calResults_for_vcdac_start_high[FS_VCO4_INDEX], 1);
	cc112xSpiReadReg(CC112X_FS_CHP,
			&calResults_for_vcdac_start_high[FS_CHP_INDEX], 1);

	// 5) Set VCO cap-array to 0 (FS_VCO2 = 0x00)
	writeByte = 0x00;
	cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);

	// 6) Continue with mid VCDAC (original VCDAC_START):
	writeByte = original_fs_cal2;
	cc112xSpiWriteReg(CC112X_FS_CAL2, &writeByte, 1);

	// 7) Calibrate and wait for calibration to be done (radio back in IDLE state)
	TrxSpiCmdStrobe(CC112X_SCAL);

	do {
		cc112xSpiReadReg(CC112X_MARCSTATE, &marcstate, 1);
	} while (marcstate != 0x41);

	// 8) Read FS_VCO2, FS_VCO4 and FS_CHP register obtained with mid VCDAC_START value
	cc112xSpiReadReg(CC112X_FS_VCO2,
			&calResults_for_vcdac_start_mid[FS_VCO2_INDEX], 1);
	cc112xSpiReadReg(CC112X_FS_VCO4,
			&calResults_for_vcdac_start_mid[FS_VCO4_INDEX], 1);
	cc112xSpiReadReg(CC112X_FS_CHP,
			&calResults_for_vcdac_start_mid[FS_CHP_INDEX], 1);

	// 9) Write back highest FS_VCO2 and corresponding FS_VCO and FS_CHP result
	if (calResults_for_vcdac_start_high[FS_VCO2_INDEX]
	                                    > calResults_for_vcdac_start_mid[FS_VCO2_INDEX]) {
		writeByte = calResults_for_vcdac_start_high[FS_VCO2_INDEX];
		cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);
		writeByte = calResults_for_vcdac_start_high[FS_VCO4_INDEX];
		cc112xSpiWriteReg(CC112X_FS_VCO4, &writeByte, 1);
		writeByte = calResults_for_vcdac_start_high[FS_CHP_INDEX];
		cc112xSpiWriteReg(CC112X_FS_CHP, &writeByte, 1);
	} else {
		writeByte = calResults_for_vcdac_start_mid[FS_VCO2_INDEX];
		cc112xSpiWriteReg(CC112X_FS_VCO2, &writeByte, 1);
		writeByte = calResults_for_vcdac_start_mid[FS_VCO4_INDEX];
		cc112xSpiWriteReg(CC112X_FS_VCO4, &writeByte, 1);
		writeByte = calResults_for_vcdac_start_mid[FS_CHP_INDEX];
		cc112xSpiWriteReg(CC112X_FS_CHP, &writeByte, 1);
	}
}

void CC1120_RX_PROCESS(void)
{
	//uint8_t rxBuffer[40] = {0};
	volatile uint8_t rxBytes, marcStatus;
	//uint32_t Sum;

	// Read number of bytes in rx fifo from NUM_RXBYTES Register
	cc112xSpiReadReg(CC112X_NUM_RXBYTES, &rxBytes, 1);

	// Check that we have bytes in fifo
	if(rxBytes != 0)
	{
		// Read marcstate to check for RX FIFO error
		cc112xSpiReadReg(CC112X_MARCSTATE, &marcStatus, 1);

		// Mask out marcstate bits and check if we have a RX FIFO error
		if((marcStatus & 0x1F) == 0x11) //RX_FIFO_ERROR
		{
			// Flush RX Fifo
			TrxSpiCmdStrobe(CC112X_SFRX);
		}
		else 	{
			// Read ALL bytes from rx fifo
			cc112xSpiReadRxFifo(&TXbytes, rxBytes);
			// Flush RX Fifo
		//	TrxSpiCmdStrobe(CC112X_SFRX);
		}
	}
}

void TI_CC_Reset(void) {
	RST_PORT_OUT &= ~CC1120_RST_BIT; // keep reset pin low
__delay_cycles(10000);
RST_PORT_OUT |= CC1120_RST_BIT; // Release reset
}

#endif


