// Rf settings for CC1200 CC1200_SETTINGS cc1200_GolfBall = { 0x06, // IOCFG3 GPIO3 IO Pin Configuration 0x06, // IOCFG2 GPIO2 IO Pin Configuration 0x30, // IOCFG1 GPIO1 IO Pin Configuration 0x01, // IOCFG0 GPIO0 IO Pin Configuration 0xA6, // SYNC3 Sync Word Configuration [31:24] ------- NB: the sync word is different here than for the CC1100 !!! 0x5A, // SYNC2 Sync Word Configuration [23:16] ------- NB: this is because the CC1100 implements manchester encoding on the sync as well 0x96, // SYNC1 Sync Word Configuration [15:8] ------- NB: whereas the CC1200 doesn't. So the sync has been changed to compensate!! 0x56, // SYNC0 Sync Word Configuration [7:0] 0xAB, // SYNC_CFG1 Sync Word Detection Configuration Reg. 1 0x00, // SYNC_CFG0 Sync Word Detection Configuration Reg. 0 0x47, // DEVIATION_M Frequency Deviation Configuration 0x1C, // MODCFG_DEV_E Modulation Format and Frequency Deviation Configur.. 0x4B, // DCFILT_CFG Digital DC Removal Configuration 0x17, // PREAMBLE_CFG1 Preamble Length Configuration Reg. 1 0x0A, // PREAMBLE_CFG0 Preamble Detection Configuration Reg. 0 0xD8, // IQIC Digital Image Channel Compensation Configuration 0x08, // CHAN_BW Channel Filter Configuration 0x60, // MDMCFG1 General Modem Parameter Configuration Reg. 1 0x05, // MDMCFG0 General Modem Parameter Configuration Reg. 0 0xA4, // SYMBOL_RATE2 Symbol Rate Configuration Exponent and Mantissa [1.. 0x7A, // SYMBOL_RATE1 Symbol Rate Configuration Mantissa [15:8] 0xE1, // SYMBOL_RATE0 Symbol Rate Configuration Mantissa [7:0] 0x2A, // AGC_REF AGC Reference Level Configuration 0x1F, // AGC_CS_THR Carrier Sense Threshold Configuration 0x00, // AGC_GAIN_ADJUST RSSI Offset Configuration 0x31, // AGC_CFG3 Automatic Gain Control Configuration Reg. 3 0x20, // AGC_CFG2 Automatic Gain Control Configuration Reg. 2 0x12, // AGC_CFG1 Automatic Gain Control Configuration Reg. 1 0x80, // AGC_CFG0 Automatic Gain Control Configuration Reg. 0 0x78, // FIFO_CFG FIFO Configuration 0x00, // DEV_ADDR Device Address Configuration 0x0B, // SETTLING_CFG Frequency Synthesizer Calibration and Settling Con.. 0x14, // FS_CFG Frequency Synthesizer Configuration 0x08, // WOR_CFG1 eWOR Configuration Reg. 1 0x21, // WOR_CFG0 eWOR Configuration Reg. 0 0x00, // WOR_EVENT0_MSB Event 0 Configuration MSB 0x00, // WOR_EVENT0_LSB Event 0 Configuration LSB 0x00, // RXDCM_TIME RX Duty Cycle Mode Configuration 0x00, // PKT_CFG2 Packet Configuration Reg. 2 0x01, // PKT_CFG1 Packet Configuration Reg. 1 0x18, // PKT_CFG0 Packet Configuration Reg. 0 0x0F, // RFEND_CFG1 RFEND Configuration Reg. 1 0x00, // RFEND_CFG0 RFEND Configuration Reg. 0 0x7F, // PA_CFG1 Power Amplifier Configuration Reg. 1 0x52, // PA_CFG0 Power Amplifier Configuration Reg. 0 0x3F, // ASK_CFG ASK Configuration 0x16, // PKT_LEN Packet Length Configuration 0x1C, // IF_MIX_CFG IF Mix Configuration 0x22, // FREQOFF_CFG Frequency Offset Correction Configuration 0x03, // TOC_CFG Timing Offset Correction Configuration 0x00, // MARC_SPARE MARC Spare 0x00, // ECG_CFG External Clock Frequency Configuration 0x02, // MDMCFG2 General Modem Parameter Configuration Reg. 2 0x01, // EXT_CTRL External Control Configuration 0x00, // RCCAL_FINE RC Oscillator Calibration Fine 0x00, // RCCAL_COARSE RC Oscillator Calibration Coarse 0x00, // RCCAL_OFFSET RC Oscillator Calibration Clock Offset 0x00, // FREQOFF1 Frequency Offset MSB 0x00, // FREQOFF0 Frequency Offset LSB 0x56, // FREQ2 Frequency Configuration [23:16] 0xE0, // FREQ1 Frequency Configuration [15:8] 0x00, // FREQ0 Frequency Configuration [7:0] 0x02, // IF_ADC2 Analog to Digital Converter Configuration Reg. 2 0xEE, // IF_ADC1 Analog to Digital Converter Configuration Reg. 1 0x10, // IF_ADC0 Analog to Digital Converter Configuration Reg. 0 0x07, // FS_DIG1 Frequency Synthesizer Digital Reg. 1 0xA5, // FS_DIG0 Frequency Synthesizer Digital Reg. 0 0x00, // FS_CAL3 Frequency Synthesizer Calibration Reg. 3 0x20, // FS_CAL2 Frequency Synthesizer Calibration Reg. 2 0x40, // FS_CAL1 Frequency Synthesizer Calibration Reg. 1 0x0E, // FS_CAL0 Frequency Synthesizer Calibration Reg. 0 0x17, // FS_CHP Frequency Synthesizer Charge Pump Configuration 0x03, // FS_DIVTWO Frequency Synthesizer Divide by 2 0x00, // FS_DSM1 FS Digital Synthesizer Module Configuration Reg. 1 0x33, // FS_DSM0 FS Digital Synthesizer Module Configuration Reg. 0 0xFF, // FS_DVC1 Frequency Synthesizer Divider Chain Configuration .. 0x17, // FS_DVC0 Frequency Synthesizer Divider Chain Configuration .. 0x00, // FS_LBI Frequency Synthesizer Local Bias Configuration 0x00, // FS_PFD Frequency Synthesizer Phase Frequency Detector Con.. 0x6E, // FS_PRE Frequency Synthesizer Prescaler Configuration 0x1C, // FS_REG_DIV_CML Frequency Synthesizer Divider Regulator Configurat.. 0xAC, // FS_SPARE Frequency Synthesizer Spare 0x13, // FS_VCO4 FS Voltage Controlled Oscillator Configuration Reg.. 0x00, // FS_VCO3 FS Voltage Controlled Oscillator Configuration Reg.. 0x4F, // FS_VCO2 FS Voltage Controlled Oscillator Configuration Reg.. 0x8C, // FS_VCO1 FS Voltage Controlled Oscillator Configuration Reg.. 0xB5, // FS_VCO0 FS Voltage Controlled Oscillator Configuration Reg.. 0x00, // GBIAS6 Global Bias Configuration Reg. 6 0x02, // GBIAS5 Global Bias Configuration Reg. 5 0x00, // GBIAS4 Global Bias Configuration Reg. 4 0x00, // GBIAS3 Global Bias Configuration Reg. 3 0x10, // GBIAS2 Global Bias Configuration Reg. 2 0x00, // GBIAS1 Global Bias Configuration Reg. 1 0x00, // GBIAS0 Global Bias Configuration Reg. 0 0x09, // IFAMP Intermediate Frequency Amplifier Configuration 0x01, // LNA Low Noise Amplifier Configuration 0x01, // RXMIX RX Mixer Configuration 0x0E, // XOSC5 Crystal Oscillator Configuration Reg. 5 0xA0, // XOSC4 Crystal Oscillator Configuration Reg. 4 0x03, // XOSC3 Crystal Oscillator Configuration Reg. 3 0x04, // XOSC2 Crystal Oscillator Configuration Reg. 2 0x03, // XOSC1 Crystal Oscillator Configuration Reg. 1 };