/*
 * Copyright (c) 2023, Texas Instruments Incorporated - http://www.ti.com
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

/*
 *  ============ ti_msp_dl_config.h =============
 *  Configured MSPM0 DriverLib module declarations
 *
 *  DO NOT EDIT - This file is generated for the MSPM0G351X
 *  by the SysConfig tool.
 */
#ifndef ti_msp_dl_config_h
#define ti_msp_dl_config_h

#define CONFIG_MSPM0G351X
#define CONFIG_MSPM0G3519

#if defined(__ti_version__) || defined(__TI_COMPILER_VERSION__)
#define SYSCONFIG_WEAK __attribute__((weak))
#elif defined(__IAR_SYSTEMS_ICC__)
#define SYSCONFIG_WEAK __weak
#elif defined(__GNUC__)
#define SYSCONFIG_WEAK __attribute__((weak))
#endif

#include <ti/devices/msp/msp.h>
#include <ti/driverlib/driverlib.h>
#include <ti/driverlib/m0p/dl_core.h>

#ifdef __cplusplus
extern "C" {
#endif

/*
 *  ======== SYSCFG_DL_init ========
 *  Perform all required MSP DL initialization
 *
 *  This function should be called once at a point before any use of
 *  MSP DL.
 */


/* clang-format off */

#define POWER_STARTUP_DELAY                                                (16)


#define GPIO_HFXT_PORT                                                     GPIOA
#define GPIO_HFXIN_PIN                                             DL_GPIO_PIN_5
#define GPIO_HFXIN_IOMUX                                         (IOMUX_PINCM10)
#define GPIO_HFXOUT_PIN                                            DL_GPIO_PIN_6
#define GPIO_HFXOUT_IOMUX                                        (IOMUX_PINCM11)
#define CPUCLK_FREQ                                                     64000000



/* Defines for DEBOUNCE_TIMER */
#define DEBOUNCE_TIMER_INST                                              (TIMA0)
#define DEBOUNCE_TIMER_INST_IRQHandler                          TIMA0_IRQHandler
#define DEBOUNCE_TIMER_INST_INT_IRQN                            (TIMA0_INT_IRQn)
#define DEBOUNCE_TIMER_INST_LOAD_VALUE                                  (31999U)




/* Defines for ADC12_1 */
#define ADC12_1_INST                                                        ADC1
#define ADC12_1_INST_IRQHandler                                  ADC1_IRQHandler
#define ADC12_1_INST_INT_IRQN                                    (ADC1_INT_IRQn)
#define ADC12_1_ADCMEM_AUX_RLY_LS_SNS                         DL_ADC12_MEM_IDX_0
#define ADC12_1_ADCMEM_AUX_RLY_LS_SNS_REF         DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_AUX_RLY_LS_SNS_REF_VOLTAGE_V                                     3.3
#define ADC12_1_ADCMEM_KEY_SENSE_ADC                          DL_ADC12_MEM_IDX_1
#define ADC12_1_ADCMEM_KEY_SENSE_ADC_REF         DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_KEY_SENSE_ADC_REF_VOLTAGE_V                                     3.3
#define ADC12_1_ADCMEM_MOSFET_TEMP                            DL_ADC12_MEM_IDX_2
#define ADC12_1_ADCMEM_MOSFET_TEMP_REF           DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_MOSFET_TEMP_REF_VOLTAGE_V                                     3.3
#define ADC12_1_ADCMEM_DOCK_1_SNS                             DL_ADC12_MEM_IDX_3
#define ADC12_1_ADCMEM_DOCK_1_SNS_REF            DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_DOCK_1_SNS_REF_VOLTAGE_V                                     3.3
#define ADC12_1_ADCMEM_BOARD_ID                               DL_ADC12_MEM_IDX_4
#define ADC12_1_ADCMEM_BOARD_ID_REF              DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_1_ADCMEM_BOARD_ID_REF_VOLTAGE_V                                     3.3
#define GPIO_ADC12_1_C0_PORT                                               GPIOA
#define GPIO_ADC12_1_C0_PIN                                       DL_GPIO_PIN_15
#define GPIO_ADC12_1_C1_PORT                                               GPIOA
#define GPIO_ADC12_1_C1_PIN                                       DL_GPIO_PIN_16
#define GPIO_ADC12_1_C2_PORT                                               GPIOA
#define GPIO_ADC12_1_C2_PIN                                       DL_GPIO_PIN_17
#define GPIO_ADC12_1_C4_PORT                                               GPIOB
#define GPIO_ADC12_1_C4_PIN                                       DL_GPIO_PIN_17
#define GPIO_ADC12_1_C5_PORT                                               GPIOB
#define GPIO_ADC12_1_C5_PIN                                       DL_GPIO_PIN_18

/* Defines for ADC12_0 */
#define ADC12_0_INST                                                        ADC0
#define ADC12_0_INST_IRQHandler                                  ADC0_IRQHandler
#define ADC12_0_INST_INT_IRQN                                    (ADC0_INT_IRQn)
#define ADC12_0_ADCMEM_AUX_BAT_POS_ADC                        DL_ADC12_MEM_IDX_0
#define ADC12_0_ADCMEM_AUX_BAT_POS_ADC_REF         DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_AUX_BAT_POS_ADC_REF_VOLTAGE_V                                     3.3
#define ADC12_0_ADCMEM_EV_OUT_SENSE                           DL_ADC12_MEM_IDX_1
#define ADC12_0_ADCMEM_EV_OUT_SENSE_REF          DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_EV_OUT_SENSE_REF_VOLTAGE_V                                     3.3
#define ADC12_0_ADCMEM_EV_IN_SENSE                            DL_ADC12_MEM_IDX_2
#define ADC12_0_ADCMEM_EV_IN_SENSE_REF           DL_ADC12_REFERENCE_VOLTAGE_VDDA
#define ADC12_0_ADCMEM_EV_IN_SENSE_REF_VOLTAGE_V                                     3.3
#define GPIO_ADC12_0_C1_PORT                                               GPIOA
#define GPIO_ADC12_0_C1_PIN                                       DL_GPIO_PIN_26
#define GPIO_ADC12_0_C0_PORT                                               GPIOA
#define GPIO_ADC12_0_C0_PIN                                       DL_GPIO_PIN_27



/* Port definition for Pin Group DO */
#define DO_PORT                                                          (GPIOB)

/* Defines for EVOUT_DISCH: GPIOB.27 with pinCMx 58 on package pin 29 */
#define DO_EVOUT_DISCH_PIN                                      (DL_GPIO_PIN_27)
#define DO_EVOUT_DISCH_IOMUX                                     (IOMUX_PINCM58)
/* Defines for KEY_CTRL: GPIOB.26 with pinCMx 57 on package pin 28 */
#define DO_KEY_CTRL_PIN                                         (DL_GPIO_PIN_26)
#define DO_KEY_CTRL_IOMUX                                        (IOMUX_PINCM57)
/* Defines for AUX_RLY_CTRL: GPIOB.25 with pinCMx 56 on package pin 27 */
#define DO_AUX_RLY_CTRL_PIN                                     (DL_GPIO_PIN_25)
#define DO_AUX_RLY_CTRL_IOMUX                                    (IOMUX_PINCM56)
/* Defines for EVOUT_DETECTION_CTRL: GPIOB.19 with pinCMx 45 on package pin 16 */
#define DO_EVOUT_DETECTION_CTRL_PIN                             (DL_GPIO_PIN_19)
#define DO_EVOUT_DETECTION_CTRL_IOMUX                            (IOMUX_PINCM45)




/* Defines for WWDT */
#define WWDT0_INST                                                       (WWDT0)
#define WWDT0_INT_IRQN                                          (WWDT0_INT_IRQn)



/* Defines for VCAN */
#define VCAN_INST                                                         CANFD0
#define GPIO_VCAN_CAN_TX_PORT                                              GPIOA
#define GPIO_VCAN_CAN_TX_PIN                                      DL_GPIO_PIN_12
#define GPIO_VCAN_IOMUX_CAN_TX                                   (IOMUX_PINCM34)
#define GPIO_VCAN_IOMUX_CAN_TX_FUNC                IOMUX_PINCM34_PF_CANFD0_CANTX
#define GPIO_VCAN_CAN_RX_PORT                                              GPIOA
#define GPIO_VCAN_CAN_RX_PIN                                      DL_GPIO_PIN_13
#define GPIO_VCAN_IOMUX_CAN_RX                                   (IOMUX_PINCM35)
#define GPIO_VCAN_IOMUX_CAN_RX_FUNC                IOMUX_PINCM35_PF_CANFD0_CANRX
#define VCAN_INST_IRQHandler                                  CANFD0_IRQHandler
#define VCAN_INST_INT_IRQN                                      CANFD0_INT_IRQn


/* Defines for VCAN MCAN RAM configuration */
#define VCAN_INST_MCAN_STD_ID_FILT_START_ADDR     (0)
#define VCAN_INST_MCAN_STD_ID_FILTER_NUM          (0)
#define VCAN_INST_MCAN_EXT_ID_FILT_START_ADDR     (0)
#define VCAN_INST_MCAN_EXT_ID_FILTER_NUM          (0)
#define VCAN_INST_MCAN_TX_BUFF_START_ADDR         (512)
#define VCAN_INST_MCAN_TX_BUFF_SIZE               (0)
#define VCAN_INST_MCAN_FIFO_1_START_ADDR          (0)
#define VCAN_INST_MCAN_FIFO_1_NUM                 (0)
#define VCAN_INST_MCAN_TX_EVENT_START_ADDR        (0)
#define VCAN_INST_MCAN_TX_EVENT_SIZE              (0)
#define VCAN_INST_MCAN_EXT_ID_AND_MASK            (0x1FFFFFFFU)
#define VCAN_INST_MCAN_RX_BUFF_START_ADDR         (0)
#define VCAN_INST_MCAN_FIFO_0_START_ADDR          (0)
#define VCAN_INST_MCAN_FIFO_0_NUM                 (32)

#define VCAN_INST_MCAN_INTERRUPTS (DL_MCAN_INTERRUPT_BO | \
						DL_MCAN_INTERRUPT_EP | \
						DL_MCAN_INTERRUPT_EW | \
						DL_MCAN_INTERRUPT_RF0N)
/* Defines for ECAN */
#define ECAN_INST                                                         CANFD1
#define GPIO_ECAN_CAN_TX_PORT                                              GPIOB
#define GPIO_ECAN_CAN_TX_PIN                                      DL_GPIO_PIN_21
#define GPIO_ECAN_IOMUX_CAN_TX                                   (IOMUX_PINCM49)
#define GPIO_ECAN_IOMUX_CAN_TX_FUNC                IOMUX_PINCM49_PF_CANFD1_CANTX
#define GPIO_ECAN_CAN_RX_PORT                                              GPIOB
#define GPIO_ECAN_CAN_RX_PIN                                      DL_GPIO_PIN_22
#define GPIO_ECAN_IOMUX_CAN_RX                                   (IOMUX_PINCM50)
#define GPIO_ECAN_IOMUX_CAN_RX_FUNC                IOMUX_PINCM50_PF_CANFD1_CANRX
#define ECAN_INST_IRQHandler                                  CANFD1_IRQHandler
#define ECAN_INST_INT_IRQN                                      CANFD1_INT_IRQn


/* Defines for ECAN MCAN RAM configuration */
#define ECAN_INST_MCAN_STD_ID_FILT_START_ADDR     (0)
#define ECAN_INST_MCAN_STD_ID_FILTER_NUM          (0)
#define ECAN_INST_MCAN_EXT_ID_FILT_START_ADDR     (0)
#define ECAN_INST_MCAN_EXT_ID_FILTER_NUM          (0)
#define ECAN_INST_MCAN_TX_BUFF_START_ADDR         (512)
#define ECAN_INST_MCAN_TX_BUFF_SIZE               (0)
#define ECAN_INST_MCAN_FIFO_1_START_ADDR          (0)
#define ECAN_INST_MCAN_FIFO_1_NUM                 (32)
#define ECAN_INST_MCAN_TX_EVENT_START_ADDR        (0)
#define ECAN_INST_MCAN_TX_EVENT_SIZE              (0)
#define ECAN_INST_MCAN_EXT_ID_AND_MASK            (0x1FFFFFFFU)
#define ECAN_INST_MCAN_RX_BUFF_START_ADDR         (0)
#define ECAN_INST_MCAN_FIFO_0_START_ADDR          (0)
#define ECAN_INST_MCAN_FIFO_0_NUM                 (0)

#define ECAN_INST_MCAN_INTERRUPTS (DL_MCAN_INTERRUPT_BO | \
						DL_MCAN_INTERRUPT_EP | \
						DL_MCAN_INTERRUPT_EW | \
						DL_MCAN_INTERRUPT_RF1N)



/* clang-format on */

void SYSCFG_DL_init(void);
void SYSCFG_DL_initPower(void);
void SYSCFG_DL_GPIO_init(void);
void SYSCFG_DL_SYSCTL_init(void);
void SYSCFG_DL_DEBOUNCE_TIMER_init(void);
void SYSCFG_DL_ADC12_1_init(void);
void SYSCFG_DL_ADC12_0_init(void);

void SYSCFG_DL_SYSTICK_init(void);
void SYSCFG_DL_WWDT0_init(void);
void SYSCFG_DL_VCAN_init(void);
void SYSCFG_DL_ECAN_init(void);

bool SYSCFG_DL_saveConfiguration(void);
bool SYSCFG_DL_restoreConfiguration(void);

#ifdef __cplusplus
}
#endif

#endif /* ti_msp_dl_config_h */
