/*
 * Copyright (c) 2021, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "ti_msp_dl_config.h"

static volatile uint32_t u32_ticks = 1000U;
static volatile bool bln_triggerSpi = false;
static uint8_t u08_spiTxBuff[] = "0123456789";

void SysTick_Handler(void)
{
    if ( (0U == --u32_ticks) )
    {
        u32_ticks = 1000U;
        bln_triggerSpi = true;
        //DL_GPIO_togglePins(GPIOB, DL_GPIO_PIN_27);
    }
}

void DMA_IRQHandler(void)
{
    uint8_t _u08_interruptIdx = DL_DMA_getPendingInterrupt(DMA);
    switch (_u08_interruptIdx)
    {
        case DL_DMA_EVENT_IIDX_DMACH0:
        {
            /* Restart DMA */
            uint8_t _u08_dummy = 0U;
            _u08_dummy++;
            _u08_dummy++;
        }
        break;

        case DL_DMA_EVENT_IIDX_DMACH1:
        {
            /* Restart DMA */
            uint8_t _u08_dummy = 0U;
            _u08_dummy++;
            _u08_dummy++;
        }
        break;

        default:
        {

        }
        break;
    }
}

int main(void)
{
    SYSCFG_DL_init();
    /* Enable interrupts to fire when DMA transfer is done. */
    NVIC_EnableIRQ(DMA_INT_IRQn);

    while (1) 
    {
        if ( bln_triggerSpi )
        {
            DL_DMA_setSrcAddr(DMA, DMA_CH0_CHAN_ID, (uint32_t)u08_spiTxBuff);
            DL_DMA_setDestAddr(DMA, DMA_CH0_CHAN_ID, (uint32_t)&SPI_0_INST->TXDATA);
            DL_DMA_setTransferSize(DMA, DMA_CH0_CHAN_ID, sizeof(u08_spiTxBuff));
            DL_DMA_enableChannel(DMA, DMA_CH0_CHAN_ID);
            bln_triggerSpi = false;
        }
    }
}