/*****************************************************************************/ /* STDINT.H */ /* */ /* Copyright (c) 2002 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ /*****************************************************************************/ /* _ti_config.h */ /* */ /* Copyright (c) 2017 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ /*Unsupported pragmas are omitted */ # pragma diag_push # pragma CHECK_MISRA("-19.7") # pragma CHECK_MISRA("-19.4") # pragma CHECK_MISRA("-19.1") # pragma CHECK_MISRA("-19.15") # pragma diag_pop _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.4\")") _Pragma("CHECK_MISRA(\"-19.1\")") _Pragma("CHECK_MISRA(\"-19.6\")") /* Hide uses of the TI proprietary macros behind other macros. Implementations that don't implement these features should leave these macros undefined. */ /* Common definitions */ /* C */ /* C89/C99 */ /* _TI_NOEXCEPT_CPP14 is defined to noexcept only when compiling for C++14. It is intended to be used for functions like abort and atexit that are supposed to be declared noexcept only in C++14 mode. */ /* Target-specific definitions */ /*****************************************************************************/ /* linkage.h */ /* */ /* Copyright (c) 1998 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ #pragma diag_push #pragma CHECK_MISRA("-19.4") /* macros required for implementation */ /* No modifiers are needed to access code or data */ /*--------------------------------------------------------------------------*/ /* Define _IDECL ==> how inline functions are declared */ /*--------------------------------------------------------------------------*/ #pragma diag_pop _Pragma("diag_pop") _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.1\")") /* no code before #include */ _Pragma("CHECK_MISRA(\"-19.7\")") /* prefer functions to macros */ /*****************************************************************************/ /* _STDINT40.H */ /* */ /* Copyright (c) 2018 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.7\")") /* prefer functions to macros */ /* According to footnotes in the 1999 C standard, "C++ implementations should define these macros only when __STDC_LIMIT_MACROS is defined before is included." */ _Pragma("diag_pop") /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2001 Mike Barcroft * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /*- * SPDX-License-Identifier: BSD-3-Clause * * Copyright (c) 1991, 1993 * The Regents of the University of California. All rights reserved. * * This code is derived from software contributed to Berkeley by * Berkeley Software Design, Inc. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * @(#)cdefs.h 8.8 (Berkeley) 1/9/95 * $FreeBSD$ */ _Pragma("diag_push") _Pragma("CHECK_MISRA(\"none\")") /* * Testing against Clang-specific extensions. */ /* * This code has been put in place to help reduce the addition of * compiler specific defines in FreeBSD code. It helps to aid in * having a compiler-agnostic source tree. */ /* * Macro to test if we're using a specific version of gcc or later. */ /* * The __CONCAT macro is used to concatenate parts of symbol names, e.g. * with "#define OLD(foo) __CONCAT(old,foo)", OLD(foo) produces oldfoo. * The __CONCAT macro is a bit tricky to use if it must work in non-ANSI * mode -- there must be no spaces between its arguments, and for nested * __CONCAT's, all the __CONCAT's must be at the left. __CONCAT can also * concatenate double-quoted strings produced by the __STRING macro, but * this only works with ANSI C. * * __XSTRING is like __STRING, but it expands any macros in its argument * first. It is only available with ANSI C. */ /* * Compiler-dependent macros to help declare dead (non-returning) and * pure (no side effects) functions, and unused variables. They are * null except for versions of gcc that are known to support the features * properly (old versions of gcc-2 supported the dead and pure features * in a different (wrong) way). If we do not provide an implementation * for a given compiler, let the compile fail if it is told to use * a feature that we cannot live without. */ /* * TI ADD - check that __GNUC__ is defined before referencing it to avoid * generating an error when __GNUC__ treated as zero warning is * promoted to an error via -pdse195 option. */ /* * Keywords added in C11. */ /* * XXX: Some compilers (Clang 3.3, GCC 4.7) falsely announce C++11 mode * without actually supporting the thread_local keyword. Don't check for * the presence of C++11 when defining _Thread_local. */ /* * Emulation of C11 _Generic(). Unlike the previously defined C11 * keywords, it is not possible to implement this using exactly the same * syntax. Therefore implement something similar under the name * __generic(). Unlike _Generic(), this macro can only distinguish * between a single type, so it requires nested invocations to * distinguish multiple cases. */ /* * C99 Static array indices in function parameter declarations. Syntax such as: * void bar(int myArray[static 10]); * is allowed in C99 but not in C++. Define __min_size appropriately so * headers using it can be compiled in either language. Use like this: * void bar(int myArray[__min_size(10)]); */ /* XXX: should use `#if __STDC_VERSION__ < 199901'. */ /* C++11 exposes a load of C99 stuff */ /* * GCC 2.95 provides `__restrict' as an extension to C90 to support the * C99-specific `restrict' type qualifier. We happen to use `__restrict' as * a way to define the `restrict' type qualifier without disturbing older * software that is unaware of C99 keywords. * The TI compiler supports __restrict in all compilation modes. */ /* * GNU C version 2.96 adds explicit branch prediction so that * the CPU back-end can hint the processor and also so that * code blocks can be reordered such that the predicted path * sees a more linear flow, thus improving cache behavior, etc. * * The following two macros provide us with a way to utilize this * compiler feature. Use __predict_true() if you expect the expression * to evaluate to true, and __predict_false() if you expect the * expression to evaluate to false. * * A few notes about usage: * * * Generally, __predict_false() error condition checks (unless * you have some _strong_ reason to do otherwise, in which case * document it), and/or __predict_true() `no-error' condition * checks, assuming you want to optimize for the no-error case. * * * Other than that, if you don't know the likelihood of a test * succeeding from empirical or other `hard' evidence, don't * make predictions. * * * These are meant to be used in places that are run `a lot'. * It is wasteful to make predictions in code that is run * seldomly (e.g. at subsystem initialization time) as the * basic block reordering that this affects can often generate * larger code. */ /* * We define this here since , , and * require it. */ /* * Given the pointer x to the member m of the struct s, return * a pointer to the containing structure. When using GCC, we first * assign pointer x to a local variable, to check that its type is * compatible with member m. */ /* * Compiler-dependent macros to declare that functions take printf-like * or scanf-like arguments. They are null except for versions of gcc * that are known to support the features properly (old versions of gcc-2 * didn't permit keeping the keywords out of the application namespace). */ /* Compiler-dependent macros that rely on FreeBSD-specific extensions. */ /* * The following definition might not work well if used in header files, * but it should be better than nothing. If you want a "do nothing" * version, then it should generate some harmless declaration, such as: * #define __IDSTRING(name,string) struct __hack */ /* * Embed the rcs id of a source file in the resulting library. Note that in * more recent ELF binutils, we use .ident allowing the ID to be stripped. * Usage: * __FBSDID("$FreeBSD$"); */ /*- * The following definitions are an extension of the behavior originally * implemented in , but with a different level of granularity. * POSIX.1 requires that the macros we test be defined before any standard * header file is included. * * Here's a quick run-down of the versions: * defined(_POSIX_SOURCE) 1003.1-1988 * _POSIX_C_SOURCE == 1 1003.1-1990 * _POSIX_C_SOURCE == 2 1003.2-1992 C Language Binding Option * _POSIX_C_SOURCE == 199309 1003.1b-1993 * _POSIX_C_SOURCE == 199506 1003.1c-1995, 1003.1i-1995, * and the omnibus ISO/IEC 9945-1: 1996 * _POSIX_C_SOURCE == 200112 1003.1-2001 * _POSIX_C_SOURCE == 200809 1003.1-2008 * * In addition, the X/Open Portability Guide, which is now the Single UNIX * Specification, defines a feature-test macro which indicates the version of * that specification, and which subsumes _POSIX_C_SOURCE. * * Our macros begin with two underscores to avoid namespace screwage. */ /* Deal with IEEE Std. 1003.1-1990, in which _POSIX_C_SOURCE == 1. */ /* Deal with IEEE Std. 1003.2-1992, in which _POSIX_C_SOURCE == 2. */ /* Deal with various X/Open Portability Guides and Single UNIX Spec. */ /* * Deal with all versions of POSIX. The ordering relative to the tests above is * important. */ /*- * Deal with _ANSI_SOURCE: * If it is defined, and no other compilation environment is explicitly * requested, then define our internal feature-test macros to zero. This * makes no difference to the preprocessor (undefined symbols in preprocessing * expressions are defined to have value zero), but makes it more convenient for * a test program to print out the values. * * If a program mistakenly defines _ANSI_SOURCE and some other macro such as * _POSIX_C_SOURCE, we will assume that it wants the broader compilation * environment (and in fact we will never get here). */ /* User override __EXT1_VISIBLE */ /* * Old versions of GCC use non-standard ARM arch symbols; acle-compat.h * translates them to __ARM_ARCH and the modern feature symbols defined by ARM. */ /* * Nullability qualifiers: currently only supported by Clang. */ /* * Type Safety Checking * * Clang provides additional attributes to enable checking type safety * properties that cannot be enforced by the C type system. */ /* * Lock annotations. * * Clang provides support for doing basic thread-safety tests at * compile-time, by marking which locks will/should be held when * entering/leaving a functions. * * Furthermore, it is also possible to annotate variables and structure * members to enforce that they are only accessed when certain locks are * held. */ /* Structure implements a lock. */ /* Function acquires an exclusive or shared lock. */ /* Function attempts to acquire an exclusive or shared lock. */ /* Function releases a lock. */ /* Function asserts that an exclusive or shared lock is held. */ /* Function requires that an exclusive or shared lock is or is not held. */ /* Function should not be analyzed. */ /* Guard variables and structure members by lock. */ _Pragma("diag_pop") /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2002 Mike Barcroft * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ /*****************************************************************************/ /* _TYPES.H */ /* */ /* Copyright (c) 2017 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ #pragma diag_push /* This file is required to use base types */ #pragma CHECK_MISRA("-6.3") /* * Basic types upon which most other types are built. */ typedef signed char __int8_t; typedef unsigned char __uint8_t; typedef int __int16_t; typedef unsigned int __uint16_t; typedef long __int32_t; typedef unsigned long __uint32_t; /* LONGLONG */ typedef long long __int64_t; /* LONGLONG */ typedef unsigned long long __uint64_t; /* * Standard type definitions. */ typedef __uint32_t __clock_t; /* clock()... */ typedef __int32_t __critical_t; typedef double __double_t; typedef float __float_t; typedef __int32_t __intfptr_t; typedef __int64_t __intmax_t; typedef __int32_t __intptr_t; typedef __int16_t __int_fast8_t; typedef __int16_t __int_fast16_t; typedef __int32_t __int_fast32_t; typedef __int64_t __int_fast64_t; typedef __int8_t __int_least8_t; typedef __int16_t __int_least16_t; typedef __int32_t __int_least32_t; typedef __int64_t __int_least64_t; typedef int __ptrdiff_t; /* ptr1 - ptr2 */ typedef __int16_t __register_t; typedef __int32_t __segsz_t; /* segment size (in pages) */ typedef unsigned __size_t; /* sizeof() */ typedef __int32_t __ssize_t; /* byte count or error */ typedef __uint32_t __time_t; typedef __uint32_t __uintfptr_t; typedef __uint64_t __uintmax_t; typedef __uint32_t __uintptr_t; typedef __uint16_t __uint_fast8_t; typedef __uint16_t __uint_fast16_t; typedef __uint32_t __uint_fast32_t; typedef __uint64_t __uint_fast64_t; typedef __uint8_t __uint_least8_t; typedef __uint16_t __uint_least16_t; typedef __uint32_t __uint_least32_t; typedef __uint64_t __uint_least64_t; typedef __uint16_t __u_register_t; typedef __uint32_t __vm_offset_t; typedef __uint32_t __vm_paddr_t; typedef __uint32_t __vm_size_t; typedef unsigned int ___wchar_t; /* * POSIX target specific _off_t type definition */ typedef long int _off_t; /* * Unusual type definitions. */ typedef char* __va_list; #pragma diag_pop _Pragma("diag_push") /* This file is required to use types without size and signedness */ _Pragma("CHECK_MISRA(\"-6.3\")") /* * Standard type definitions. */ typedef __int32_t __blksize_t; /* file block size */ typedef __int64_t __blkcnt_t; /* file block count */ typedef __int32_t __clockid_t; /* clock_gettime()... */ typedef __uint32_t __fflags_t; /* file flags */ typedef __uint64_t __fsblkcnt_t; typedef __uint64_t __fsfilcnt_t; typedef __uint32_t __gid_t; typedef __int64_t __id_t; /* can hold a gid_t, pid_t, or uid_t */ typedef __uint64_t __ino_t; /* inode number */ typedef long __key_t; /* IPC key (for Sys V IPC) */ typedef __int32_t __lwpid_t; /* Thread ID (a.k.a. LWP) */ typedef __uint16_t __mode_t; /* permissions */ typedef int __accmode_t; /* access permissions */ typedef int __nl_item; typedef __uint64_t __nlink_t; /* link count */ typedef _off_t __off_t; /* file offset (target-specific) */ typedef __int64_t __off64_t; /* file offset (always 64-bit) */ typedef __int32_t __pid_t; /* process [group] */ typedef __int64_t __rlim_t; /* resource limit - intentionally */ /* signed, because of legacy code */ /* that uses -1 for RLIM_INFINITY */ typedef __uint8_t __sa_family_t; typedef __uint32_t __socklen_t; typedef long __suseconds_t; /* microseconds (signed) */ typedef struct __timer *__timer_t; /* timer_gettime()... */ typedef struct __mq *__mqd_t; /* mq_open()... */ typedef __uint32_t __uid_t; typedef unsigned int __useconds_t; /* microseconds (unsigned) */ typedef int __cpuwhich_t; /* which parameter for cpuset. */ typedef int __cpulevel_t; /* level parameter for cpuset. */ typedef int __cpusetid_t; /* cpuset identifier. */ /* * Unusual type definitions. */ /* * rune_t is declared to be an ``int'' instead of the more natural * ``unsigned long'' or ``long''. Two things are happening here. It is not * unsigned so that EOF (-1) can be naturally assigned to it and used. Also, * it looks like 10646 will be a 31 bit standard. This means that if your * ints cannot hold 32 bits, you will be in trouble. The reason an int was * chosen over a long is that the is*() and to*() routines take ints (says * ANSI C), but they use __ct_rune_t instead of int. * * NOTE: rune_t is not covered by ANSI nor other standards, and should not * be instantiated outside of lib/libc/locale. Use wchar_t. wint_t and * rune_t must be the same type. Also, wint_t should be able to hold all * members of the largest character set plus one extra value (WEOF), and * must be at least 16 bits. */ typedef int __ct_rune_t; /* arg type for ctype funcs */ typedef __ct_rune_t __rune_t; /* rune_t (see above) */ typedef __ct_rune_t __wint_t; /* wint_t (see above) */ /* Clang already provides these types as built-ins, but only in C++ mode. */ typedef __uint_least16_t __char16_t; typedef __uint_least32_t __char32_t; /* In C++11, char16_t and char32_t are built-in types. */ typedef struct { long long __max_align1 __attribute__((aligned(__alignof__(long long)))); long double __max_align2 __attribute__((aligned(__alignof__(long double)))); } __max_align_t; typedef __uint64_t __dev_t; /* device number */ typedef __uint32_t __fixpt_t; /* fixed point number */ /* * mbstate_t is an opaque object to keep conversion state during multibyte * stream conversions. */ typedef int _Mbstatet; typedef _Mbstatet __mbstate_t; typedef __uintmax_t __rman_res_t; /* * When the following macro is defined, the system uses 64-bit inode numbers. * Programs can use this to avoid including , with its associated * namespace pollution. */ _Pragma("diag_pop") /*****************************************************************************/ /* _STDINT.H */ /* */ /* Copyright (c) 2017 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ /*- * SPDX-License-Identifier: BSD-2-Clause-NetBSD * * Copyright (c) 2001, 2002 Mike Barcroft * Copyright (c) 2001 The NetBSD Foundation, Inc. * All rights reserved. * * This code is derived from software contributed to The NetBSD Foundation * by Klaus Klein. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * POSSIBILITY OF SUCH DAMAGE. * * $FreeBSD$ */ #pragma diag_push /* 19.4 is issued for macros that are defined in terms of other macros. */ #pragma CHECK_MISRA("-19.4") #pragma CHECK_MISRA("-19.7") #pragma CHECK_MISRA("-19.13") /* * ISO/IEC 9899:1999 * 7.18.2.1 Limits of exact-width integer types */ /* Minimum values of exact-width signed integer types. */ /* Maximum values of exact-width signed integer types. */ /* Maximum values of exact-width unsigned integer types. */ /* * ISO/IEC 9899:1999 * 7.18.2.2 Limits of minimum-width integer types */ /* Minimum values of minimum-width signed integer types. */ /* Maximum values of minimum-width signed integer types. */ /* Maximum values of minimum-width unsigned integer types. */ /* * ISO/IEC 9899:1999 * 7.18.2.3 Limits of fastest minimum-width integer types */ /* Minimum values of fastest minimum-width signed integer types. */ /* Maximum values of fastest minimum-width signed integer types. */ /* Maximum values of fastest minimum-width unsigned integer types. */ /* * ISO/IEC 9899:1999 * 7.18.2.4 Limits of integer types capable of holding object pointers */ /* * ISO/IEC 9899:1999 * 7.18.2.5 Limits of greatest-width integer types */ /* * ISO/IEC 9899:1999 * 7.18.3 Limits of other integer types */ /* Limits of ptrdiff_t. */ /* Limits of sig_atomic_t. */ /* Limit of size_t. */ /* Limits of wint_t. */ #pragma diag_pop /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2011 David E. O'Brien * Copyright (c) 2001 Mike Barcroft * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ typedef __int8_t int8_t; typedef __int16_t int16_t; typedef __int32_t int32_t; typedef __int64_t int64_t; typedef __uint8_t uint8_t; typedef __uint16_t uint16_t; typedef __uint32_t uint32_t; typedef __uint64_t uint64_t; typedef __intptr_t intptr_t; typedef __uintptr_t uintptr_t; typedef __intmax_t intmax_t; typedef __uintmax_t uintmax_t; typedef __int_least8_t int_least8_t; typedef __int_least16_t int_least16_t; typedef __int_least32_t int_least32_t; typedef __int_least64_t int_least64_t; typedef __uint_least8_t uint_least8_t; typedef __uint_least16_t uint_least16_t; typedef __uint_least32_t uint_least32_t; typedef __uint_least64_t uint_least64_t; typedef __int_fast8_t int_fast8_t; typedef __int_fast16_t int_fast16_t; typedef __int_fast32_t int_fast32_t; typedef __int_fast64_t int_fast64_t; typedef __uint_fast8_t uint_fast8_t; typedef __uint_fast16_t uint_fast16_t; typedef __uint_fast32_t uint_fast32_t; typedef __uint_fast64_t uint_fast64_t; _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-10.1\")") /* GNU and Darwin define this and people seem to think it's portable */ _Pragma("diag_pop") _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.4\")") /* Limits of wchar_t. */ _Pragma("diag_pop") /* ISO/IEC 9899:2011 K.3.4.4 */ _Pragma("diag_pop") /*****************************************************************************/ /* string.h */ /* */ /* Copyright (c) 1993 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-6.3\")") /* standard types required for standard headers */ _Pragma("CHECK_MISRA(\"-19.1\")") /* #includes required for implementation */ _Pragma("CHECK_MISRA(\"-20.1\")") /* standard headers must define standard names */ _Pragma("CHECK_MISRA(\"-20.2\")") /* standard headers must define standard names */ typedef unsigned size_t; _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.4\")") /* macros required for implementation */ _Pragma("diag_pop") size_t strlen(const char *string); char *strcpy(char * __restrict dest, const char * __restrict src); char *strncpy(char * __restrict dest, const char * __restrict src, size_t n); char *strcat(char * __restrict string1, const char * __restrict string2); char *strncat(char * __restrict dest, const char * __restrict src, size_t n); char *strchr(const char *string, int c); char *strrchr(const char *string, int c); int strcmp(const char *string1, const char *string2); int strncmp(const char *string1, const char *string2, size_t n); int strcoll(const char *string1, const char *_string2); size_t strxfrm(char * __restrict to, const char * __restrict from, size_t n); char *strpbrk(const char *string, const char *chs); size_t strspn(const char *string, const char *chs); size_t strcspn(const char *string, const char *chs); char *strstr(const char *string1, const char *string2); char *strtok(char * __restrict str1, const char * __restrict str2); char *strerror(int _errno); char *strdup(const char *string); void *memmove(void *s1, const void *s2, size_t n); void *memccpy(void *dest, const void *src, int ch, size_t count); _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-16.4\")") /* false positives due to builtin declarations */ void *memcpy(void * __restrict s1, const void * __restrict s2, size_t n); _Pragma("diag_pop") int memcmp(const void *cs, const void *ct, size_t n); void *memchr(const void *cs, int c, size_t n); void *memset(void *mem, int ch, size_t length); /*----------------------------------------------------------------------------*/ /* If sys/cdefs.h is available, go ahead and include it. xlocale.h assumes */ /* this file will have already included sys/cdefs.h. */ /*----------------------------------------------------------------------------*/ /*----------------------------------------------------------------------------*/ /* Include xlocale/_string.h if POSIX is enabled. This will expose the */ /* xlocale string interface. */ /*----------------------------------------------------------------------------*/ /*- * SPDX-License-Identifier: BSD-2-Clause-FreeBSD * * Copyright (c) 2011, 2012 The FreeBSD Foundation * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD$ */ typedef struct _xlocale *locale_t; /* * This file is included from both string.h and xlocale.h. We need to expose * the declarations unconditionally if we are included from xlocale.h, but only * if we are in POSIX2008 mode if included from string.h. */ /* * POSIX2008 functions */ int strcoll_l(const char *, const char *, locale_t); size_t strxfrm_l(char *, const char *, size_t, locale_t); /* * xlocale extensions */ char *stpcpy(char * __restrict, const char * __restrict); char *stpncpy(char * __restrict, const char * __restrict, size_t); _Pragma("diag_pop") /******************************************************************* * * * This file is a generic include file controlled by * * compiler/assembler IDE generated defines * * * *******************************************************************/ //***************************************************************************** // // Copyright (C) 2012 - 2021 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. //**************************************************************************** /******************************************************************** * * Standard register and bit definitions for the Texas Instruments * MSP430 microcontroller. * * This file supports assembler and C development for * MSP430FR2355 devices. * ********************************************************************/ /* ============================================================================ */ /* Copyright (c) 2013, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* * Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* * Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in the */ /* documentation and/or other materials provided with the distribution. */ /* */ /* * Neither the name of Texas Instruments Incorporated nor the names of */ /* its contributors may be used to endorse or promote products derived */ /* from this software without specific prior written permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* ============================================================================ */ /*----------------------------------------------------------------------------*/ /* INTRINSIC MAPPING FOR IAR V1.XX */ /*----------------------------------------------------------------------------*/ /* External references resolved by a device-specific linker command file */ //#define SFR_20BIT(address) extern volatile unsigned int address typedef void (* __SFR_FARPTR)(); /************************************************************ * STANDARD BITS ************************************************************/ /************************************************************ * STATUS REGISTER BITS ************************************************************/ /* Low Power Modes coded with Bits 4-7 in SR */ /*****************************************************************************/ /* INTRINSICS.H */ /* */ /* Copyright (c) 2005 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ /*---------------------------------------------------------------------------*/ /* Handle legacy conflicts */ /*---------------------------------------------------------------------------*/ /*****************************************************************************/ /* INTRINSICS_LEGACY_UNDEFS.H */ /* */ /* Copyright (c) 2005 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ /*---------------------------------------------------------------------------*/ /* Handle in430.h conflicts with legacy intrinsic names */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* General MSP Intrinsics */ /*---------------------------------------------------------------------------*/ void __no_operation(void); unsigned short __bic_SR_register (unsigned short mask); unsigned short __bic_SR_register_on_exit (unsigned short mask); unsigned short __bis_SR_register (unsigned short mask); unsigned short __bis_SR_register_on_exit (unsigned short mask); unsigned short __get_SR_register (void); unsigned short __get_SR_register_on_exit (void); unsigned short __get_SP_register(void); void __set_SP_register(unsigned short value); void __delay_cycles(unsigned long cycles); unsigned int __even_in_range(unsigned int val, unsigned int range); void __op_code(unsigned short op); /*---------------------------------------------------------------------------*/ /* General MSP Macros */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* MSP430/430X Intrinsics */ /*---------------------------------------------------------------------------*/ void __disable_interrupt(void); void __enable_interrupt(void); void __set_interrupt_state(unsigned short state); unsigned short __get_R4_register(void); void __set_R4_register(unsigned short value); unsigned short __get_R5_register(void); void __set_R5_register(unsigned short value); unsigned short __bcd_add_short(unsigned short, unsigned short); unsigned long __bcd_add_long(unsigned long, unsigned long); unsigned short __swap_bytes(unsigned short a); /*---------------------------------------------------------------------------*/ /* MSP430/430X Macros */ /*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/ /* MSP430X Intrinsics */ /*---------------------------------------------------------------------------*/ void __data16_write_addr(unsigned short, unsigned long); unsigned long __data16_read_addr(unsigned short); void __data20_write_char(unsigned long, unsigned char); void __data20_write_short(unsigned long, unsigned short); void __data20_write_long(unsigned long, unsigned long); unsigned char __data20_read_char(unsigned long); unsigned short __data20_read_short(unsigned long); unsigned long __data20_read_long(unsigned long); /*---------------------------------------------------------------------------*/ /* Legacy Macros */ /*---------------------------------------------------------------------------*/ /************************************************************ * PERIPHERAL FILE MAP ************************************************************/ /***************************************************************************** ADC Registers *****************************************************************************/ extern volatile unsigned int ADCCTL0; /* ADC Control 0 */ extern volatile unsigned char ADCCTL0_L; extern volatile unsigned char ADCCTL0_H; extern volatile unsigned int ADCCTL1; /* ADC Control 1 */ extern volatile unsigned char ADCCTL1_L; extern volatile unsigned char ADCCTL1_H; extern volatile unsigned int ADCCTL2; /* ADC Control 2 */ extern volatile unsigned char ADCCTL2_L; extern volatile unsigned char ADCCTL2_H; extern volatile unsigned int ADCLO; /* ADC Window Comparator Low Threshold Register */ extern volatile unsigned char ADCLO_L; extern volatile unsigned char ADCLO_H; extern volatile unsigned int ADCHI; /* ADC Window Comparator High Threshold Register */ extern volatile unsigned char ADCHI_L; extern volatile unsigned char ADCHI_H; extern volatile unsigned int ADCMCTL0; /* ADC Conversion Memory Control Register */ extern volatile unsigned char ADCMCTL0_L; extern volatile unsigned char ADCMCTL0_H; extern volatile unsigned int ADCMEM0; /* ADC Conversion Memory Register */ extern volatile unsigned char ADCMEM0_L; extern volatile unsigned char ADCMEM0_H; extern volatile unsigned int ADCIE; /* ADC Interrupt Enable 0 */ extern volatile unsigned char ADCIE_L; extern volatile unsigned char ADCIE_H; extern volatile unsigned int ADCIFG; /* ADC Interrupt Flag */ extern volatile unsigned char ADCIFG_L; extern volatile unsigned char ADCIFG_H; extern volatile unsigned int ADCIV; /* ADC Interrupt Vector */ extern volatile unsigned char ADCIV_L; extern volatile unsigned char ADCIV_H; /* ADC Register Offsets */ /* ADC Control Bits */ /* ADCCTL0 Control Bits */ /* ADCCTL1 Control Bits */ /* ADCCTL2 Control Bits */ /* ADCLO Control Bits */ /* ADCHI Control Bits */ /* ADCMCTL0 Control Bits */ /* ADCMEM0 Control Bits */ /* ADCIE Control Bits */ /* ADCIFG Control Bits */ /* ADCIV Control Bits */ /***************************************************************************** BKMEM Registers *****************************************************************************/ extern volatile unsigned int BAKMEM0; /* Backup Memory registers. Backup Memory 0. */ extern volatile unsigned char BAKMEM0_L; extern volatile unsigned char BAKMEM0_H; extern volatile unsigned int BAKMEM1; /* Backup Memory 1. */ extern volatile unsigned char BAKMEM1_L; extern volatile unsigned char BAKMEM1_H; extern volatile unsigned int BAKMEM2; /* Backup Memory 2. */ extern volatile unsigned char BAKMEM2_L; extern volatile unsigned char BAKMEM2_H; extern volatile unsigned int BAKMEM3; /* Backup Memory 3. */ extern volatile unsigned char BAKMEM3_L; extern volatile unsigned char BAKMEM3_H; extern volatile unsigned int BAKMEM4; /* Backup Memory 4. */ extern volatile unsigned char BAKMEM4_L; extern volatile unsigned char BAKMEM4_H; extern volatile unsigned int BAKMEM5; /* Backup Memory 5. */ extern volatile unsigned char BAKMEM5_L; extern volatile unsigned char BAKMEM5_H; extern volatile unsigned int BAKMEM6; /* Backup Memory 6. */ extern volatile unsigned char BAKMEM6_L; extern volatile unsigned char BAKMEM6_H; extern volatile unsigned int BAKMEM7; /* Backup Memory 7. */ extern volatile unsigned char BAKMEM7_L; extern volatile unsigned char BAKMEM7_H; extern volatile unsigned int BAKMEM8; /* Backup Memory 8. */ extern volatile unsigned char BAKMEM8_L; extern volatile unsigned char BAKMEM8_H; extern volatile unsigned int BAKMEM9; /* Backup Memory 9. */ extern volatile unsigned char BAKMEM9_L; extern volatile unsigned char BAKMEM9_H; extern volatile unsigned int BAKMEM10; /* Backup Memory registers. Backup Memory 10. */ extern volatile unsigned char BAKMEM10_L; extern volatile unsigned char BAKMEM10_H; extern volatile unsigned int BAKMEM11; /* Backup Memory 11. */ extern volatile unsigned char BAKMEM11_L; extern volatile unsigned char BAKMEM11_H; extern volatile unsigned int BAKMEM12; /* Backup Memory 12. */ extern volatile unsigned char BAKMEM12_L; extern volatile unsigned char BAKMEM12_H; extern volatile unsigned int BAKMEM13; /* Backup Memory 13. */ extern volatile unsigned char BAKMEM13_L; extern volatile unsigned char BAKMEM13_H; extern volatile unsigned int BAKMEM14; /* Backup Memory 14. */ extern volatile unsigned char BAKMEM14_L; extern volatile unsigned char BAKMEM14_H; extern volatile unsigned int BAKMEM15; /* Backup Memory 15. */ extern volatile unsigned char BAKMEM15_L; extern volatile unsigned char BAKMEM15_H; /* BKMEM Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** CAPTIO Registers *****************************************************************************/ extern volatile unsigned int CAPTIOCTL; /* Capacitive Touch IO x Control Register */ extern volatile unsigned char CAPTIOCTL_L; extern volatile unsigned char CAPTIOCTL_H; /* CAPTIO Register Offsets */ /* CAPTIO Control Bits */ /* CAPTIOCTL Control Bits */ /***************************************************************************** CRC Registers *****************************************************************************/ extern volatile unsigned int CRCDI; /* CRC Data In */ extern volatile unsigned char CRCDI_L; extern volatile unsigned char CRCDI_H; extern volatile unsigned int CRCDIRB; /* CRC Data In Reverse Byte */ extern volatile unsigned char CRCDIRB_L; extern volatile unsigned char CRCDIRB_H; extern volatile unsigned int CRCINIRES; /* CRC Initialization and Result */ extern volatile unsigned char CRCINIRES_L; extern volatile unsigned char CRCINIRES_H; extern volatile unsigned int CRCRESR; /* CRC Result Reverse */ extern volatile unsigned char CRCRESR_L; extern volatile unsigned char CRCRESR_H; /* CRC Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** CS Registers *****************************************************************************/ extern volatile unsigned int CSCTL0; /* Clock System Control 0 */ extern volatile unsigned char CSCTL0_L; extern volatile unsigned char CSCTL0_H; extern volatile unsigned int CSCTL1; /* Clock System Control 1 */ extern volatile unsigned char CSCTL1_L; extern volatile unsigned char CSCTL1_H; extern volatile unsigned int CSCTL2; /* Clock System Control 2 */ extern volatile unsigned char CSCTL2_L; extern volatile unsigned char CSCTL2_H; extern volatile unsigned int CSCTL3; /* Clock System Control 3 */ extern volatile unsigned char CSCTL3_L; extern volatile unsigned char CSCTL3_H; extern volatile unsigned int CSCTL4; /* Clock System Control 4 */ extern volatile unsigned char CSCTL4_L; extern volatile unsigned char CSCTL4_H; extern volatile unsigned int CSCTL5; /* Clock System Control 5 */ extern volatile unsigned char CSCTL5_L; extern volatile unsigned char CSCTL5_H; extern volatile unsigned int CSCTL6; /* Clock System Control 6 */ extern volatile unsigned char CSCTL6_L; extern volatile unsigned char CSCTL6_H; extern volatile unsigned int CSCTL7; /* Clock System Control Register 7 */ extern volatile unsigned char CSCTL7_L; extern volatile unsigned char CSCTL7_H; extern volatile unsigned int CSCTL8; /* Clock System Control Register 8 */ extern volatile unsigned char CSCTL8_L; extern volatile unsigned char CSCTL8_H; /* CS Register Offsets */ /* CS Control Bits */ /* CSCTL0 Control Bits */ /* CSCTL1 Control Bits */ /* CSCTL2 Control Bits */ /* CSCTL3 Control Bits */ /* CSCTL4 Control Bits */ /* CSCTL5 Control Bits */ /* CSCTL6 Control Bits */ /* CSCTL7 Control Bits */ /* CSCTL8 Control Bits */ /***************************************************************************** DIO Registers *****************************************************************************/ extern volatile unsigned int PAIN; /* Port A Input */ extern volatile unsigned char PAIN_L; extern volatile unsigned char PAIN_H; extern volatile unsigned int PAOUT; /* Port A Output */ extern volatile unsigned char PAOUT_L; extern volatile unsigned char PAOUT_H; extern volatile unsigned int PADIR; /* Port A Direction */ extern volatile unsigned char PADIR_L; extern volatile unsigned char PADIR_H; extern volatile unsigned int PAREN; /* Port A Resistor Enable */ extern volatile unsigned char PAREN_L; extern volatile unsigned char PAREN_H; extern volatile unsigned int PASEL0; /* Port A Select 0 */ extern volatile unsigned char PASEL0_L; extern volatile unsigned char PASEL0_H; extern volatile unsigned int PASEL1; /* Port A Select 1 */ extern volatile unsigned char PASEL1_L; extern volatile unsigned char PASEL1_H; extern volatile unsigned int P1IV; /* Port 1 Interrupt Vector Register */ extern volatile unsigned char P1IV_L; extern volatile unsigned char P1IV_H; extern volatile unsigned int PASELC; /* Port A Complement Select */ extern volatile unsigned char PASELC_L; extern volatile unsigned char PASELC_H; extern volatile unsigned int PAIES; /* Port A Interrupt Edge Select */ extern volatile unsigned char PAIES_L; extern volatile unsigned char PAIES_H; extern volatile unsigned int PAIE; /* Port A Interrupt Enable */ extern volatile unsigned char PAIE_L; extern volatile unsigned char PAIE_H; extern volatile unsigned int PAIFG; /* Port A Interrupt Flag */ extern volatile unsigned char PAIFG_L; extern volatile unsigned char PAIFG_H; extern volatile unsigned int P2IV; /* Port 2 Interrupt Vector Register */ extern volatile unsigned char P2IV_L; extern volatile unsigned char P2IV_H; extern volatile unsigned int PBIN; /* Port B Input */ extern volatile unsigned char PBIN_L; extern volatile unsigned char PBIN_H; extern volatile unsigned int PBOUT; /* Port B Output */ extern volatile unsigned char PBOUT_L; extern volatile unsigned char PBOUT_H; extern volatile unsigned int PBDIR; /* Port B Direction */ extern volatile unsigned char PBDIR_L; extern volatile unsigned char PBDIR_H; extern volatile unsigned int PBREN; /* Port B Resistor Enable */ extern volatile unsigned char PBREN_L; extern volatile unsigned char PBREN_H; extern volatile unsigned int PBSEL0; /* Port B Select 0 */ extern volatile unsigned char PBSEL0_L; extern volatile unsigned char PBSEL0_H; extern volatile unsigned int PBSEL1; /* Port B Select 1 */ extern volatile unsigned char PBSEL1_L; extern volatile unsigned char PBSEL1_H; extern volatile unsigned int P3IV; /* Port 3 Interrupt Vector Register */ extern volatile unsigned char P3IV_L; extern volatile unsigned char P3IV_H; extern volatile unsigned int PBSELC; /* Port B Complement Select */ extern volatile unsigned char PBSELC_L; extern volatile unsigned char PBSELC_H; extern volatile unsigned int PBIES; /* Port B Interrupt Edge Select */ extern volatile unsigned char PBIES_L; extern volatile unsigned char PBIES_H; extern volatile unsigned int PBIE; /* Port B Interrupt Enable */ extern volatile unsigned char PBIE_L; extern volatile unsigned char PBIE_H; extern volatile unsigned int PBIFG; /* Port B Interrupt Flag */ extern volatile unsigned char PBIFG_L; extern volatile unsigned char PBIFG_H; extern volatile unsigned int P4IV; /* Port 4 Interrupt Vector Register */ extern volatile unsigned char P4IV_L; extern volatile unsigned char P4IV_H; extern volatile unsigned int PCIN; /* Port C Input */ extern volatile unsigned char PCIN_L; extern volatile unsigned char PCIN_H; extern volatile unsigned int PCOUT; /* Port C Output */ extern volatile unsigned char PCOUT_L; extern volatile unsigned char PCOUT_H; extern volatile unsigned int PCDIR; /* Port C Direction */ extern volatile unsigned char PCDIR_L; extern volatile unsigned char PCDIR_H; extern volatile unsigned int PCREN; /* Port C Resistor Enable */ extern volatile unsigned char PCREN_L; extern volatile unsigned char PCREN_H; extern volatile unsigned int PCSEL0; /* Port C Select 0 */ extern volatile unsigned char PCSEL0_L; extern volatile unsigned char PCSEL0_H; extern volatile unsigned int PCSEL1; /* Port C Select 1 */ extern volatile unsigned char PCSEL1_L; extern volatile unsigned char PCSEL1_H; extern volatile unsigned int P5IV; /* Port 5 Interrupt Vector Register */ extern volatile unsigned char P5IV_L; extern volatile unsigned char P5IV_H; extern volatile unsigned int PCSELC; /* Port C Complement Select */ extern volatile unsigned char PCSELC_L; extern volatile unsigned char PCSELC_H; extern volatile unsigned int PCIES; /* Port C Interrupt Edge Select */ extern volatile unsigned char PCIES_L; extern volatile unsigned char PCIES_H; extern volatile unsigned int PCIE; /* Port C Interrupt Enable */ extern volatile unsigned char PCIE_L; extern volatile unsigned char PCIE_H; extern volatile unsigned int PCIFG; /* Port C Interrupt Flag */ extern volatile unsigned char PCIFG_L; extern volatile unsigned char PCIFG_H; extern volatile unsigned int P6IV; /* Port 6 Interrupt Vector Register */ extern volatile unsigned char P6IV_L; extern volatile unsigned char P6IV_H; extern volatile unsigned int PJIN; /* Port J Input */ extern volatile unsigned char PJIN_L; extern volatile unsigned char PJIN_H; extern volatile unsigned int PJOUT; /* Port J Output */ extern volatile unsigned char PJOUT_L; extern volatile unsigned char PJOUT_H; extern volatile unsigned int PJDIR; /* Port J Direction */ extern volatile unsigned char PJDIR_L; extern volatile unsigned char PJDIR_H; extern volatile unsigned int PJREN; /* Port J Resistor Enable */ extern volatile unsigned char PJREN_L; extern volatile unsigned char PJREN_H; extern volatile unsigned int PJSEL0; /* Port J Select 0 */ extern volatile unsigned char PJSEL0_L; extern volatile unsigned char PJSEL0_H; extern volatile unsigned int PJSEL1; /* Port J Select 1 */ extern volatile unsigned char PJSEL1_L; extern volatile unsigned char PJSEL1_H; extern volatile unsigned int PJSELC; /* Port J Complement Select */ extern volatile unsigned char PJSELC_L; extern volatile unsigned char PJSELC_H; extern volatile unsigned char P1IN; /* Port 1 Input */ extern volatile unsigned char P2IN; /* Port 2 Input */ extern volatile unsigned char P2OUT; /* Port 2 Output */ extern volatile unsigned char P1OUT; /* Port 1 Output */ extern volatile unsigned char P1DIR; /* Port 1 Direction */ extern volatile unsigned char P2DIR; /* Port 2 Direction */ extern volatile unsigned char P1REN; /* Port 1 Resistor Enable */ extern volatile unsigned char P2REN; /* Port 2 Resistor Enable */ extern volatile unsigned char P1SEL0; /* Port 1 Select 0 */ extern volatile unsigned char P2SEL0; /* Port 2 Select 0 */ extern volatile unsigned char P1SEL1; /* Port 1 Select 1 */ extern volatile unsigned char P2SEL1; /* Port 2 Select 1 */ extern volatile unsigned char P1SELC; /* Port 1 Complement Select */ extern volatile unsigned char P2SELC; /* Port 2 Complement Select */ extern volatile unsigned char P1IES; /* Port 1 Interrupt Edge Select */ extern volatile unsigned char P2IES; /* Port 2 Interrupt Edge Select */ extern volatile unsigned char P1IE; /* Port 1 Interrupt Enable */ extern volatile unsigned char P2IE; /* Port 2 Interrupt Enable */ extern volatile unsigned char P1IFG; /* Port 1 Interrupt Flag */ extern volatile unsigned char P2IFG; /* Port 2 Interrupt Flag */ extern volatile unsigned char P3IN; /* Port 3 Input */ extern volatile unsigned char P4IN; /* Port 4 Input */ extern volatile unsigned char P3OUT; /* Port 3 Output */ extern volatile unsigned char P4OUT; /* Port 4 Output */ extern volatile unsigned char P3DIR; /* Port 3 Direction */ extern volatile unsigned char P4DIR; /* Port 4 Direction */ extern volatile unsigned char P3REN; /* Port 3 Resistor Enable */ extern volatile unsigned char P4REN; /* Port 4 Resistor Enable */ extern volatile unsigned char P4SEL0; /* Port 4 Select 0 */ extern volatile unsigned char P3SEL0; /* Port 3 Select 0 */ extern volatile unsigned char P3SEL1; /* Port 3 Select 1 */ extern volatile unsigned char P4SEL1; /* Port 4 Select 1 */ extern volatile unsigned char P3SELC; /* Port 3 Complement Select */ extern volatile unsigned char P4SELC; /* Port 4 Complement Select */ extern volatile unsigned char P3IES; /* Port 3 Interrupt Edge Select */ extern volatile unsigned char P4IES; /* Port 4 Interrupt Edge Select */ extern volatile unsigned char P3IE; /* Port 3 Interrupt Enable */ extern volatile unsigned char P4IE; /* Port 4 Interrupt Enable */ extern volatile unsigned char P3IFG; /* Port 3 Interrupt Flag */ extern volatile unsigned char P4IFG; /* Port 4 Interrupt Flag */ extern volatile unsigned char P5IN; /* Port 5 Input */ extern volatile unsigned char P6IN; /* Port 6 Input */ extern volatile unsigned char P5OUT; /* Port 5 Output */ extern volatile unsigned char P6OUT; /* Port 6 Output */ extern volatile unsigned char P5DIR; /* Port 5 Direction */ extern volatile unsigned char P6DIR; /* Port 6 Direction */ extern volatile unsigned char P5REN; /* Port 5 Resistor Enable */ extern volatile unsigned char P6REN; /* Port 6 Resistor Enable */ extern volatile unsigned char P5SEL0; /* Port 5 Select 0 */ extern volatile unsigned char P6SEL0; /* Port 6 Select 0 */ extern volatile unsigned char P5SEL1; /* Port 5 Select 1 */ extern volatile unsigned char P6SEL1; /* Port 6 Select 1 */ extern volatile unsigned char P5SELC; /* Port 5 Complement Select */ extern volatile unsigned char P6SELC; /* Port 6 Complement Select */ extern volatile unsigned char P5IES; /* Port 5 Interrupt Edge Select */ extern volatile unsigned char P6IES; /* Port 6 Interrupt Edge Select */ extern volatile unsigned char P5IE; /* Port 5 Interrupt Enable */ extern volatile unsigned char P6IE; /* Port 6 Interrupt Enable */ extern volatile unsigned char P5IFG; /* Port 5 Interrupt Flag */ extern volatile unsigned char P6IFG; /* Port 6 Interrupt Flag */ /* DIO Register Offsets */ /* DIO Control Bits */ /* P1IV Control Bits */ /* P2IV Control Bits */ /* P3IV Control Bits */ /* P4IV Control Bits */ /* P5IV Control Bits */ /* P6IV Control Bits */ /***************************************************************************** FRCTL Registers *****************************************************************************/ extern volatile unsigned int FRCTL0; /* FRAM Controller Control Register 0 */ extern volatile unsigned char FRCTL0_L; extern volatile unsigned char FRCTL0_H; extern volatile unsigned int GCCTL0; /* General Control Register 0 */ extern volatile unsigned char GCCTL0_L; extern volatile unsigned char GCCTL0_H; extern volatile unsigned int GCCTL1; /* General Control Register 1 */ extern volatile unsigned char GCCTL1_L; extern volatile unsigned char GCCTL1_H; /* FRCTL Register Offsets */ /* FRCTL Control Bits */ /* FRCTL0 Control Bits */ /* GCCTL0 Control Bits */ /* GCCTL1 Control Bits */ /***************************************************************************** ICC Registers *****************************************************************************/ extern volatile unsigned int ICCSC; /* */ extern volatile unsigned char ICCSC_L; extern volatile unsigned char ICCSC_H; extern volatile unsigned int ICCMVS; /* */ extern volatile unsigned char ICCMVS_L; extern volatile unsigned char ICCMVS_H; extern volatile unsigned int ICCILSR0; /* */ extern volatile unsigned char ICCILSR0_L; extern volatile unsigned char ICCILSR0_H; extern volatile unsigned int ICCILSR1; /* */ extern volatile unsigned char ICCILSR1_L; extern volatile unsigned char ICCILSR1_H; extern volatile unsigned int ICCILSR2; /* */ extern volatile unsigned char ICCILSR2_L; extern volatile unsigned char ICCILSR2_H; extern volatile unsigned int ICCILSR3; /* */ extern volatile unsigned char ICCILSR3_L; extern volatile unsigned char ICCILSR3_H; /* ICC Register Offsets */ /* ICC Control Bits */ /* ICCSC Control Bits */ /* ICCMVS Control Bits */ /* ICCILSR0 Control Bits */ /* ICCILSR1 Control Bits */ /* ICCILSR2 Control Bits */ /* ICCILSR3 Control Bits */ /***************************************************************************** MPY32 Registers *****************************************************************************/ extern volatile unsigned int MPY; /* 16-bit operand one multiply */ extern volatile unsigned char MPY_L; extern volatile unsigned char MPY_H; extern volatile unsigned int MPYS; /* 16-bit operand one signed multiply */ extern volatile unsigned char MPYS_L; extern volatile unsigned char MPYS_H; extern volatile unsigned int MAC; /* 16-bit operand one multiply accumulate */ extern volatile unsigned char MAC_L; extern volatile unsigned char MAC_H; extern volatile unsigned int MACS; /* 16-bit operand one signed multiply accumulate */ extern volatile unsigned char MACS_L; extern volatile unsigned char MACS_H; extern volatile unsigned int OP2; /* 16-bit operand two */ extern volatile unsigned char OP2_L; extern volatile unsigned char OP2_H; extern volatile unsigned int RESLO; /* 16x16-bit result low word */ extern volatile unsigned char RESLO_L; extern volatile unsigned char RESLO_H; extern volatile unsigned int RESHI; /* 16x16-bit result high word */ extern volatile unsigned char RESHI_L; extern volatile unsigned char RESHI_H; extern volatile unsigned int SUMEXT; /* 16x16-bit sum extension register */ extern volatile unsigned char SUMEXT_L; extern volatile unsigned char SUMEXT_H; extern volatile unsigned int MPY32L; /* 32-bit operand 1 multiply low word */ extern volatile unsigned char MPY32L_L; extern volatile unsigned char MPY32L_H; extern volatile unsigned int MPY32H; /* 32-bit operand 1 multiply high word */ extern volatile unsigned char MPY32H_L; extern volatile unsigned char MPY32H_H; extern volatile unsigned int MPYS32L; /* 32-bit operand 1 signed multiply low word */ extern volatile unsigned char MPYS32L_L; extern volatile unsigned char MPYS32L_H; extern volatile unsigned int MPYS32H; /* 32-bit operand 1 signed multiply high word */ extern volatile unsigned char MPYS32H_L; extern volatile unsigned char MPYS32H_H; extern volatile unsigned int MAC32L; /* 32-bit operand 1 multiply accumulate low word */ extern volatile unsigned char MAC32L_L; extern volatile unsigned char MAC32L_H; extern volatile unsigned int MAC32H; /* 32-bit operand 1 multiply accumulate high word */ extern volatile unsigned char MAC32H_L; extern volatile unsigned char MAC32H_H; extern volatile unsigned int MACS32L; /* 32-bit operand 1 signed multiply accumulate low word */ extern volatile unsigned char MACS32L_L; extern volatile unsigned char MACS32L_H; extern volatile unsigned int MACS32H; /* 32-bit operand 1 signed multiply accumulate high word */ extern volatile unsigned char MACS32H_L; extern volatile unsigned char MACS32H_H; extern volatile unsigned int OP2L; /* 32-bit operand 2 low word */ extern volatile unsigned char OP2L_L; extern volatile unsigned char OP2L_H; extern volatile unsigned int OP2H; /* 32-bit operand 2 high word */ extern volatile unsigned char OP2H_L; extern volatile unsigned char OP2H_H; extern volatile unsigned int RES0; /* 32x32-bit result 0 least significant word */ extern volatile unsigned char RES0_L; extern volatile unsigned char RES0_H; extern volatile unsigned int RES1; /* 32x32-bit result 1 */ extern volatile unsigned char RES1_L; extern volatile unsigned char RES1_H; extern volatile unsigned int RES2; /* 32x32-bit result 2 */ extern volatile unsigned char RES2_L; extern volatile unsigned char RES2_H; extern volatile unsigned int RES3; /* 32x32-bit result 3 most significant word */ extern volatile unsigned char RES3_L; extern volatile unsigned char RES3_H; extern volatile unsigned int MPY32CTL0; /* MPY32 control register 0 */ extern volatile unsigned char MPY32CTL0_L; extern volatile unsigned char MPY32CTL0_H; /* MPY32 Register Offsets */ /* MPY32 Control Bits */ /* MACS32H Control Bits */ /* MPY32CTL0 Control Bits */ /***************************************************************************** PMM Registers *****************************************************************************/ extern volatile unsigned int PMMCTL0; /* Power Management Module control register 0 */ extern volatile unsigned char PMMCTL0_L; extern volatile unsigned char PMMCTL0_H; extern volatile unsigned int PMMCTL2; /* Power Management Module Control Register 2 */ extern volatile unsigned char PMMCTL2_L; extern volatile unsigned char PMMCTL2_H; extern volatile unsigned int PMMIFG; /* PMM interrupt flag register */ extern volatile unsigned char PMMIFG_L; extern volatile unsigned char PMMIFG_H; extern volatile unsigned int PM5CTL0; /* Power mode 5 control register 0 */ extern volatile unsigned char PM5CTL0_L; extern volatile unsigned char PM5CTL0_H; /* PMM Register Offsets */ /* PMM Control Bits */ /* PMMCTL0 Control Bits */ /* PMMCTL2 Control Bits */ /* PMMIFG Control Bits */ /* PM5CTL0 Control Bits */ /***************************************************************************** RTC Registers *****************************************************************************/ extern volatile unsigned int RTCCTL; /* RTCCTL0 Register */ extern volatile unsigned char RTCCTL_L; extern volatile unsigned char RTCCTL_H; extern volatile unsigned int RTCIV; /* Real-Time Clock Interrupt Vector Register */ extern volatile unsigned char RTCIV_L; extern volatile unsigned char RTCIV_H; extern volatile unsigned int RTCMOD; /* RTC Counter Modulo Register */ extern volatile unsigned char RTCMOD_L; extern volatile unsigned char RTCMOD_H; extern volatile unsigned int RTCCNT; /* RTC Counter Register */ extern volatile unsigned char RTCCNT_L; extern volatile unsigned char RTCCNT_H; /* RTC Register Offsets */ /* RTC Control Bits */ /* RTCCTL Control Bits */ /* RTCIV Control Bits */ /***************************************************************************** SAC0 Registers *****************************************************************************/ extern volatile unsigned int SAC0OA; /* SAC OA Control Register */ extern volatile unsigned char SAC0OA_L; extern volatile unsigned char SAC0OA_H; extern volatile unsigned int SAC0PGA; /* SAC PGA Control Register */ extern volatile unsigned char SAC0PGA_L; extern volatile unsigned char SAC0PGA_H; extern volatile unsigned int SAC0DAC; /* SAC DAC Control Register */ extern volatile unsigned char SAC0DAC_L; extern volatile unsigned char SAC0DAC_H; extern volatile unsigned int SAC0DAT; /* SAC DAC Data Register */ extern volatile unsigned char SAC0DAT_L; extern volatile unsigned char SAC0DAT_H; extern volatile unsigned int SAC0DACSTS; /* SAC DAC Status Register */ extern volatile unsigned char SAC0DACSTS_L; extern volatile unsigned char SAC0DACSTS_H; extern volatile unsigned int SAC0IV; /* SAC Interrupt Vector Register */ extern volatile unsigned char SAC0IV_L; extern volatile unsigned char SAC0IV_H; /* SAC0 Register Offsets */ /* SAC0 Control Bits */ /* SAC0OA Control Bits */ /* SAC0PGA Control Bits */ /* SAC0DAC Control Bits */ /* SAC0DAT Control Bits */ /* SAC0DACSTS Control Bits */ /* SAC0IV Control Bits */ /***************************************************************************** SAC1 Registers *****************************************************************************/ extern volatile unsigned int SAC1OA; /* SAC OA Control Register */ extern volatile unsigned char SAC1OA_L; extern volatile unsigned char SAC1OA_H; extern volatile unsigned int SAC1PGA; /* SAC PGA Control Register */ extern volatile unsigned char SAC1PGA_L; extern volatile unsigned char SAC1PGA_H; extern volatile unsigned int SAC1DAC; /* SAC DAC Control Register */ extern volatile unsigned char SAC1DAC_L; extern volatile unsigned char SAC1DAC_H; extern volatile unsigned int SAC1DAT; /* SAC DAC Data Register */ extern volatile unsigned char SAC1DAT_L; extern volatile unsigned char SAC1DAT_H; extern volatile unsigned int SAC1DACSTS; /* SAC DAC Status Register */ extern volatile unsigned char SAC1DACSTS_L; extern volatile unsigned char SAC1DACSTS_H; extern volatile unsigned int SAC1IV; /* SAC Interrupt Vector Register */ extern volatile unsigned char SAC1IV_L; extern volatile unsigned char SAC1IV_H; /* SAC1 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** SAC2 Registers *****************************************************************************/ extern volatile unsigned int SAC2OA; /* SAC OA Control Register */ extern volatile unsigned char SAC2OA_L; extern volatile unsigned char SAC2OA_H; extern volatile unsigned int SAC2PGA; /* SAC PGA Control Register */ extern volatile unsigned char SAC2PGA_L; extern volatile unsigned char SAC2PGA_H; extern volatile unsigned int SAC2DAC; /* SAC DAC Control Register */ extern volatile unsigned char SAC2DAC_L; extern volatile unsigned char SAC2DAC_H; extern volatile unsigned int SAC2DAT; /* SAC DAC Data Register */ extern volatile unsigned char SAC2DAT_L; extern volatile unsigned char SAC2DAT_H; extern volatile unsigned int SAC2DACSTS; /* SAC DAC Status Register */ extern volatile unsigned char SAC2DACSTS_L; extern volatile unsigned char SAC2DACSTS_H; extern volatile unsigned int SAC2IV; /* SAC Interrupt Vector Register */ extern volatile unsigned char SAC2IV_L; extern volatile unsigned char SAC2IV_H; /* SAC2 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** SAC3 Registers *****************************************************************************/ extern volatile unsigned int SAC3OA; /* SAC OA Control Register */ extern volatile unsigned char SAC3OA_L; extern volatile unsigned char SAC3OA_H; extern volatile unsigned int SAC3PGA; /* SAC PGA Control Register */ extern volatile unsigned char SAC3PGA_L; extern volatile unsigned char SAC3PGA_H; extern volatile unsigned int SAC3DAC; /* SAC DAC Control Register */ extern volatile unsigned char SAC3DAC_L; extern volatile unsigned char SAC3DAC_H; extern volatile unsigned int SAC3DAT; /* SAC DAC Data Register */ extern volatile unsigned char SAC3DAT_L; extern volatile unsigned char SAC3DAT_H; extern volatile unsigned int SAC3DACSTS; /* SAC DAC Status Register */ extern volatile unsigned char SAC3DACSTS_L; extern volatile unsigned char SAC3DACSTS_H; extern volatile unsigned int SAC3IV; /* SAC Interrupt Vector Register */ extern volatile unsigned char SAC3IV_L; extern volatile unsigned char SAC3IV_H; /* SAC3 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** SFR Registers *****************************************************************************/ extern volatile unsigned int SFRIE1; /* Interrupt Enable */ extern volatile unsigned char SFRIE1_L; extern volatile unsigned char SFRIE1_H; extern volatile unsigned int SFRIFG1; /* Interrupt Flag */ extern volatile unsigned char SFRIFG1_L; extern volatile unsigned char SFRIFG1_H; extern volatile unsigned int SFRRPCR; /* Reset Pin Control */ extern volatile unsigned char SFRRPCR_L; extern volatile unsigned char SFRRPCR_H; /* SFR Register Offsets */ /* SFR Control Bits */ /* SFRIE1 Control Bits */ /* SFRIFG1 Control Bits */ /* SFRRPCR Control Bits */ /***************************************************************************** SYS Registers *****************************************************************************/ extern volatile unsigned int SYSCTL; /* System Control */ extern volatile unsigned char SYSCTL_L; extern volatile unsigned char SYSCTL_H; extern volatile unsigned int SYSBSLC; /* Bootstrap Loader Configuration Register */ extern volatile unsigned char SYSBSLC_L; extern volatile unsigned char SYSBSLC_H; extern volatile unsigned int SYSJMBC; /* JTAG Mailbox Control */ extern volatile unsigned char SYSJMBC_L; extern volatile unsigned char SYSJMBC_H; extern volatile unsigned int SYSJMBI0; /* JTAG Mailbox Input */ extern volatile unsigned char SYSJMBI0_L; extern volatile unsigned char SYSJMBI0_H; extern volatile unsigned int SYSJMBI1; /* JTAG Mailbox Input 1 Register */ extern volatile unsigned char SYSJMBI1_L; extern volatile unsigned char SYSJMBI1_H; extern volatile unsigned int SYSJMBO0; /* JTAG Mailbox Output */ extern volatile unsigned char SYSJMBO0_L; extern volatile unsigned char SYSJMBO0_H; extern volatile unsigned int SYSJMBO1; /* JTAG Mailbox Output 1 Register */ extern volatile unsigned char SYSJMBO1_L; extern volatile unsigned char SYSJMBO1_H; extern volatile unsigned int SYSUNIV; /* User NMI Vector Generator */ extern volatile unsigned char SYSUNIV_L; extern volatile unsigned char SYSUNIV_H; extern volatile unsigned int SYSSNIV; /* System NMI Vector Generator */ extern volatile unsigned char SYSSNIV_L; extern volatile unsigned char SYSSNIV_H; extern volatile unsigned int SYSRSTIV; /* Reset Vector Generator */ extern volatile unsigned char SYSRSTIV_L; extern volatile unsigned char SYSRSTIV_H; extern volatile unsigned int SYSCFG0; /* System Configuration Register 0 */ extern volatile unsigned char SYSCFG0_L; extern volatile unsigned char SYSCFG0_H; extern volatile unsigned int SYSCFG1; /* System Configuration Register 1 */ extern volatile unsigned char SYSCFG1_L; extern volatile unsigned char SYSCFG1_H; extern volatile unsigned int SYSCFG2; /* System Configuration Register 2 */ extern volatile unsigned char SYSCFG2_L; extern volatile unsigned char SYSCFG2_H; /* SYS Register Offsets */ /* SYS Control Bits */ /* SYSCTL Control Bits */ /* SYSBSLC Control Bits */ /* SYSJMBC Control Bits */ /* SYSJMBI0 Control Bits */ /* SYSUNIV Control Bits */ /* SYSSNIV Control Bits */ /* SYSRSTIV Control Bits */ /* SYSCFG0 Control Bits */ /* SYSCFG1 Control Bits */ /* SYSCFG2 Control Bits */ /***************************************************************************** TB0 Registers *****************************************************************************/ extern volatile unsigned int TB0CTL; /* Timer_B Control Register */ extern volatile unsigned char TB0CTL_L; extern volatile unsigned char TB0CTL_H; extern volatile unsigned int TB0CCTL0; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB0CCTL0_L; extern volatile unsigned char TB0CCTL0_H; extern volatile unsigned int TB0CCTL1; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB0CCTL1_L; extern volatile unsigned char TB0CCTL1_H; extern volatile unsigned int TB0CCTL2; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB0CCTL2_L; extern volatile unsigned char TB0CCTL2_H; extern volatile unsigned int TB0R; /* Timer_B count register */ extern volatile unsigned char TB0R_L; extern volatile unsigned char TB0R_H; extern volatile unsigned int TB0CCR0; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB0CCR0_L; extern volatile unsigned char TB0CCR0_H; extern volatile unsigned int TB0CCR1; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB0CCR1_L; extern volatile unsigned char TB0CCR1_H; extern volatile unsigned int TB0CCR2; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB0CCR2_L; extern volatile unsigned char TB0CCR2_H; extern volatile unsigned int TB0EX0; /* Timer_Bx Expansion Register 0 */ extern volatile unsigned char TB0EX0_L; extern volatile unsigned char TB0EX0_H; extern volatile unsigned int TB0IV; /* Timer_Bx Interrupt Vector Register */ extern volatile unsigned char TB0IV_L; extern volatile unsigned char TB0IV_H; /* TB0 Register Offsets */ /* TB0 Control Bits */ /* TB0CTL Control Bits */ /* TB0CCTL Control Bits */ /* TB0EX0 Control Bits */ /* TB0IV Control Bits */ /***************************************************************************** TB1 Registers *****************************************************************************/ extern volatile unsigned int TB1CTL; /* Timer_B Control Register */ extern volatile unsigned char TB1CTL_L; extern volatile unsigned char TB1CTL_H; extern volatile unsigned int TB1CCTL0; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB1CCTL0_L; extern volatile unsigned char TB1CCTL0_H; extern volatile unsigned int TB1CCTL1; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB1CCTL1_L; extern volatile unsigned char TB1CCTL1_H; extern volatile unsigned int TB1CCTL2; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB1CCTL2_L; extern volatile unsigned char TB1CCTL2_H; extern volatile unsigned int TB1R; /* Timer_B count register */ extern volatile unsigned char TB1R_L; extern volatile unsigned char TB1R_H; extern volatile unsigned int TB1CCR0; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB1CCR0_L; extern volatile unsigned char TB1CCR0_H; extern volatile unsigned int TB1CCR1; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB1CCR1_L; extern volatile unsigned char TB1CCR1_H; extern volatile unsigned int TB1CCR2; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB1CCR2_L; extern volatile unsigned char TB1CCR2_H; extern volatile unsigned int TB1EX0; /* Timer_Bx Expansion Register 0 */ extern volatile unsigned char TB1EX0_L; extern volatile unsigned char TB1EX0_H; extern volatile unsigned int TB1IV; /* Timer_Bx Interrupt Vector Register */ extern volatile unsigned char TB1IV_L; extern volatile unsigned char TB1IV_H; /* TB1 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** TB2 Registers *****************************************************************************/ extern volatile unsigned int TB2CTL; /* Timer_B Control Register */ extern volatile unsigned char TB2CTL_L; extern volatile unsigned char TB2CTL_H; extern volatile unsigned int TB2CCTL0; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB2CCTL0_L; extern volatile unsigned char TB2CCTL0_H; extern volatile unsigned int TB2CCTL1; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB2CCTL1_L; extern volatile unsigned char TB2CCTL1_H; extern volatile unsigned int TB2CCTL2; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB2CCTL2_L; extern volatile unsigned char TB2CCTL2_H; extern volatile unsigned int TB2R; /* Timer_B count register */ extern volatile unsigned char TB2R_L; extern volatile unsigned char TB2R_H; extern volatile unsigned int TB2CCR0; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB2CCR0_L; extern volatile unsigned char TB2CCR0_H; extern volatile unsigned int TB2CCR1; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB2CCR1_L; extern volatile unsigned char TB2CCR1_H; extern volatile unsigned int TB2CCR2; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB2CCR2_L; extern volatile unsigned char TB2CCR2_H; extern volatile unsigned int TB2EX0; /* Timer_Bx Expansion Register 0 */ extern volatile unsigned char TB2EX0_L; extern volatile unsigned char TB2EX0_H; extern volatile unsigned int TB2IV; /* Timer_Bx Interrupt Vector Register */ extern volatile unsigned char TB2IV_L; extern volatile unsigned char TB2IV_H; /* TB2 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** TB3 Registers *****************************************************************************/ extern volatile unsigned int TB3CTL; /* Timer_B Control Register */ extern volatile unsigned char TB3CTL_L; extern volatile unsigned char TB3CTL_H; extern volatile unsigned int TB3CCTL0; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL0_L; extern volatile unsigned char TB3CCTL0_H; extern volatile unsigned int TB3CCTL1; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL1_L; extern volatile unsigned char TB3CCTL1_H; extern volatile unsigned int TB3CCTL2; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL2_L; extern volatile unsigned char TB3CCTL2_H; extern volatile unsigned int TB3CCTL3; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL3_L; extern volatile unsigned char TB3CCTL3_H; extern volatile unsigned int TB3CCTL4; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL4_L; extern volatile unsigned char TB3CCTL4_H; extern volatile unsigned int TB3CCTL5; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL5_L; extern volatile unsigned char TB3CCTL5_H; extern volatile unsigned int TB3CCTL6; /* Timer_B Capture/Compare Control Register */ extern volatile unsigned char TB3CCTL6_L; extern volatile unsigned char TB3CCTL6_H; extern volatile unsigned int TB3R; /* Timer_B count register */ extern volatile unsigned char TB3R_L; extern volatile unsigned char TB3R_H; extern volatile unsigned int TB3CCR0; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR0_L; extern volatile unsigned char TB3CCR0_H; extern volatile unsigned int TB3CCR1; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR1_L; extern volatile unsigned char TB3CCR1_H; extern volatile unsigned int TB3CCR2; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR2_L; extern volatile unsigned char TB3CCR2_H; extern volatile unsigned int TB3CCR3; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR3_L; extern volatile unsigned char TB3CCR3_H; extern volatile unsigned int TB3CCR4; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR4_L; extern volatile unsigned char TB3CCR4_H; extern volatile unsigned int TB3CCR5; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR5_L; extern volatile unsigned char TB3CCR5_H; extern volatile unsigned int TB3CCR6; /* Timer_B Capture/Compare Register */ extern volatile unsigned char TB3CCR6_L; extern volatile unsigned char TB3CCR6_H; extern volatile unsigned int TB3EX0; /* Timer_Bx Expansion Register 0 */ extern volatile unsigned char TB3EX0_L; extern volatile unsigned char TB3EX0_H; extern volatile unsigned int TB3IV; /* Timer_Bx Interrupt Vector Register */ extern volatile unsigned char TB3IV_L; extern volatile unsigned char TB3IV_H; /* TB3 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** WDT_A Registers *****************************************************************************/ extern volatile unsigned int WDTCTL; /* Watchdog Timer Control Register */ extern volatile unsigned char WDTCTL_L; extern volatile unsigned char WDTCTL_H; /* WDT_A Register Offsets */ /* WDT_A Control Bits */ /* WDTCTL Control Bits */ /***************************************************************************** eCOMP0 Registers *****************************************************************************/ extern volatile unsigned int CP0CTL0; /* Comparator Control Register 0 */ extern volatile unsigned char CP0CTL0_L; extern volatile unsigned char CP0CTL0_H; extern volatile unsigned int CP0CTL1; /* Comparator Control Register 1 */ extern volatile unsigned char CP0CTL1_L; extern volatile unsigned char CP0CTL1_H; extern volatile unsigned int CP0INT; /* Comparator Interrupt Control Register */ extern volatile unsigned char CP0INT_L; extern volatile unsigned char CP0INT_H; extern volatile unsigned int CP0IV; /* Comparator Interrupt Vector Word Register */ extern volatile unsigned char CP0IV_L; extern volatile unsigned char CP0IV_H; extern volatile unsigned int CP0DACCTL; /* 6-bit Comparator built-in DAC Control Register */ extern volatile unsigned char CP0DACCTL_L; extern volatile unsigned char CP0DACCTL_H; extern volatile unsigned int CP0DACDATA; /* 6-bit Comparator built-in DAC Data Register */ extern volatile unsigned char CP0DACDATA_L; extern volatile unsigned char CP0DACDATA_H; /* eCOMP0 Register Offsets */ /* eCOMP0 Control Bits */ /* CP0CTL0 Control Bits */ /* CP0CTL1 Control Bits */ /* CP0INT Control Bits */ /* CP0IV Control Bits */ /* CP0DACCTL Control Bits */ /* CP0DACDATA Control Bits */ /***************************************************************************** eCOMP1 Registers *****************************************************************************/ extern volatile unsigned int CP1CTL0; /* Comparator Control Register 0 */ extern volatile unsigned char CP1CTL0_L; extern volatile unsigned char CP1CTL0_H; extern volatile unsigned int CP1CTL1; /* Comparator Control Register 1 */ extern volatile unsigned char CP1CTL1_L; extern volatile unsigned char CP1CTL1_H; extern volatile unsigned int CP1INT; /* Comparator Interrupt Control Register */ extern volatile unsigned char CP1INT_L; extern volatile unsigned char CP1INT_H; extern volatile unsigned int CP1IV; /* Comparator Interrupt Vector Word Register */ extern volatile unsigned char CP1IV_L; extern volatile unsigned char CP1IV_H; extern volatile unsigned int CP1DACCTL; /* 6-bit Comparator built-in DAC Control Register */ extern volatile unsigned char CP1DACCTL_L; extern volatile unsigned char CP1DACCTL_H; extern volatile unsigned int CP1DACDATA; /* 6-bit Comparator built-in DAC Data Register */ extern volatile unsigned char CP1DACDATA_L; extern volatile unsigned char CP1DACDATA_H; /* eCOMP1 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** eUSCI_A0 Registers *****************************************************************************/ extern volatile unsigned int UCA0CTLW0; /* eUSCI_Ax Control Word Register 0 */ extern volatile unsigned char UCA0CTLW0_L; extern volatile unsigned char UCA0CTLW0_H; extern volatile unsigned int UCA0CTLW1; /* eUSCI_Ax Control Word Register 1 */ extern volatile unsigned char UCA0CTLW1_L; extern volatile unsigned char UCA0CTLW1_H; extern volatile unsigned int UCA0BRW; /* eUSCI_Ax Baud Rate Control Word Register */ extern volatile unsigned char UCA0BRW_L; extern volatile unsigned char UCA0BRW_H; extern volatile unsigned int UCA0MCTLW; /* eUSCI_Ax Modulation Control Word Register */ extern volatile unsigned char UCA0MCTLW_L; extern volatile unsigned char UCA0MCTLW_H; extern volatile unsigned int UCA0STATW; /* eUSCI_Ax Status Register */ extern volatile unsigned char UCA0STATW_L; extern volatile unsigned char UCA0STATW_H; extern volatile unsigned int UCA0RXBUF; /* eUSCI_Ax Receive Buffer Register */ extern volatile unsigned char UCA0RXBUF_L; extern volatile unsigned char UCA0RXBUF_H; extern volatile unsigned int UCA0TXBUF; /* eUSCI_Ax Transmit Buffer Register */ extern volatile unsigned char UCA0TXBUF_L; extern volatile unsigned char UCA0TXBUF_H; extern volatile unsigned int UCA0ABCTL; /* eUSCI_Ax Auto Baud Rate Control Register */ extern volatile unsigned char UCA0ABCTL_L; extern volatile unsigned char UCA0ABCTL_H; extern volatile unsigned int UCA0IRCTL; /* eUSCI_Ax IrDA Control Word Register */ extern volatile unsigned char UCA0IRCTL_L; extern volatile unsigned char UCA0IRCTL_H; extern volatile unsigned int UCA0IE; /* eUSCI_Ax Interrupt Enable Register */ extern volatile unsigned char UCA0IE_L; extern volatile unsigned char UCA0IE_H; extern volatile unsigned int UCA0IFG; /* eUSCI_Ax Interrupt Flag Register */ extern volatile unsigned char UCA0IFG_L; extern volatile unsigned char UCA0IFG_H; extern volatile unsigned int UCA0IV; /* eUSCI_Ax Interrupt Vector Register */ extern volatile unsigned char UCA0IV_L; extern volatile unsigned char UCA0IV_H; /* eUSCI_A0 Register Offsets */ /* eUSCI_A0 Control Bits */ /* UCA0CTLW0 Control Bits */ /* UCA0CTLW0_SPI Control Bits */ /* UCA0CTLW1 Control Bits */ /* UCA0BRW Control Bits */ /* UCA0MCTLW Control Bits */ /* UCA0STATW Control Bits */ /* UCA0RXBUF Control Bits */ /* UCA0TXBUF Control Bits */ /* UCA0ABCTL Control Bits */ /* UCA0IRCTL Control Bits */ /* UCA0IE Control Bits */ /* UCA0IFG Control Bits */ /* UCA0IV Control Bits */ /***************************************************************************** eUSCI_A1 Registers *****************************************************************************/ extern volatile unsigned int UCA1CTLW0; /* eUSCI_Ax Control Word Register 0 */ extern volatile unsigned char UCA1CTLW0_L; extern volatile unsigned char UCA1CTLW0_H; extern volatile unsigned int UCA1CTLW1; /* eUSCI_Ax Control Word Register 1 */ extern volatile unsigned char UCA1CTLW1_L; extern volatile unsigned char UCA1CTLW1_H; extern volatile unsigned int UCA1BRW; /* eUSCI_Ax Baud Rate Control Word Register */ extern volatile unsigned char UCA1BRW_L; extern volatile unsigned char UCA1BRW_H; extern volatile unsigned int UCA1MCTLW; /* eUSCI_Ax Modulation Control Word Register */ extern volatile unsigned char UCA1MCTLW_L; extern volatile unsigned char UCA1MCTLW_H; extern volatile unsigned int UCA1STATW; /* eUSCI_Ax Status Register */ extern volatile unsigned char UCA1STATW_L; extern volatile unsigned char UCA1STATW_H; extern volatile unsigned int UCA1RXBUF; /* eUSCI_Ax Receive Buffer Register */ extern volatile unsigned char UCA1RXBUF_L; extern volatile unsigned char UCA1RXBUF_H; extern volatile unsigned int UCA1TXBUF; /* eUSCI_Ax Transmit Buffer Register */ extern volatile unsigned char UCA1TXBUF_L; extern volatile unsigned char UCA1TXBUF_H; extern volatile unsigned int UCA1ABCTL; /* eUSCI_Ax Auto Baud Rate Control Register */ extern volatile unsigned char UCA1ABCTL_L; extern volatile unsigned char UCA1ABCTL_H; extern volatile unsigned int UCA1IRCTL; /* eUSCI_Ax IrDA Control Word Register */ extern volatile unsigned char UCA1IRCTL_L; extern volatile unsigned char UCA1IRCTL_H; extern volatile unsigned int UCA1IE; /* eUSCI_Ax Interrupt Enable Register */ extern volatile unsigned char UCA1IE_L; extern volatile unsigned char UCA1IE_H; extern volatile unsigned int UCA1IFG; /* eUSCI_Ax Interrupt Flag Register */ extern volatile unsigned char UCA1IFG_L; extern volatile unsigned char UCA1IFG_H; extern volatile unsigned int UCA1IV; /* eUSCI_Ax Interrupt Vector Register */ extern volatile unsigned char UCA1IV_L; extern volatile unsigned char UCA1IV_H; /* eUSCI_A1 Register Offsets */ /* No control bits available or already defined for another module */ /***************************************************************************** eUSCI_B0 Registers *****************************************************************************/ extern volatile unsigned int UCB0CTLW0; /* eUSCI_Bx Control Word Register 0 */ extern volatile unsigned char UCB0CTLW0_L; extern volatile unsigned char UCB0CTLW0_H; extern volatile unsigned int UCB0CTLW1; /* eUSCI_Bx Control Word Register 1 */ extern volatile unsigned char UCB0CTLW1_L; extern volatile unsigned char UCB0CTLW1_H; extern volatile unsigned int UCB0BRW; /* eUSCI_Bx Baud Rate Control Word Register */ extern volatile unsigned char UCB0BRW_L; extern volatile unsigned char UCB0BRW_H; extern volatile unsigned int UCB0STATW; /* eUSCI_Bx Status Register */ extern volatile unsigned char UCB0STATW_L; extern volatile unsigned char UCB0STATW_H; extern volatile unsigned int UCB0TBCNT; /* eUSCI_Bx Byte Counter Threshold Register */ extern volatile unsigned char UCB0TBCNT_L; extern volatile unsigned char UCB0TBCNT_H; extern volatile unsigned int UCB0RXBUF; /* eUSCI_Bx Receive Buffer Register */ extern volatile unsigned char UCB0RXBUF_L; extern volatile unsigned char UCB0RXBUF_H; extern volatile unsigned int UCB0TXBUF; /* eUSCI_Bx Transmit Buffer Register */ extern volatile unsigned char UCB0TXBUF_L; extern volatile unsigned char UCB0TXBUF_H; extern volatile unsigned int UCB0I2COA0; /* eUSCI_Bx I2C Own Address 0 Register */ extern volatile unsigned char UCB0I2COA0_L; extern volatile unsigned char UCB0I2COA0_H; extern volatile unsigned int UCB0I2COA1; /* eUSCI_Bx I2C Own Address 1 Register */ extern volatile unsigned char UCB0I2COA1_L; extern volatile unsigned char UCB0I2COA1_H; extern volatile unsigned int UCB0I2COA2; /* eUSCI_Bx I2C Own Address 2 Register */ extern volatile unsigned char UCB0I2COA2_L; extern volatile unsigned char UCB0I2COA2_H; extern volatile unsigned int UCB0I2COA3; /* eUSCI_Bx I2C Own Address 3 Register */ extern volatile unsigned char UCB0I2COA3_L; extern volatile unsigned char UCB0I2COA3_H; extern volatile unsigned int UCB0ADDRX; /* eUSCI_Bx I2C Received Address Register */ extern volatile unsigned char UCB0ADDRX_L; extern volatile unsigned char UCB0ADDRX_H; extern volatile unsigned int UCB0ADDMASK; /* eUSCI_Bx I2C Address Mask Register */ extern volatile unsigned char UCB0ADDMASK_L; extern volatile unsigned char UCB0ADDMASK_H; extern volatile unsigned int UCB0I2CSA; /* eUSCI_Bx I2C Slave Address Register */ extern volatile unsigned char UCB0I2CSA_L; extern volatile unsigned char UCB0I2CSA_H; extern volatile unsigned int UCB0IE; /* eUSCI_Bx Interrupt Enable Register */ extern volatile unsigned char UCB0IE_L; extern volatile unsigned char UCB0IE_H; extern volatile unsigned int UCB0IFG; /* eUSCI_Bx Interrupt Flag Register */ extern volatile unsigned char UCB0IFG_L; extern volatile unsigned char UCB0IFG_H; extern volatile unsigned int UCB0IV; /* eUSCI_Bx Interrupt Vector Register */ extern volatile unsigned char UCB0IV_L; extern volatile unsigned char UCB0IV_H; /* eUSCI_B0 Register Offsets */ /* eUSCI_B0 Control Bits */ /* UCB0CTLW0 Control Bits */ /* UCB0CTLW1 Control Bits */ /* UCB0STATW Control Bits */ /* UCB0TBCNT Control Bits */ /* UCB0I2COA0 Control Bits */ /* UCB0I2COA1 Control Bits */ /* UCB0I2COA2 Control Bits */ /* UCB0I2COA3 Control Bits */ /* UCB0ADDRX Control Bits */ /* UCB0ADDMASK Control Bits */ /* UCB0I2CSA Control Bits */ /* UCB0IE Control Bits */ /* UCB0IFG Control Bits */ /* UCB0IV Control Bits */ /***************************************************************************** eUSCI_B1 Registers *****************************************************************************/ extern volatile unsigned int UCB1CTLW0; /* eUSCI_Bx Control Word Register 0 */ extern volatile unsigned char UCB1CTLW0_L; extern volatile unsigned char UCB1CTLW0_H; extern volatile unsigned int UCB1CTLW1; /* eUSCI_Bx Control Word Register 1 */ extern volatile unsigned char UCB1CTLW1_L; extern volatile unsigned char UCB1CTLW1_H; extern volatile unsigned int UCB1BRW; /* eUSCI_Bx Baud Rate Control Word Register */ extern volatile unsigned char UCB1BRW_L; extern volatile unsigned char UCB1BRW_H; extern volatile unsigned int UCB1STATW; /* eUSCI_Bx Status Register */ extern volatile unsigned char UCB1STATW_L; extern volatile unsigned char UCB1STATW_H; extern volatile unsigned int UCB1TBCNT; /* eUSCI_Bx Byte Counter Threshold Register */ extern volatile unsigned char UCB1TBCNT_L; extern volatile unsigned char UCB1TBCNT_H; extern volatile unsigned int UCB1RXBUF; /* eUSCI_Bx Receive Buffer Register */ extern volatile unsigned char UCB1RXBUF_L; extern volatile unsigned char UCB1RXBUF_H; extern volatile unsigned int UCB1TXBUF; /* eUSCI_Bx Transmit Buffer Register */ extern volatile unsigned char UCB1TXBUF_L; extern volatile unsigned char UCB1TXBUF_H; extern volatile unsigned int UCB1I2COA0; /* eUSCI_Bx I2C Own Address 0 Register */ extern volatile unsigned char UCB1I2COA0_L; extern volatile unsigned char UCB1I2COA0_H; extern volatile unsigned int UCB1I2COA1; /* eUSCI_Bx I2C Own Address 1 Register */ extern volatile unsigned char UCB1I2COA1_L; extern volatile unsigned char UCB1I2COA1_H; extern volatile unsigned int UCB1I2COA2; /* eUSCI_Bx I2C Own Address 2 Register */ extern volatile unsigned char UCB1I2COA2_L; extern volatile unsigned char UCB1I2COA2_H; extern volatile unsigned int UCB1I2COA3; /* eUSCI_Bx I2C Own Address 3 Register */ extern volatile unsigned char UCB1I2COA3_L; extern volatile unsigned char UCB1I2COA3_H; extern volatile unsigned int UCB1ADDRX; /* eUSCI_Bx I2C Received Address Register */ extern volatile unsigned char UCB1ADDRX_L; extern volatile unsigned char UCB1ADDRX_H; extern volatile unsigned int UCB1ADDMASK; /* eUSCI_Bx I2C Address Mask Register */ extern volatile unsigned char UCB1ADDMASK_L; extern volatile unsigned char UCB1ADDMASK_H; extern volatile unsigned int UCB1I2CSA; /* eUSCI_Bx I2C Slave Address Register */ extern volatile unsigned char UCB1I2CSA_L; extern volatile unsigned char UCB1I2CSA_H; extern volatile unsigned int UCB1IE; /* eUSCI_Bx Interrupt Enable Register */ extern volatile unsigned char UCB1IE_L; extern volatile unsigned char UCB1IE_H; extern volatile unsigned int UCB1IFG; /* eUSCI_Bx Interrupt Flag Register */ extern volatile unsigned char UCB1IFG_L; extern volatile unsigned char UCB1IFG_H; extern volatile unsigned int UCB1IV; /* eUSCI_Bx Interrupt Vector Register */ extern volatile unsigned char UCB1IV_L; extern volatile unsigned char UCB1IV_H; /* eUSCI_B1 Register Offsets */ /* No control bits available or already defined for another module */ /************************************************************ * TLV Descriptors ************************************************************/ /************************************************************ * Interrupt Vectors (offset from 0xFF80 + 0x10 for Password) ************************************************************/ #pragma diag_suppress 1107 /************************************************************ * Memory Boundary Definitions ************************************************************/ /************************************************************ * End of Modules ************************************************************/ //***************************************************************************** // // Copyright (C) 2012 - 2015 Texas Instruments Incorporated - http://www.ti.com/ // // Redistribution and use in source and binary forms, with or without // modification, are permitted provided that the following conditions // are met: // // Redistributions of source code must retain the above copyright // notice, this list of conditions and the following disclaimer. // // Redistributions in binary form must reproduce the above copyright // notice, this list of conditions and the following disclaimer in the // documentation and/or other materials provided with the // distribution. // // Neither the name of Texas Instruments Incorporated nor the names of // its contributors may be used to endorse or promote products derived // from this software without specific prior written permission. // // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. //**************************************************************************** /************************************************************ * ADC ************************************************************/ /************************************************************ * ADC12_B ************************************************************/ /************************************************************ * CAP TOUCH ************************************************************/ /************************************************************ * CLOCK SYSTEM ************************************************************/ /************************************************************ * COMP_E ************************************************************/ /************************************************************ * CRC32 ************************************************************/ /************************************************************ * DIO ************************************************************/ /************************************************************ * DMA ************************************************************/ /************************************************************ * ECOMP0 ************************************************************/ // not provided due to possible invalid re-define //#define CPIV CP0IV //#define CPIV_L CP0IV_L //#define CPIV_H CP0IV_H /************************************************************ * FRCTL ************************************************************/ /************************************************************ * LCD_C ************************************************************/ /************************************************************ * LEA ************************************************************/ /************************************************************ * MPY32 ************************************************************/ /************************************************************ * PMM ************************************************************/ /************************************************************ * RAMCTL ************************************************************/ /************************************************************ * RTC ************************************************************/ /************************************************************ * RTC_C ************************************************************/ /************************************************************ * SAPH_A ************************************************************/ /************************************************************ * SYS ************************************************************/ /************************************************************ * Timer A ************************************************************/ /************************************************************ * Timer B ************************************************************/ /* TBxIV Definitions */ /* Legacy Defines */ /************************************************************ * USCI ************************************************************/ /************************************************************ * USCI Ax ************************************************************/ /************************************************************ * USCI Bx ************************************************************/ /************************************************************ * WDT ************************************************************/ /* WDT-interval times [1ms] coded with Bits 0-2 */ /* WDT is clocked by fSMCLK (assumed 1MHz) */ /* WDT is clocked by fACLK (assumed 32KHz) */ /* Watchdog mode -> reset after expired time */ /* WDT is clocked by fSMCLK (assumed 1MHz) */ /* WDT is clocked by fACLK (assumed 32KHz) */ /*****************************************************************************/ /* stddef.h */ /* */ /* Copyright (c) 1993 Texas Instruments Incorporated */ /* http://www.ti.com/ */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in */ /* the documentation and/or other materials provided with the */ /* distribution. */ /* */ /* Neither the name of Texas Instruments Incorporated nor the names */ /* of its contributors may be used to endorse or promote products */ /* derived from this software without specific prior written */ /* permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS */ /* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT */ /* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR */ /* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT */ /* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, */ /* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ /* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, */ /* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY */ /* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE */ /* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* */ /*****************************************************************************/ _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.7\")") /* macros required for implementation */ _Pragma("CHECK_MISRA(\"-20.1\")") /* standard headers must define standard names */ _Pragma("CHECK_MISRA(\"-20.2\")") /* standard headers must define standard names */ typedef int ptrdiff_t; typedef unsigned int wchar_t; /*----------------------------------------------------------------------------*/ /* C++11 and C11 required max_align_t to be defined. The libc++ cstddef */ /* header expects the macro __DEFINED_max_align_t to be defined if it is to */ /* use the definintion of max_align_t from stddef.h. Only define it if */ /* compiling for C11 or we're in non strict ansi mode. */ /*----------------------------------------------------------------------------*/ typedef long double max_align_t; _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.10\")") /* need types as macro arguments */ _Pragma("diag_pop") _Pragma("diag_pop") /* * Copyright (c) 2000 Jeroen Ruigrok van der Werven * All rights reserved. * * Copyright (c) 2014-2014 Texas Instruments Incorporated * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * $FreeBSD: release/10.0.0/include/stdbool.h 228878 2011-12-25 20:15:41Z ed $ */ /* If this file is included in C99 mode, _Bool is a builtin, so no definition. */ /* If this is C89 mode and this file is included, _Bool is pre-defined in C89 */ /* relaxed mode by the EDG parser, so it needs to be defined in strict mode. */ _Pragma("diag_push") _Pragma("CHECK_MISRA(\"-19.4\")") _Pragma("CHECK_MISRA(\"-19.11\")") _Pragma("diag_pop") /*――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――---*/ typedef uint8_t byte; typedef uint16_t word; typedef uint32_t dword; /*――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――---*/ // MCLK clock frequency in MHz // I'm lazy /*――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――---*/ /*――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――――---*/ // clang-format off static inline void prefetch(const void *x) {;} /* * Simple doubly linked list implementation. * * Some of the internal functions ("__xxx") are useful when * manipulating whole lists rather than single entries, as * sometimes we already know the next/prev entries and we can * generate better code by using them directly rather than * using the generic single-entry routines. */ struct list_head { struct list_head *next, *prev; }; static inline void INIT_LIST_HEAD(struct list_head *list) { list->next = list; list->prev = list; } /* * Insert a new entry between two known consecutive entries. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static inline void __list_add(struct list_head *newe, struct list_head *prev, struct list_head *next) { next->prev = newe; newe->next = next; newe->prev = prev; prev->next = newe; } /** * list_add - add a new entry * @newe: newe entry to be added * @head: list head to add it after * * Insert a new entry after the specified head. * This is good for implementing stacks. */ static inline void list_add(struct list_head *newe, struct list_head *head) { __list_add(newe, head, head->next); } /** * list_add_tail - add a new entry * @newe: newe entry to be added * @head: list head to add it before * * Insert a new entry before the specified head. * This is useful for implementing queues. */ static inline void list_add_tail(struct list_head *newe, struct list_head *head) { __list_add(newe, head->prev, head); } /* * Delete a list entry by making the prev/next entries * point to each other. * * This is only for internal list manipulation where we know * the prev/next entries already! */ static inline void __list_del(struct list_head * prev, struct list_head * next) { next->prev = prev; prev->next = next; } /** * list_del - deletes entry from list. * @entry: the element to delete from the list. * Note: list_empty on entry does not return true after this, the entry is * in an undefined state. */ static inline void list_del(struct list_head *entry) { __list_del(entry->prev, entry->next); entry->next = ((void *)0xDEAD); entry->prev = ((void *)0xF00D); } /** * list_replace - replace old entry by new one * @old : the element to be replaced * @newe : the newe element to insert * Note: if 'old' was empty, it will be overwritten. */ static inline void list_replace(struct list_head *old, struct list_head *newe) { newe->next = old->next; newe->next->prev = newe; newe->prev = old->prev; newe->prev->next = newe; } static inline void list_replace_init(struct list_head *old, struct list_head *newe) { list_replace(old, newe); INIT_LIST_HEAD(old); } /** * list_del_init - deletes entry from list and reinitialize it. * @entry: the element to delete from the list. */ static inline void list_del_init(struct list_head *entry) { __list_del(entry->prev, entry->next); INIT_LIST_HEAD(entry); } /** * list_move - delete from one list and add as another's head * @list: the entry to move * @head: the head that will precede our entry */ static inline void list_move(struct list_head *list, struct list_head *head) { __list_del(list->prev, list->next); list_add(list, head); } /** * list_move_tail - delete from one list and add as another's tail * @list: the entry to move * @head: the head that will follow our entry */ static inline void list_move_tail(struct list_head *list, struct list_head *head) { __list_del(list->prev, list->next); list_add_tail(list, head); } /** * list_is_last - tests whether @list is the last entry in list @head * @list: the entry to test * @head: the head of the list */ static inline int list_is_last(const struct list_head *list, const struct list_head *head) { return list->next == head; } /** * list_empty - tests whether a list is empty * @head: the list to test. */ static inline int list_empty(const struct list_head *head) { return head->next == head; } /** * list_empty_careful - tests whether a list is empty and not being modified * @head: the list to test * * Description: * tests whether a list is empty _and_ checks that no other CPU might be * in the process of modifying either member (next or prev) * * NOTE: using list_empty_careful() without synchronization * can only be safe if the only activity that can happen * to the list entry is list_del_init(). Eg. it cannot be used * if another CPU could re-list_add() it. */ static inline int list_empty_careful(const struct list_head *head) { struct list_head *next = head->next; return (next == head) && (next == head->prev); } static inline void __list_splice(struct list_head *list, struct list_head *head) { struct list_head *first = list->next; struct list_head *last = list->prev; struct list_head *at = head->next; first->prev = head; head->next = first; last->next = at; at->prev = last; } /** * list_splice - join two lists * @list: the new list to add. * @head: the place to add it in the first list. */ static inline void list_splice(struct list_head *list, struct list_head *head) { if (!list_empty(list)) __list_splice(list, head); } /** * list_splice_init - join two lists and reinitialise the emptied list. * @list: the new list to add. * @head: the place to add it in the first list. * * The list at @list is reinitialised */ static inline void list_splice_init(struct list_head *list, struct list_head *head) { if (!list_empty(list)) { __list_splice(list, head); INIT_LIST_HEAD(list); } } /** * list_entry - get the struct for this entry * @ptr: the &struct list_head pointer. * @type: the type of the struct this is embedded in. * @member: the name of the list_struct within the struct. */ /** * list_first_entry - get the first element from a list * @ptr: the list head to take the element from. * @type: the type of the struct this is embedded in. * @member: the name of the list_struct within the struct. * * Note, that list is expected to be not empty. */ /** * list_for_each - iterate over a list * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. */ /** * __list_for_each - iterate over a list * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. * * This variant differs from list_for_each() in that it's the * simplest possible list iteration code, no prefetching is done. * Use this for code that knows the list to be very short (empty * or 1 entry) most of the time. */ /** * list_for_each_prev - iterate over a list backwards * @pos: the &struct list_head to use as a loop cursor. * @head: the head for your list. */ /** * list_for_each_safe - iterate over a list safe against removal of list entry * @pos: the &struct list_head to use as a loop cursor. * @n: another &struct list_head to use as temporary storage * @head: the head for your list. */ /** * list_for_each_entry - iterate over list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_struct within the struct. */ /** * list_for_each_entry_reverse - iterate backwards over list of given type. * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_struct within the struct. */ /** * list_prepare_entry - prepare a pos entry for use in list_for_each_entry_continue * @pos: the type * to use as a start point * @head: the head of the list * @member: the name of the list_struct within the struct. * * Prepares a pos entry for use as a start point in list_for_each_entry_continue. */ /** * list_for_each_entry_continue - continue iteration over list of given type * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_struct within the struct. * * Continue to iterate over list of given type, continuing after * the current position. */ /** * list_for_each_entry_from - iterate over list of given type from the current point * @pos: the type * to use as a loop cursor. * @head: the head for your list. * @member: the name of the list_struct within the struct. * * Iterate over list of given type, continuing from current position. */ /** * list_for_each_entry_safe - iterate over list of given type safe against removal of list entry * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_struct within the struct. */ /** * list_for_each_entry_safe_continue * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_struct within the struct. * * Iterate over list of given type, continuing after current point, * safe against removal of list entry. */ /** * list_for_each_entry_safe_from * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_struct within the struct. * * Iterate over list of given type from current point, safe against * removal of list entry. */ /** * list_for_each_entry_safe_reverse * @pos: the type * to use as a loop cursor. * @n: another type * to use as temporary storage * @head: the head for your list. * @member: the name of the list_struct within the struct. * * Iterate backwards over list of given type, safe against removal * of list entry. */ /* * Double linked lists with a single pointer list head. * Mostly useful for hash tables where the two pointer list head is * too wasteful. * You lose the ability to access the tail in O(1). */ struct hlist_head { struct hlist_node *first; }; struct hlist_node { struct hlist_node *next, **pprev; }; static inline void INIT_HLIST_NODE(struct hlist_node *h) { h->next = 0; h->pprev = 0; } static inline int hlist_unhashed(const struct hlist_node *h) { return !h->pprev; } static inline int hlist_empty(const struct hlist_head *h) { return !h->first; } static inline void __hlist_del(struct hlist_node *n) { struct hlist_node *next = n->next; struct hlist_node **pprev = n->pprev; *pprev = next; if (next) next->pprev = pprev; } static inline void hlist_del(struct hlist_node *n) { __hlist_del(n); n->next = ((void *)0xDEAD); n->pprev = ((void *)0xF00D); } static inline void hlist_del_init(struct hlist_node *n) { if (!hlist_unhashed(n)) { __hlist_del(n); INIT_HLIST_NODE(n); } } static inline void hlist_add_head(struct hlist_node *n, struct hlist_head *h) { struct hlist_node *first = h->first; n->next = first; if (first) first->pprev = &n->next; h->first = n; n->pprev = &h->first; } /* next must be != NULL */ static inline void hlist_add_before(struct hlist_node *n, struct hlist_node *next) { n->pprev = next->pprev; n->next = next; next->pprev = &n->next; *(n->pprev) = n; } static inline void hlist_add_after(struct hlist_node *n, struct hlist_node *next) { next->next = n->next; n->next = next; next->pprev = &n->next; if(next->next) next->next->pprev = &next->next; } /** * hlist_for_each_entry - iterate over list of given type * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_node to use as a loop cursor. * @head: the head for your list. * @member: the name of the hlist_node within the struct. */ /** * hlist_for_each_entry_continue - iterate over a hlist continuing after current point * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_node to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ /** * hlist_for_each_entry_from - iterate over a hlist continuing from current point * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_node to use as a loop cursor. * @member: the name of the hlist_node within the struct. */ /** * hlist_for_each_entry_safe - iterate over list of given type safe against removal of list entry * @tpos: the type * to use as a loop cursor. * @pos: the &struct hlist_node to use as a loop cursor. * @n: another &struct hlist_node to use as temporary storage * @head: the head for your list. * @member: the name of the hlist_node within the struct. */ // clang-format off typedef int (*delayed_event_callback_t)(void* data); struct delayed_event_t { struct list_head head; dword timer_ticks_remaining; dword event_interval_time_ticks; delayed_event_callback_t callback; void* data; byte periodic_flag; byte keep_used_when_done; }; void GPT_init_timer_and_list(); struct delayed_event_t* GPT_get_free_event_slot(); int GPT_add_new_event(struct delayed_event_t* event_in); extern inline dword GPT_timer_ticks_to_us(word ticks); extern inline dword GPT_us_to_timer_ticks(dword us_in); struct gpt_internal_t { struct delayed_event_t events_store[6]; struct list_head free_events_queue; struct list_head used_events_queue; uint16_t ccr_value; }; static struct gpt_internal_t gpt_internal; void GPT_init_timer_and_list() { TB1CTL = (0x0200) | (0x0000) | (0x0040) | (0x0000) | (0x0004); // 16bit counter, use SMCLK 20MHz, f/2, // start in stop mode TB1EX0 = (0x0004); // f/5 ==> 2MHz TB1CCTL0 = 0; memset(&gpt_internal, 0, sizeof(struct gpt_internal_t)); INIT_LIST_HEAD(&gpt_internal.free_events_queue); INIT_LIST_HEAD(&gpt_internal.used_events_queue); byte x; for (x = 0; x < 6; x++) { list_add_tail(&gpt_internal.events_store[x].head, &gpt_internal.free_events_queue); } } static inline uint16_t GPT_get_timer_value() { // MSP430FR4xx and MSP430FR2xx family User Guide, §14.2.1 "16-Bit Timer Counter" // // Care must be taken when accessing TBxR. // If TBxR is accessed (read or write) by the CPU while the timer is running, // the value that is read from TBxR or the value that is written to TBxR could be unpredictable. // To avoid this uncertainty, the timer should be stopped by writing the MC bits to zero before accessing TBxR. // For read, alternatively TBxR can be read multiple times while the timer is running, and a majority vote taken in // software to determine the correct reading. uint16_t first_vote, second_vote, res; second_vote = TB1R; do { first_vote = second_vote; second_vote = TB1R; if (second_vote > first_vote) res = second_vote - first_vote; else if (first_vote > second_vote) res = first_vote - second_vote; else res = 0; } while (res > 50); return second_vote; } inline dword GPT_us_to_timer_ticks(dword us_in) { return us_in * 2; } #pragma CODE_SECTION(GPT_timer_ticks_to_us, ".TI.ramfunc") inline dword GPT_timer_ticks_to_us(word ticks) { return (dword)ticks / 2; } struct delayed_event_t* GPT_get_free_event_slot() { struct delayed_event_t* out = 0; if (!list_empty(&gpt_internal.free_events_queue)) { out = ({ const typeof( ((struct delayed_event_t *)0)->head ) *__mptr = (gpt_internal . free_events_queue . next); (struct delayed_event_t *)( (char *)__mptr - ((size_t)(&((struct delayed_event_t *)0)->head)) );}); list_del(&out->head); } return out; } int GPT_add_new_event(struct delayed_event_t* event_in) { struct delayed_event_t* event; uint16_t timer_value; event_in->timer_ticks_remaining = event_in->event_interval_time_ticks; if (list_empty(&gpt_internal.used_events_queue)) { if (event_in->timer_ticks_remaining > (dword)0xffff) gpt_internal.ccr_value = TB1CCR0 = 0xffff; else gpt_internal.ccr_value = TB1CCR0 = event_in->timer_ticks_remaining; list_add(&event_in->head, &gpt_internal.used_events_queue); TB1CTL |= (0x0010) | (0x0004); // Start timer in UP mode TB1CCTL0 |= (0x0010); // Enable TIMER1_B0_VECTOR interrupt } else { timer_value = GPT_get_timer_value(); if (event_in->timer_ticks_remaining < (gpt_internal.ccr_value - timer_value)) { TB1CTL |= (0x0004); gpt_internal.ccr_value = TB1CCR0 = event_in->timer_ticks_remaining; for (event = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = ((&gpt_internal . used_events_queue)->next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );}); prefetch(event->head . next), &event->head != (&gpt_internal . used_events_queue); event = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = (event->head . next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );})) { event->timer_ticks_remaining -= timer_value; } } for (event = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = ((&gpt_internal . used_events_queue)->next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );}); prefetch(event->head . next), &event->head != (&gpt_internal . used_events_queue); event = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = (event->head . next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );})) { if (event_in->timer_ticks_remaining < event->timer_ticks_remaining) { list_add_tail(&event_in->head, &event->head); break; } else if (list_is_last(&event->head, &gpt_internal.used_events_queue)) { list_add(&event_in->head, &event->head); break; } } } return 0; } #pragma diag_push #pragma diag_suppress 1538 #pragma vector = (41 * 1u) __interrupt void GPT_timer_expired(void) { struct delayed_event_t* event; struct delayed_event_t* tmp; struct list_head reload_list = { &(reload_list), &(reload_list) }; // ###FOR### for (event = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = ((&gpt_internal . used_events_queue)->next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );}), tmp = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = (event->head . next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );}); &event->head != (&gpt_internal . used_events_queue); event = tmp, tmp = ({ const typeof( ((typeof(*tmp) *)0)->head ) *__mptr = (tmp->head . next); (typeof(*tmp) *)( (char *)__mptr - ((size_t)(&((typeof(*tmp) *)0)->head)) );})) { if (event->timer_ticks_remaining <= gpt_internal.ccr_value) { event->callback(event->data); if (event->periodic_flag) { list_move(&event->head, &reload_list); } else { if (!event->keep_used_when_done) { list_move(&event->head, &gpt_internal.free_events_queue); } else { list_del(&event->head); } } } else { event->timer_ticks_remaining -= gpt_internal.ccr_value; } } // ###FOR### for (event = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = ((&reload_list)->next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );}), tmp = ({ const typeof( ((typeof(*event) *)0)->head ) *__mptr = (event->head . next); (typeof(*event) *)( (char *)__mptr - ((size_t)(&((typeof(*event) *)0)->head)) );}); &event->head != (&reload_list); event = tmp, tmp = ({ const typeof( ((typeof(*tmp) *)0)->head ) *__mptr = (tmp->head . next); (typeof(*tmp) *)( (char *)__mptr - ((size_t)(&((typeof(*tmp) *)0)->head)) );})) { event->timer_ticks_remaining = event->event_interval_time_ticks; if (list_empty(&gpt_internal.used_events_queue)) { list_add(&event->head, &gpt_internal.used_events_queue); } else { struct delayed_event_t* search; for (search = ({ const typeof( ((typeof(*search) *)0)->head ) *__mptr = ((&gpt_internal . used_events_queue)->next); (typeof(*search) *)( (char *)__mptr - ((size_t)(&((typeof(*search) *)0)->head)) );}); prefetch(search->head . next), &search->head != (&gpt_internal . used_events_queue); search = ({ const typeof( ((typeof(*search) *)0)->head ) *__mptr = (search->head . next); (typeof(*search) *)( (char *)__mptr - ((size_t)(&((typeof(*search) *)0)->head)) );})) { if (event->timer_ticks_remaining < search->timer_ticks_remaining) { list_add_tail(&event->head, &search->head); } else if (list_is_last(&search->head, &gpt_internal.used_events_queue)) { list_add(&event->head, &search->head); } } } } if (list_empty(&gpt_internal.used_events_queue)) { TB1CCTL0 &= ~(0x0010); // stop interrupts TB1CTL = (TB1CTL & (~((0x0010) | (0x0020)))); } else { event = ({ const typeof( ((struct delayed_event_t *)0)->head ) *__mptr = ((&gpt_internal . used_events_queue)->next); (struct delayed_event_t *)( (char *)__mptr - ((size_t)(&((struct delayed_event_t *)0)->head)) );}); if (event->timer_ticks_remaining > 0xffff) { gpt_internal.ccr_value = TB1CCR0 = 0xffff; } else { gpt_internal.ccr_value = TB1CCR0 = event->timer_ticks_remaining; } } } #pragma diag_pop