#include "f28x_project.h"

#include "cmpss.h"

void CMPSS2_init()
{
    EALLOW;
    //
    // Select the value for CMP1HPMXSEL.
    //
    AnalogSubsysRegs.CMPHPMXSEL.bit.CMP2HPMXSEL = 2;//选择hp的比较值端口A10
    
    //
    // Select the value for CMP1LPMXSEL.
    //
//    ASysCtl_selectCMPLPMux(ASYSCTL_CMPLPMUX_SELECT_1,0U);
    //
    // Sets the configuration for the high comparator.
    //
//    CMPSS_configHighComparator(myCMPSS0_BASE,(CMPSS_INSRC_DAC));
    Cmpss2Regs.COMPCTL.bit.COMPHSOURCE = 0;

    //
    // Sets the configuration for the low comparator.
    //
//    CMPSS_configLowComparator(myCMPSS0_BASE,(CMPSS_INSRC_DAC));
    //
    // Sets the configuration for the internal comparator DACs.
    //
//    CMPSS_configDAC(myCMPSS0_BASE,(CMPSS_DACVAL_SYSCLK | CMPSS_DACREF_VDDA | CMPSS_DACSRC_SHDW));
    Cmpss2Regs.COMPDACCTL.bit.DACSOURCE = 0;//选择dac
    Cmpss2Regs.COMPDACCTL.bit.SWLOADSEL = 0;//选择updated from DACxVALS on SYSCLK
    Cmpss2Regs.COMPDACCTL.bit.SELREF    = 0;//选择vdda
    //
    // Sets the value of the internal DAC of the high comparator.
    //
//    CMPSS_setDACValueHigh(myCMPSS0_BASE,2048U);
    Cmpss2Regs.DACHVALS.bit.DACVAL =  2048;

    //
    // Sets the value of the internal DAC of the low comparator.
    //
//    CMPSS_setDACValueLow(myCMPSS0_BASE,0U);
    //
    //  Configures the digital filter of the high comparator.
    //
//    CMPSS_configFilterHigh(myCMPSS0_BASE, 1023U, 32U, 31U);
    Cmpss2Regs.COMPCTL.bit.COMPHINV = 0;//取反

    Cmpss2Regs.CTRIPHFILCLKCTL.bit.CLKPRESCALE = 9;//10m

    Cmpss2Regs.CTRIPHFILCTL.bit.THRESH   = 8;//1.2m>设定判断值
    
    Cmpss2Regs.CTRIPHFILCTL.bit.SAMPWIN  = 9;//1m

    Cmpss2Regs.CTRIPHFILCTL.bit.FILINIT  = 1;//初始化滤波器
    
    //
    // Configures the digital filter of the low comparator.
    //
//    CMPSS_configFilterLow(myCMPSS0_BASE, 0U, 1U, 1U);
    //
    // Initializes the digital filter of the high comparator.
    //
//    CMPSS_initFilterHigh(myCMPSS0_BASE);
    //
    // Sets the output signal configuration for the high comparator.
    //
//    CMPSS_configOutputsHigh(myCMPSS0_BASE,(CMPSS_TRIPOUT_FILTER | CMPSS_TRIP_FILTER));
    Cmpss2Regs.COMPCTL.bit.CTRIPHSEL = 2;
    //
    // Sets the output signal configuration for the low comparator.
    //
//    CMPSS_configOutputsLow(myCMPSS0_BASE,(CMPSS_TRIPOUT_ASYNC_COMP | CMPSS_TRIP_ASYNC_COMP));
    //
    // Sets the comparator hysteresis settings.
    //
//    CMPSS_setHysteresis(myCMPSS0_BASE,0U);
     Cmpss2Regs.COMPHYSCTL.bit.COMPHYS = 0;//比较器滞后

    //
    // Configures the comparator subsystem's ramp generator.
    //
//    CMPSS_configRamp(myCMPSS0_BASE,0U,0U,0U,1U,true);
    //
    // Disables reset of HIGH comparator digital filter output latch on PWMSYNC
    //
//    CMPSS_disableLatchResetOnPWMSYNCHigh(myCMPSS0_BASE);
    //
    // Disables reset of LOW comparator digital filter output latch on PWMSYNC
    //
//    CMPSS_disableLatchResetOnPWMSYNCLow(myCMPSS0_BASE);
    //
    // Sets the ePWM module blanking signal that holds trip in reset.
    //
//    CMPSS_configBlanking(myCMPSS0_BASE,1U);
    //
    // Disables an ePWM blanking signal from holding trip in reset.
    //
//    CMPSS_disableBlanking(myCMPSS0_BASE);
    //
    // Configures whether or not the digital filter latches are reset by PWMSYNC
    //
//    CMPSS_configLatchOnPWMSYNC(myCMPSS0_BASE,false,false);
    //
    // Enables the CMPSS module.
    //
//    CMPSS_enableModule(myCMPSS0_BASE);
    Cmpss2Regs.COMPCTL.bit.COMPDACE = 1;
    
    EDIS;
    //
    // Delay for CMPSS DAC to power up.
    //
//    DEVICE_DELAY_US(500);
    DELAY_US(1000);
}

//==================================================================================================

