MEMORY
{
PAGE 0 :  /* Program Memory */
          /* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
          /* BEGIN is used for the "boot to Flash" bootloader mode   */


   RAMM           	: origin = 0x000002, length = 0x0007F6   /* on-chip block M0 and M1 */
   // RAM1_RSVD     : origin = 0x0007F8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   FREERTOS_STACK_RAMLS : origin = 0x008000, length = 0x002000 //End Address = 0x009FFF
   RAMLS_AND_RAMGS      : origin = 0x00A000, length = 0x011FF8 //0x00A000+0x011FF8-1 = End Address = 0x01BFF7
   // RAMGS15_RSVD     : origin = 0x01BFF8, length = 0x000008    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RESET           	: origin = 0x3FFFC0, length = 0x000002

#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 20012000
GROUP {      /* GROUP memory ranges for crc/checksum of entire flash */
   #endif
#endif
   /* Flash sectors */
   BEGIN              : origin = 0x080000, length = 0x000002
   FLASH0             : origin = 0x080002, length = 0x03FFFE  //0x03FFFF 0x07FFEE
   //FLASH1_DO_NOT_USE1 : origin = 0x0C0000, length = 0x001000
   FLASH1             : origin = 0x0C0000, length = 0x03FFF0   //0x03FFFF 0x07FFEE   FLASH0
   FLASH1_DO_NOT_USE2 : origin = 0x0FFFF0, length = 0x000010    /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
#ifdef __TI_COMPILER_VERSION__
  #if __TI_COMPILER_VERSION__ >= 20012000
}  crc(_ccs_flash_checksum, algorithm=C28_CHECKSUM_16)
  #endif
#endif

	PIECTRL    		: origin = 0x00000CE0, length = 0x0000001A
	SCIB      		: origin = 0x00007210, length = 0x00000010     /* SCI-B registers */
	GPIOCTRL       	: origin = 0x00007C00, length = 0x00000180
	GPIODATA    	: origin = 0x00007F00, length = 0x00000030
	CLKCFG       	: origin = 0x0005D200, length = 0x00000032
PAGE 1 : /* Data Memory */
   EXTERNAL_SRAM_CS3: origin = 0x0300000, length = 0x80000

}


SECTIONS
{
   /* Allocate program areas: */
   .cinit              : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   .text               : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   codestart           : > BEGIN                           PAGE = 0, ALIGN(4)

   /* Allocate uninitalized data sections: */
   .stack              : > RAMM                            PAGE = 0
   .switch             : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)
   .reset              : > RESET,                          PAGE = 0, TYPE = DSECT /* not used, */

   .init_array         : > FLASH0,                         PAGE = 0, ALIGN(4)
   .bss                : > RAMLS_AND_RAMGS,                PAGE = 0
   .bss:output         : > RAMLS_AND_RAMGS,                PAGE = 0
   .bss:cio            : > RAMLS_AND_RAMGS,                PAGE = 0
   .data               : > RAMLS_AND_RAMGS,                PAGE = 0
   .sysmem             : > RAMLS_AND_RAMGS,                PAGE = 0

   .freertosStaticStack : > FREERTOS_STACK_RAMLS           PAGE = 0

   /* Initalized sections go in Flash */
   .const              : > FLASH0|FLASH1,                 PAGE = 0, ALIGN(4)

   Filter_RegsFile     : > RAMLS_AND_RAMGS,	               PAGE = 0

   ramgs0              : > RAMLS_AND_RAMGS,                PAGE = 0
   ramgs1              : > RAMLS_AND_RAMGS,                PAGE = 0

	GpioCtrlRegsFile  	: > GPIOCTRL, 	PAGE = 0
	GpioDataRegsFile  	: > GPIODATA, 	PAGE = 0
	PieCtrlRegsFile   	: > PIECTRL, 	PAGE = 0
	ScibRegsFile    	: > SCIB,     	PAGE = 0
	ClkCfgRegsFile    	: > CLKCFG, 	PAGE = 0

   TRACEBACE_SECTION : > EXTERNAL_SRAM_CS3,                PAGE = 1



#ifdef __TI_COMPILER_VERSION__
   #if __TI_COMPILER_VERSION__ >= 15009000
  .TI.ramfunc : {} LOAD = FLASH1,
                   RUN = RAMLS_AND_RAMGS,
                   LOAD_START(RamfuncsLoadStart),
                   LOAD_SIZE(RamfuncsLoadSize),
                   LOAD_END(RamfuncsLoadEnd),
                   RUN_START(RamfuncsRunStart),
                   RUN_SIZE(RamfuncsRunSize),
                   RUN_END(RamfuncsRunEnd),
                   PAGE = 0, ALIGN(4)
   #else
     ramfuncs : {} LOAD = FLASH1,
                   RUN = RAMLS_AND_RAMGS,
                   LOAD_START(RamfuncsLoadStart),
                   LOAD_SIZE(RamfuncsLoadSize),
                   LOAD_END(RamfuncsLoadEnd),
                   RUN_START(RamfuncsRunStart),
                   RUN_SIZE(RamfuncsRunSize),
                   RUN_END(RamfuncsRunEnd),
                   PAGE = 0, ALIGN(4)
   #endif
#endif

}

/*
//===========================================================================
// End of file.
//===========================================================================
*/