/* * isr.c * * Created on: 02-Dec-2025 * Author: MuntahaNazir */ /* * isr.c * * Created on: 17-Nov-2025 * Author: muntaha.nazir */ #include "driverlib.h" #include "device.h" #include "board.h" #include "init_buffer.h" #include #include "init_adc.h" #include "isr.h" #include "can_com.h" #include "i2cLib_FIFO_polling.h" int i; float32_t Ambient_temperature; float32_t AmbienttoMV; float32_t Temperature_SEC_CHA; float32_t Temperature_SEC_CHB; float32_t Temperature_SEC_CHC; float32_t Temperature_SEC_CHD; uint16_t Full_latch; uint16_t Fn_oncommand; uint16_t Fn_oncommandSV1; uint16_t Fn_oncommandSV2; uint16_t Fn_oncommandSV3; uint16_t Fn_oncommandSV4; uint16_t Fn_oncommandSV1_4; uint16_t Fn_oncommandSV5; uint16_t Fn_oncommandSV6; uint16_t Fn_oncommandSV7; uint16_t Fn_oncommandSV8; uint16_t Fn_oncommandSV5_8; uint16_t Fn_oncommandSV9; uint16_t Fn_oncommandSV10; uint16_t Fn_oncommandSV11; uint16_t Fn_oncommandSV12; uint16_t Fn_oncommandSV9_12; uint16_t Fn_oncommandSV13; uint16_t Fn_oncommandSV14; uint16_t Fn_oncommandSV15; uint16_t Fn_oncommandSV16; uint16_t Fn_oncommandSV13_16; uint16_t unitID; uint16_t selected; uint16_t cpuTimer0IntCount; uint16_t cpuTimer1IntCount; uint16_t cpuTimer2IntCount; uint16_t g_targetChannel ; #define EEP_mCHANNEL1_ADRSS (0U) #define EEP_mCHANNEL2_ADRSS (7U) #define EEP_mCHANNEL3_ADRSS (14U) #define EEP_mCHANNEL4_ADRSS (21U) #define EEP_mCHANNEL5_ADRSS (28U) #define EEP_mCHANNEL6_ADRSS (35U) #define EEP_mCHANNEL7_ADRSS (42U) #define EEP_mCHANNEL8_ADRSS (49U) #define EEP_mCHANNEL9_ADRSS (56U) #define EEP_mCHANNEL10_ADRSS (63U) #define EEP_mCHANNEL11_ADRSS (70U) #define EEP_mCHANNEL12_ADRSS (77U) #define EEP_mCHANNEL13_ADRSS (84U) #define EEP_mCHANNEL14_ADRSS (91U) #define EEP_mCHANNEL15_ADRSS (98U) #define EEP_mCHANNEL16_ADRSS (105U) // New: OFFSETS block, same stride, starts at 112 #define EEP_mOFFSET_CHANNEL1_ADRSS (112U) #define EEP_mOFFSET_CHANNEL2_ADRSS (119U) #define EEP_mOFFSET_CHANNEL3_ADRSS (126U) #define EEP_mOFFSET_CHANNEL4_ADRSS (133U) #define EEP_mOFFSET_CHANNEL5_ADRSS (140U) #define EEP_mOFFSET_CHANNEL6_ADRSS (147U) #define EEP_mOFFSET_CHANNEL7_ADRSS (154U) #define EEP_mOFFSET_CHANNEL8_ADRSS (161U) #define EEP_mOFFSET_CHANNEL9_ADRSS (168U) #define EEP_mOFFSET_CHANNEL10_ADRSS (175U) #define EEP_mOFFSET_CHANNEL11_ADRSS (182U) #define EEP_mOFFSET_CHANNEL12_ADRSS (189U) #define EEP_mOFFSET_CHANNEL13_ADRSS (196U) #define EEP_mOFFSET_CHANNEL14_ADRSS (203U) #define EEP_mOFFSET_CHANNEL15_ADRSS (210U) #define EEP_mOFFSET_CHANNEL16_ADRSS (217U) // Globals //struct I2CHandle EEPROM; struct I2CHandle *currentMsgPtr; // Kept for parity with original uint16_t passCount = 0; uint16_t failCount = 0; //uint16_t on_comand; float32_t temp; typedef enum { write=1, read=2, resetall=3, read_all=4, reset=5 } EepromCmd; //uint16_t AvailableI2C_targets[20]; //uint16_t TX_MsgBuffer[MAX_BUFFER_SIZE]; //uint16_t RX_MsgBuffer[MAX_BUFFER_SIZE]; //uint32_t ControlAddr; //uint16_t status; // Number of ISR ticks to wait //static const uint32_t g_isrPeriod_us = 1000U; // Timer0 ISR period in microseconds float32_t var; float32_t var1; float32_t var2; float32_t var3; float32_t var4; float32_t var5; float32_t var6; float32_t var7; float32_t var8; float32_t var9; float32_t var10; float32_t var11; float32_t var12; float32_t var13; float32_t var14; float32_t var15; float32_t g_channel_offset; // ch 1 float32_t g_channel_offset1; // ch 2 float32_t g_channel_offset2; // ch 3 float32_t g_channel_offset3; // ch 4 float32_t g_channel_offset4; // ch 5 float32_t g_channel_offset5; // ch 6 float32_t g_channel_offset6; // ch 7 float32_t g_channel_offset7; // ch 8 float32_t g_channel_offset8; // ch 9 float32_t g_channel_offset9; // ch 10 float32_t g_channel_offset10; // ch 11 float32_t g_channel_offset11; // ch 12 float32_t g_channel_offset12; // ch 13 float32_t g_channel_offset13; // ch 14 float32_t g_channel_offset14; // ch 15 float32_t g_channel_offset15; float32_t* var_by_channel(uint16_t ch); float32_t* offset_by_channel(uint16_t ch);// ch 16 float32_t* var_by_channel(uint16_t ch) { switch (ch) { case 1: return &var; case 2: return &var1; case 3: return &var2; case 4: return &var3; case 5: return &var4; case 6: return &var5; case 7: return &var6; case 8: return &var7; case 9: return &var8; case 10: return &var9; case 11: return &var10; case 12: return &var11; case 13: return &var12; case 14: return &var13; // NOTE: check mapping matches your intent case 15: return &var14; // If you want var14 <-> channel 14, swap these two lines: case 16: return &var15; // case 14: &var14; case 15: &var15; default: return &var; } } float32_t* offset_by_channel(uint16_t ch) { switch (ch) { case 1: return &g_channel_offset; case 2: return &g_channel_offset1; case 3: return &g_channel_offset2; case 4: return &g_channel_offset3; case 5: return &g_channel_offset4; case 6: return &g_channel_offset5; case 7: return &g_channel_offset6; case 8: return &g_channel_offset7; case 9: return &g_channel_offset8; case 10: return &g_channel_offset9; case 11: return &g_channel_offset10; case 12: return &g_channel_offset11; case 13: return &g_channel_offset12; case 14: return &g_channel_offset13; case 15: return &g_channel_offset14; case 16: return &g_channel_offset15; default: return &g_channel_offset; } } // Prototypes void fail(void); void pass(void); float g_channel_values[16] = {0}; float g_channel_offsets[16] = {0}; void I2C_GPIO_init(void); void I2Cinit(void); void verifyEEPROMRead(void); __interrupt void INT_myADC0_1_ISR(void); void initEPWM(void); void initCPUTimers(void); void configCPUTimer(uint32_t, float, float); static inline uint16_t eep_addr_by_channel(uint16_t ch) { switch (ch) { case 1: return EEP_mCHANNEL1_ADRSS; case 2: return EEP_mCHANNEL2_ADRSS; case 3: return EEP_mCHANNEL3_ADRSS; case 4: return EEP_mCHANNEL4_ADRSS; case 5: return EEP_mCHANNEL5_ADRSS; case 6: return EEP_mCHANNEL6_ADRSS; case 7: return EEP_mCHANNEL7_ADRSS; case 8: return EEP_mCHANNEL8_ADRSS; case 9: return EEP_mCHANNEL9_ADRSS; case 10: return EEP_mCHANNEL10_ADRSS; case 11: return EEP_mCHANNEL11_ADRSS; case 12: return EEP_mCHANNEL12_ADRSS; case 13: return EEP_mCHANNEL13_ADRSS; case 14: return EEP_mCHANNEL14_ADRSS; case 15: return EEP_mCHANNEL15_ADRSS; case 16: return EEP_mCHANNEL16_ADRSS; default: return EEP_mCHANNEL1_ADRSS; // fallback } } static inline uint16_t eep_offset_addr_by_channel(uint16_t ch) { switch (ch) { case 1: return EEP_mOFFSET_CHANNEL1_ADRSS; case 2: return EEP_mOFFSET_CHANNEL2_ADRSS; case 3: return EEP_mOFFSET_CHANNEL3_ADRSS; case 4: return EEP_mOFFSET_CHANNEL4_ADRSS; case 5: return EEP_mOFFSET_CHANNEL5_ADRSS; case 6: return EEP_mOFFSET_CHANNEL6_ADRSS; case 7: return EEP_mOFFSET_CHANNEL7_ADRSS; case 8: return EEP_mOFFSET_CHANNEL8_ADRSS; case 9: return EEP_mOFFSET_CHANNEL9_ADRSS; case 10: return EEP_mOFFSET_CHANNEL10_ADRSS; case 11: return EEP_mOFFSET_CHANNEL11_ADRSS; case 12: return EEP_mOFFSET_CHANNEL12_ADRSS; case 13: return EEP_mOFFSET_CHANNEL13_ADRSS; case 14: return EEP_mOFFSET_CHANNEL14_ADRSS; case 15: return EEP_mOFFSET_CHANNEL15_ADRSS; case 16: return EEP_mOFFSET_CHANNEL16_ADRSS; default: return EEP_mOFFSET_CHANNEL1_ADRSS; // fallback } } static inline void float_to_bytes_le(float f, uint8_t b[4]) { uint32_t u; memcpy(&u, &f, sizeof(float)); b[0] = (uint8_t)(u >> 0); b[1] = (uint8_t)(u >> 8); b[2] = (uint8_t)(u >> 16); b[3] = (uint8_t)(u >> 24); } float bytes_to_float_le(const uint8_t b[4]) { uint32_t u = ((uint32_t)b[0] << 0) | ((uint32_t)b[1] << 8) | ((uint32_t)b[2] << 16)| ((uint32_t)b[3] << 24); float f; memcpy(&f, &u, sizeof(float)); return f; } uint32_t ENABLE[17] = {myGPIO8,myGPIO9, myGPIO10 , myGPIO12, myGPIO13, myGPIO14, myGPIO15, myGPIO16, myGPIO17, myGPIO11, myGPIO19, myGPIO20, myGPIO21, myGPIO22,myGPIO23,myGPIO24}; uint32_t Fault[4]={myGPIO27,myGPIO28}; uint16_t selected_idx[16] = {0}; void dsp_toggle(void); void dsp_toggle(void) { GPIO_togglePin(myGPIO32); } void initEPWM(void) { // // Disable SOCA // EPWM_disableADCTrigger(EPWM1_BASE, EPWM_SOC_A); // // Configure the SOC to occur on the first up-count event // EPWM_setADCTriggerSource(EPWM1_BASE, EPWM_SOC_A, EPWM_SOC_TBCTR_ZERO_OR_PERIOD ); EPWM_setADCTriggerEventPrescale(EPWM1_BASE, EPWM_SOC_A, 1); // // Set the compare A value to 1000 and the period to 1999 // Assuming ePWM clock is 100MHz, this would give 50kHz sampling // 50MHz ePWM clock would give 25kHz sampling, etc. // The sample rate can also be modulated by changing the ePWM period // directly (ensure that the compare A value is less than the period). // //EPWM_setCounterCompareValue(EPWM1_BASE, EPWM_COUNTER_COMPARE_A, 10000); EPWM_setTimeBasePeriod(EPWM1_BASE, 7000); // // Set the local ePWM module clock divider to /1 // EPWM_setClockPrescaler(EPWM1_BASE, EPWM_CLOCK_DIVIDER_1, EPWM_HSCLOCK_DIVIDER_1); // // Freeze the counter // EPWM_setTimeBaseCounterMode(EPWM1_BASE, EPWM_COUNTER_MODE_UP_DOWN ); } void initCPUTimers(void) { CPUTimer_setPeriod(CPUTIMER0_BASE, 0xFFFFFFFF); CPUTimer_setPreScaler(CPUTIMER0_BASE, 0); CPUTimer_stopTimer(CPUTIMER0_BASE); CPUTimer_reloadTimerCounter(CPUTIMER0_BASE); cpuTimer0IntCount = 0; } // Configure CPU timer void configCPUTimer(uint32_t cpuTimer, float freq, float period) { uint32_t temp; temp = (uint32_t)((freq / 1000000) * period); CPUTimer_setPeriod(cpuTimer, temp - 1); CPUTimer_setPreScaler(cpuTimer, 0); CPUTimer_stopTimer(cpuTimer); CPUTimer_reloadTimerCounter(cpuTimer); CPUTimer_setEmulationMode(cpuTimer, CPUTIMER_EMULATIONMODE_STOPAFTERNEXTDECREMENT); CPUTimer_enableInterrupt(cpuTimer); if(cpuTimer == CPUTIMER0_BASE) { cpuTimer0IntCount = 0; } } __interrupt void adcA1ISR(void) { //dsp_toggle(); // // Store results // // GPIO_writePin(myGPIO32,1); // // Clear the interrupt flag // MEAS_fnCopyADCResults(); MEAS_fnInitADCParams(); MEAS_fnFilterAndScaling(); ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1); // Check if overflow has occurred // if(true == ADC_getInterruptOverflowStatus(ADCA_BASE, ADC_INT_NUMBER1)) { ADC_clearInterruptOverflowStatus(ADCA_BASE, ADC_INT_NUMBER1); ADC_clearInterruptStatus(ADCA_BASE, ADC_INT_NUMBER1); } // // Acknowledge the interrupt // buffernumber.bit.Input_buffer1= GPIO_readPin(myGPIO0); buffernumber.bit.Input_buffer2= GPIO_readPin(myGPIO1); buffernumber.bit.Input_buffer3= GPIO_readPin(myGPIO2); buffernumber.bit.Input_buffer4= GPIO_readPin(myGPIO4); buffernumber.bit.Input_buffer5= GPIO_readPin(myGPIO5); buffernumber.bit.Input_buffer6= GPIO_readPin(myGPIO6); buffernumber.bit.Input_buffer7= GPIO_readPin(myGPIO7); buffernumber.bit.Input_buffer8= GPIO_readPin(myGPIO3); faultstatus.bit.fault1=GPIO_readPin(myGPIO28);//DSPFAULT faultstatus.bit.fault2=!GPIO_readPin(myGPIO18); faultstatus.bit.fault3 =!GPIO_readPin(myGPIO27); // faultstatus.bit.fault5 = GPIO_readPin(myGPIO28); dsp_toggle(); // GPIO_togglePin(myGPIO32); //GPIO_writePin(myGPIO32,0); Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1); } __interrupt void cpuTimer0ISR(void) { cpuTimer0IntCount++; // GPIO_togglePin(myGPIO32); // GPIO_writePin(myGPIO28,1); // Call CAN transmit and receive inside ISR can_transmit(); can_recieve(); uint16_t selected_idx[16]={0}; if( cpuTimer0IntCount==2) { Reset=1; GPIO_writePin(myGPIO33,1); DEVICE_DELAY_US(1000); GPIO_writePin(myGPIO33,0); Reset=0; } if (faultstatus.all != 0x1F) { Full_latch = 1; } // Clear latch only when Reset pressed AND all faults cleared if (Reset == 1 && faultstatus.all == 0x1F) { Full_latch = 0; } // Enable logic if ((Fn_oncommand == 1)) { // Enable ALL channels for (i = 0; i < 16; i++) { GPIO_writePin(ENABLE[i], 1); } } else if ((Fn_oncommand == 0)) { GPIO_writePin(ENABLE[0], (Fn_oncommandSV1 ? 1 : 0)); GPIO_writePin(ENABLE[1], (Fn_oncommandSV2 ? 1 : 0)); GPIO_writePin(ENABLE[2], (Fn_oncommandSV3 ? 1 : 0)); GPIO_writePin(ENABLE[3], (Fn_oncommandSV4 ? 1 : 0)); GPIO_writePin(ENABLE[4], (Fn_oncommandSV5 ? 1 : 0)); GPIO_writePin(ENABLE[5], (Fn_oncommandSV6 ? 1 : 0)); GPIO_writePin(ENABLE[6], (Fn_oncommandSV7 ? 1 : 0)); GPIO_writePin(ENABLE[7], (Fn_oncommandSV8 ? 1 : 0)); GPIO_writePin(ENABLE[8], (Fn_oncommandSV9 ? 1 : 0)); GPIO_writePin(ENABLE[9], (Fn_oncommandSV10 ? 1 : 0)); GPIO_writePin(ENABLE[10], (Fn_oncommandSV11 ? 1 : 0)); GPIO_writePin(ENABLE[11], (Fn_oncommandSV12 ? 1 : 0)); GPIO_writePin(ENABLE[12], (Fn_oncommandSV13 ? 1 : 0)); GPIO_writePin(ENABLE[13], (Fn_oncommandSV14 ? 1 : 0)); GPIO_writePin(ENABLE[14], (Fn_oncommandSV15 ? 1 : 0)); GPIO_writePin(ENABLE[15], (Fn_oncommandSV16 ? 1 : 0)); } // else if ((Fn_oncommand == 0)) { // // Enable ALL channels // for (i = 0; i < 16; i++) { // GPIO_writePin(ENABLE[i], 0); // } // } //dsp_toggle(); if (Reset==1) { GPIO_writePin(myGPIO33,1); } else if (Reset==0) { GPIO_writePin(myGPIO33,0); } //uint32_t id_1; //uint32_t uid = (uint32_t)(unitID & 0x0F); // id_1 = 0x10174000U | uid; // //CAN_setupMessageObject(CANA_BASE, RX_MSG_OBJ_ID1, id_1, // CAN_MSG_FRAME_EXT, CAN_MSG_OBJ_TYPE_RX, 0, // CAN_MSG_OBJ_NO_FLAGS, MSG_DATA_LENGTH); Ambient_temperature=ambTemp( adcStruct[ambient].converted_value); AmbienttoMV=MEAS_getMV( Ambient_temperature); Temperature_SEC_CHA = MEAS_fnGetTemp(adcStruct[Temp_DSP1].Filtered_value1); Temperature_SEC_CHB = MEAS_fnGetTemp(adcStruct[Temp_DSP2].Filtered_value1); Temperature_SEC_CHC = MEAS_fnGetTemp(adcStruct[Temp_DSP3].Filtered_value1); Temperature_SEC_CHD = MEAS_fnGetTemp(adcStruct[Temp_DSP4].Filtered_value1); //uint8_t b[4]; //uint8_t b4[4]; // uint16_t ch; // float *p; // float *p_off; // switch (on_comand) // { // case write: // // Write var (1 byte) to address 0x0000 // p = var_by_channel(g_targetChannel); // uint16_t addr = eep_addr_by_channel(g_targetChannel); // // ControlAddr = addr; // EEPROM.NumOfDataBytes = 4; // // float_to_bytes_le(*p, b); // // TX_MsgBuffer[0] = (uint16_t)b[0]; // TX_MsgBuffer[1] = (uint16_t)b[1]; // TX_MsgBuffer[2] = (uint16_t)b[2]; // TX_MsgBuffer[3] = (uint16_t)b[3]; // EEPROM.pTX_MsgBuffer = &TX_MsgBuffer[0]; // status = I2C_ControllerTransmitter(&EEPROM); // DEVICE_DELAY_US(EEPROM.WriteCycleTime_in_us); // // // p_off = offset_by_channel(g_targetChannel); // NEW // uint16_t addr_off = eep_offset_addr_by_channel(g_targetChannel); // 112..217 step 7 // ControlAddr = addr_off; // EEPROM.NumOfDataBytes = 4; // // float_to_bytes_le(*p_off, b4); // TX_MsgBuffer[0] = (uint16_t)b4[0]; // TX_MsgBuffer[1] = (uint16_t)b4[1]; // TX_MsgBuffer[2] = (uint16_t)b4[2]; // TX_MsgBuffer[3] = (uint16_t)b4[3]; // EEPROM.pTX_MsgBuffer = &TX_MsgBuffer[0]; // status = I2C_ControllerTransmitter(&EEPROM); // DEVICE_DELAY_US(EEPROM.WriteCycleTime_in_us); // // // Write var1 (1 byte) to EEP_mCHANNEL2_ADRSS // // // // Read from 0x0000 -> RX[0] // p = var_by_channel(g_targetChannel); // pick destination variable for that channel // addr = eep_addr_by_channel(g_targetChannel); // // ControlAddr = addr; // EEPROM.NumOfDataBytes = 4; // EEPROM.pRX_MsgBuffer = &RX_MsgBuffer[0]; // status = I2C_ControllerReceiver(&EEPROM); // while (I2C_getStatus(EEPROM.base) & I2C_STS_BUS_BUSY) { } // // verifyEEPROMRead(); // optional, or compare explicitly RX[0] vs expected // b[0] = (uint8_t)RX_MsgBuffer[0]; // b[1] = (uint8_t)RX_MsgBuffer[1]; // b[2] = (uint8_t)RX_MsgBuffer[2]; // b[3] = (uint8_t)RX_MsgBuffer[3]; // // // *p = bytes_to_float_le(b); // g_channel_values[(g_targetChannel >= 1 && g_targetChannel <= 16) ? (g_targetChannel - 1U) : 0U] = *p; // // p_off = offset_by_channel(g_targetChannel); // addr_off = eep_offset_addr_by_channel(g_targetChannel); // ControlAddr = addr_off; // EEPROM.NumOfDataBytes = 4; // EEPROM.pRX_MsgBuffer = &RX_MsgBuffer[0]; // status = I2C_ControllerReceiver(&EEPROM); // while (I2C_getStatus(EEPROM.base) & I2C_STS_BUS_BUSY) { } // b4[0] = (uint8_t)RX_MsgBuffer[0]; // b4[1] = (uint8_t)RX_MsgBuffer[1]; // b4[2] = (uint8_t)RX_MsgBuffer[2]; // b4[3] = (uint8_t)RX_MsgBuffer[3]; // *p_off = bytes_to_float_le(b4); // // // Mirror into compact array (NEW) // g_channel_offsets[(g_targetChannel >= 1 && g_targetChannel <= 16) ? (g_targetChannel - 1U) : 0U] = *p_off; // // // Read from EEP_mCHANNEL2_ADRSS -> RX[1] // // break; // // // case resetall: // { // // Reset VALUE to 1.0f and OFFSET to 0.0f in EEPROM and RAM for all 16 channels // // const float new_value = 1.0f; // const float new_offset = 0.0f; // // // Optional: preserve UI-selected channel if other code depends on it // uint16_t saved_target = g_targetChannel; // uint16_t ch; // // Iterate 1..16 (your eep_*_by_channel helpers are defined for 1..16) // for ( ch = 1; ch <= 16; ch++) // { // // ---------------------------- // // Write VALUE (1.0f) to EEPROM // // ---------------------------- // uint16_t addr_val = eep_addr_by_channel(ch); // uint8_t b_val[4]; // float_to_bytes_le(new_value, b_val); // // ControlAddr = addr_val; // EEPROM.pControlAddr = &ControlAddr; // EEPROM.NumOfDataBytes = 4; // TX_MsgBuffer[0] = (uint16_t)b_val[0]; // TX_MsgBuffer[1] = (uint16_t)b_val[1]; // TX_MsgBuffer[2] = (uint16_t)b_val[2]; // TX_MsgBuffer[3] = (uint16_t)b_val[3]; // EEPROM.pTX_MsgBuffer = &TX_MsgBuffer[0]; // // status = I2C_ControllerTransmitter(&EEPROM); // // TODO (optional): if (status != I2C_OK) { /* log ch/addr_val; continue or break */ } // DEVICE_DELAY_US(EEPROM.WriteCycleTime_in_us); // or ACK-poll (see helper below) // // // ------------------------------ // // Write OFFSET (0.0f) to EEPROM // // ------------------------------ // uint16_t addr_off = eep_offset_addr_by_channel(ch); // use ch (NOT g_targetChannel) // uint8_t b_off[4]; // float_to_bytes_le(new_offset, b_off); // // ControlAddr = addr_off; // EEPROM.pControlAddr = &ControlAddr; // EEPROM.NumOfDataBytes = 4; // TX_MsgBuffer[0] = (uint16_t)b_off[0]; // TX_MsgBuffer[1] = (uint16_t)b_off[1]; // TX_MsgBuffer[2] = (uint16_t)b_off[2]; // TX_MsgBuffer[3] = (uint16_t)b_off[3]; // EEPROM.pTX_MsgBuffer = &TX_MsgBuffer[0]; // // status = I2C_ControllerTransmitter(&EEPROM); // // TODO (optional): if (status != I2C_OK) { /* log ch/addr_off; continue or break */ } // DEVICE_DELAY_US(EEPROM.WriteCycleTime_in_us); // or ACK-poll // // // --------------------------------------- // // Update RAM mirrors so app sees changes // // --------------------------------------- // g_channel_values[ch - 1U] = new_value; // g_channel_offsets[ch - 1U] = new_offset; // // // Keep legacy per-channel variables in sync as well // *var_by_channel(ch) = new_value; // *offset_by_channel(ch) = new_offset; // } // // // Optional: recompute derived ADC counts once for all channels // // array_to_adc(g_channel_values, gain_counts, 16); // // array_to_adc_offset(g_channel_offsets, offset_counts, 16); // // // Restore UI-selected channel // g_targetChannel = saved_target; // // break; // Do not fall through // } // IMPORTANT: do not fall through to read_all // // case reset: // { // float new_value = 1.0f; // float new_offset = 0.0f; // // p = var_by_channel(g_targetChannel); // uint16_t addr = eep_addr_by_channel(g_targetChannel); // // ControlAddr = addr; // EEPROM.NumOfDataBytes = 4; // // float_to_bytes_le( new_value, b); // // TX_MsgBuffer[0] = (uint16_t)b[0]; // TX_MsgBuffer[1] = (uint16_t)b[1]; // TX_MsgBuffer[2] = (uint16_t)b[2]; // TX_MsgBuffer[3] = (uint16_t)b[3]; // EEPROM.pTX_MsgBuffer = &TX_MsgBuffer[0]; // status = I2C_ControllerTransmitter(&EEPROM); // DEVICE_DELAY_US(EEPROM.WriteCycleTime_in_us); // // // // p_off = offset_by_channel(g_targetChannel); // NEW // uint16_t addr_off = eep_offset_addr_by_channel(g_targetChannel); // 112..217 step 7 // ControlAddr = addr_off; // EEPROM.NumOfDataBytes = 4; // // float_to_bytes_le(new_offset, b4); // TX_MsgBuffer[0] = (uint16_t)b4[0]; // TX_MsgBuffer[1] = (uint16_t)b4[1]; // TX_MsgBuffer[2] = (uint16_t)b4[2]; // TX_MsgBuffer[3] = (uint16_t)b4[3]; // EEPROM.pTX_MsgBuffer = &TX_MsgBuffer[0]; // status = I2C_ControllerTransmitter(&EEPROM); // DEVICE_DELAY_US(EEPROM.WriteCycleTime_in_us); // // } // // Write var (1 byte) to address 0x0000 // // // // case read_all: // { // uint16_t ch; // uint16_t startAddr = eep_addr_by_channel(1); // 0 // uint16_t endAddr = eep_addr_by_channel(16); // 105 // uint16_t totalBytes = (uint16_t)((endAddr - startAddr) + 4U); // 109 bytes // // ControlAddr = startAddr; // EEPROM.pControlAddr = &ControlAddr; // EEPROM.NumOfDataBytes = totalBytes; // *** 109 *** // EEPROM.pRX_MsgBuffer = &RX_MsgBuffer[0]; // // status = I2C_ControllerReceiver(&EEPROM); // while (I2C_getStatus(EEPROM.base) & I2C_STS_BUS_BUSY) { } // // // Unpack 16 floats: each at 4 bytes, every 7 bytes (stride) // for ( ch = 1; ch <= 16; ch++) // { // uint16_t base = (uint16_t)((ch - 1U) * 7U); // // uint8_t b[4]; // b[0] = (uint8_t)RX_MsgBuffer[base + 0U]; // b[1] = (uint8_t)RX_MsgBuffer[base + 1U]; // b[2] = (uint8_t)RX_MsgBuffer[base + 2U]; // b[3] = (uint8_t)RX_MsgBuffer[base + 3U]; // // float f = bytes_to_float_le(b); // you already have this helper // // // Keep backward compatibility with your per-channel variables // float *p = var_by_channel(ch); // *p = f; // // // Also mirror to the compact array // g_channel_values[ch - 1U] = f; // } // uint16_t startAddrO = eep_offset_addr_by_channel(1); // 112 // uint16_t endAddrO = eep_offset_addr_by_channel(16); // 217 // uint16_t totalBytesO = (uint16_t)((endAddrO - startAddrO) + 4U); // 109 bytes // ControlAddr = startAddrO; // EEPROM.pControlAddr = &ControlAddr; // EEPROM.NumOfDataBytes = totalBytesO; // EEPROM.pRX_MsgBuffer = &RX_MsgBuffer[0]; // status = I2C_ControllerReceiver(&EEPROM); // while (I2C_getStatus(EEPROM.base) & I2C_STS_BUS_BUSY) { } // // for (ch = 1; ch <= 16; ch++) { // uint16_t base = (uint16_t)((ch - 1U) * 7U); // uint8_t bb[4] = { // (uint8_t)RX_MsgBuffer[base + 0U], // (uint8_t)RX_MsgBuffer[base + 1U], // (uint8_t)RX_MsgBuffer[base + 2U], // (uint8_t)RX_MsgBuffer[base + 3U] // }; // float f = bytes_to_float_le(bb); // *offset_by_channel(ch) = f; // legacy per-channel offset variable // g_channel_offsets[ch - 1U] = f; // compact offset array (NEW) // } // // // break; // } // } // // // // // // // Write var1 (1 byte) to EEP_mCHANNEL2_ADRSS // array_to_adc(g_channel_values, gain_counts, 16); // array_to_adc_offset(g_channel_offsets,offset_counts,16); // first_gain = gain_counts[0]; //GPIO_writePin(myGPIO28,0); // Acknowledge interrupt Interrupt_clearACKGroup(INTERRUPT_ACK_GROUP1); }