# ESCSS Module

The EtherCAT Sub-System (escss) API provides a set of functions for configuring and using the Sub System module. These contain EtherCAT Sub-System and Sub-System Configuration Registers. The Control registers configure GPIN and GPOUT Pad Select, Phy and Clock Source Select, Sync and Latch Signal Selects.

group `escss_api`

  Defines

  `ESCSS_IPREV_MASK` (ESCSS_IPREVNUM_IP_REV_MINOR_S

  |\

  ESCSS_IPREVNUM_IP_REV_MINOR_M)
  `ESCSS_RAW_INTERRUPT_MASK` (ESCSS_INTR_RIS_SYNC0_RIS

  |\

  ESCSS_INTR_RIS_SYNC1_RIS

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  ESCSS_INTR_RIS_IRQ_RIS

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  ESCSS_INTR_RIS_DMA_DONE_RIS

  |\

  ESCSS_INTR_RIS_TIMEOUT_ERR_RIS

  |\

  ESCSS_INTR_RIS_MDEVICE_RESET_RIS)
  `ESCSS_INTERRUPT_MASK` (ESCSS_INTR_MASK_SYNC0_MASK

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  ESCSS_INTR_MASK_SYNC1_MASK

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  ESCSS_INTR_MASK_IRQ_MASK

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  ESCSS_INTR_MASK_DMA_DONE_MASK

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  ESCSS_INTR_MASK_TIMEOUT_ERR_MASK

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  ESCSS_INTR_MASK_MDEVICE_RESET_MASK)
  `ESCSS_RESET_INTERRUPT_MASK` (ESCSS_INTR_MASK_SYNC0_MASK

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  ESCSS_INTR_MASK_SYNC1_MASK

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  ESCSS_INTR_MASK_IRQ_MASK

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  ESCSS_INTR_MASK_DMA_DONE_MASK

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  ESCSS_INTR_MASK_TIMEOUT_ERR_MASK

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  ESCSS_INTR_MASK_MDEVICE_RESET_MASK)
  `ESCSS_GET_INTERRUPT_MASK` (ESCSS_INTR_MIS_SYNC0_MIS

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  ESCSS_INTR_MIS_SYNC1_MIS

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  ESCSS_INTR_MIS_IRQ_MIS

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  ESCSS_INTR_MIS_DMA_DONE_MIS

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  ESCSS_INTR_MIS_TIMEOUT_ERR_MIS

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  ESCSS_INTR_MIS_MDEVICE_RESET_MIS)
  `ESCSS_CLEAR_INTERRUPT_MASK` (ESCSS_INTR_CLR_SYNC0_CLR

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  ESCSS_INTR_CLR_SYNC1_CLR

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  ESCSS_INTR_CLR_IRQ_CLR

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  ESCSS_INTR_CLR_DMA_DONE_CLR

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  ESCSS_INTR_CLR_TIMEOUT_ERR_CLR

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  ESCSS_INTR_CLR_MDEVICE_RESET_CLR)
  `ESCSS_SET_INTERRUPT_MASK` (ESCSS_INTR_SET_SYNC0_SET

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  ESCSS_INTR_SET_SYNC1_SET

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  ESCSS_INTR_SET_IRQ_SET

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  ESCSS_INTR_SET_DMA_DONE_SET

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  ESCSS_INTR_SET_TIMEOUT_ERR_SET

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  ESCSS_INTR_SET_MDEVICE_RESET_SET)
  `ESCSS_GRP_CAP_SELECT0_MASK` ESCSS_GPIN_GRP_CAP_SEL_GPI_GRP_CAP_SEL0_M
  `ESCSS_GRP_CAP_SELECT1_MASK` ESCSS_GPIN_GRP_CAP_SEL_GPI_GRP_CAP_SEL1_M
  `ESCSS_GRP_CAP_SELECT2_MASK` ESCSS_GPIN_GRP_CAP_SEL_GPI_GRP_CAP_SEL2_M
  `ESCSS_GRP_CAP_SELECT3_MASK` ESCSS_GPIN_GRP_CAP_SEL_GPI_GRP_CAP_SEL3_M
  `ESCSS_API_SUCCESS` 0x01U
  `ESCSS_API_FAIL` 0x00U
  `ESCSS_VALID_KEY_VALUE` 0xA5U
  `ESCSS_GPIN_0` 0x1U
  `ESCSS_GPIN_1` 0x2U
  `ESCSS_GPIN_2` 0x4U
  `ESCSS_GPIN_3` 0x8U
  `ESCSS_GPIN_4` 0x10U
  `ESCSS_GPIN_5` 0x20U
  `ESCSS_GPIN_6` 0x40U
  `ESCSS_GPIN_7` 0x80U
  `ESCSS_GPIN_8` 0x100U
  `ESCSS_GPIN_9` 0x200U
  `ESCSS_GPIN_10` 0x400U
  `ESCSS_GPIN_11` 0x800U
  `ESCSS_GPIN_12` 0x1000U
  `ESCSS_GPIN_13` 0x2000U
  `ESCSS_GPIN_14` 0x4000U
  `ESCSS_GPIN_15` 0x8000U
  `ESCSS_GPIN_16` 0x10000U
  `ESCSS_GPIN_17` 0x20000U
  `ESCSS_GPIN_18` 0x40000U
  `ESCSS_GPIN_19` 0x80000U
  `ESCSS_GPIN_20` 0x100000U
  `ESCSS_GPIN_21` 0x200000U
  `ESCSS_GPIN_22` 0x400000U
  `ESCSS_GPIN_23` 0x800000U
  `ESCSS_GPIN_24` 0x1000000U
  `ESCSS_GPIN_25` 0x2000000U
  `ESCSS_GPIN_26` 0x4000000U
  `ESCSS_GPIN_27` 0x8000000U
  `ESCSS_GPIN_28` 0x10000000U
  `ESCSS_GPIN_29` 0x20000000U
  `ESCSS_GPIN_30` 0x40000000U
  `ESCSS_GPIN_31` 0x80000000U
  `ESCSS_GPOUT_0` 0x1U
  `ESCSS_GPOUT_1` 0x2U
  `ESCSS_GPOUT_2` 0x4U
  `ESCSS_GPOUT_3` 0x8U
  `ESCSS_GPOUT_4` 0x10U
  `ESCSS_GPOUT_5` 0x20U
  `ESCSS_GPOUT_6` 0x40U
  `ESCSS_GPOUT_7` 0x80U
  `ESCSS_GPOUT_8` 0x100U
  `ESCSS_GPOUT_9` 0x200U
  `ESCSS_GPOUT_10` 0x400U
  `ESCSS_GPOUT_11` 0x800U
  `ESCSS_GPOUT_12` 0x1000U
  `ESCSS_GPOUT_13` 0x2000U
  `ESCSS_GPOUT_14` 0x4000U
  `ESCSS_GPOUT_15` 0x8000U
  `ESCSS_GPOUT_16` 0x10000U
  `ESCSS_GPOUT_17` 0x20000U
  `ESCSS_GPOUT_18` 0x40000U
  `ESCSS_GPOUT_19` 0x80000U
  `ESCSS_GPOUT_20` 0x100000U
  `ESCSS_GPOUT_21` 0x200000U
  `ESCSS_GPOUT_22` 0x400000U
  `ESCSS_GPOUT_23` 0x800000U
  `ESCSS_GPOUT_24` 0x1000000U
  `ESCSS_GPOUT_25` 0x2000000U
  `ESCSS_GPOUT_26` 0x4000000U
  `ESCSS_GPOUT_27` 0x8000000U
  `ESCSS_GPOUT_28` 0x10000000U
  `ESCSS_GPOUT_29` 0x20000000U
  `ESCSS_GPOUT_30` 0x40000000U
  `ESCSS_GPOUT_31` 0x80000000U

  Enums

  enum `ESCSS_LatchTrigger`

    This data type is used to define the signal hookup to 32 possible LATCH0/1 trigger sources.

    Values:

    enumerator `ESCSS_TRIGGER_LATCH0` = 0U

      Latch0 Trigger.

    enumerator `ESCSS_TRIGGER_LATCH1` = 1U

      Latch1 Trigger.

    enumerator `ESCSS_TRIGGER_CPUNMI` = 2U

      CPUNMI Trigger.

    enumerator `ESCSS_TRIGGER_CMNMI` = 3U

      CMNMI Trigger.

    enumerator `ESCSS_TRIGGER_ERRORSTS` = 4U

      ERRORSTS Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT0` = 5U

      GPTRIPOUT0 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT1` = 6U

      GPTRIPOUT1 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT2` = 7U

      GPTRIPOUT2 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT3` = 8U

      GPTRIPOUT3 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT4` = 9U

      GPTRIPOUT4 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT5` = 10U

      GPTRIPOUT5 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT6` = 11U

      GPTRIPOUT6 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT7` = 12U

      GPTRIPOUT7 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT8` = 13U

      GPTRIPOUT8 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT9` = 14U

      GPTRIPOUT9 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT10` = 15U

      GPTRIPOUT10 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT11` = 16U

      GPTRIPOUT11 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT12` = 17U

      GPTRIPOUT12 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT13` = 18U

      GPTRIPOUT13 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT14` = 19U

      GPTRIPOUT14 Trigger.

    enumerator `ESCSS_TRIGGER_GPTRIPOUT15` = 20U

      GPTRIPOUT15 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT0` = 21U

      PWMXBAROUT0 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT1` = 22U

      PWMXBAROUT1 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT2` = 23U

      PWMXBAROUT2 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT3` = 24U

      PWMXBAROUT3 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT4` = 25U

      PWMXBAROUT4 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT5` = 26U

      PWMXBAROUT5 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT6` = 27U

      PWMXBAROUT6 Trigger.

    enumerator `ESCSS_TRIGGER_PWMXBAROUT7` = 28U

      PWMXBAROUT7 Trigger.

  enum `ESCSS_CaptureTrigger`

    The definitions are used to select the capture trigger.

    Values:

    enumerator `ESCSS_SOF_CAPTURE_TRIGGER` = 0U

      Start of Frame as Capture Trigger Select.

    enumerator `ESCSS_SYNC0_CAPTURE_TRIGGER` = 4U

      SYNC0 as Capture Trigger Select.

    enumerator `ESCSS_SYNC1_CAPTURE_TRIGGER` = 5U

      SYNC1 as Capture Trigger Select.

    enumerator `ESCSS_LATCH0_CAPTURE_TRIGGER` = 6U

      LATCH0 as Capture Trigger Select.

    enumerator `ESCSS_LATCH1_CAPTURE_TRIGGER` = 7U

      LATCH1 as Capture Trigger Select.

  enum `ESCSS_PortSelection`

    The definition are there to select number of Ports.

    Values:

    enumerator `ESCSS_ONE_PORT_SELECTION` = 0U

      One port operation(Port0).

    enumerator `ESCSS_TWO_PORT_SELECTION` = 1U

      Two port operation(Port0,Port1).

  enum `ESCSS_SizeSelect`

    The definition values are there to select the size to pass as a parameter to ESCSS_configureEEPROMSize().

    Values:

    enumerator `ESCSS_LESS_THAN_16K`

      EEPROMs of size 16K bits or less.

    enumerator `ESCSS_GREATER_THAN_16K`

      EEPROMs of size greater than 16K bits.

  enum `ESCSS_GroupCaptureSelect`

    The definition values is there to select the Group Capture Trigger for the ESCSS_setGPINGroupCaptureTriggerSelect and ESCSS_setGPOUTGroupCaptureTriggerSelect APIs.

    Values:

    enumerator `ESCSS_GROUP_CAPTURE_SELECT0` = 0U
    enumerator `ESCSS_GROUP_CAPTURE_SELECT1` = 4U
    enumerator `ESCSS_GROUP_CAPTURE_SELECT2` = 8U
    enumerator `ESCSS_GROUP_CAPTURE_SELECT3` = 12U

  Functions

  uint16_t `ESCSS_readIPMinorRevNumber`(uint32_t base)

    Reads the Minor IP Revision Number for EtherCAT.

    This function returns the Minor IP Revision Number. Reset value for this are Hard Coded and increments with minor changes to the IP.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      Returns the EtherCAT Minor IP Revision Number.

  uint16_t `ESCSS_readIPMajorRevNumber`(uint32_t base)

    Reads the Major IP Revision Number for EtherCAT.

    This function returns the Major IP Revision Number. Reset value for this are Hard Coded and increments with minor changes to the IP.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      Returns the EtherCAT Major IP Revision Number.

  uint32_t `ESCSS_readIPRevNumber`(uint32_t base)

    Reads the Major and Minor IP Revision Number for EtherCAT.

    This function returns the IP Revision Number. Reset value for this are Hard Coded and increments with minor changes to the IP.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      Returns the EtherCAT IP Revision Number.

  uint16_t `ESCSS_getRawInterruptStatus`(uint32_t base, uint16_t interruptMask)

    Gets the Raw Interrupt Status for selected interrupts.

    This function returns the Raw Interrupt Status of all the different interrupt triggers.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `interruptMask`: is the mask value to select the different type of interrupt.

    Return

      Returns the Raw Interrupt Status Value.

  uint32_t `ESCSS_readRawInterruptStatus`(uint32_t base)

    Reads the Raw Interrupt Status for different interrupt triggers.

    This function returns the Raw Interrupt Status of individual interrupt triggers.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    The Raw interrupt Status can have the following valid options for interruptMask can be OR’ed together: ESCSS_INTR_RIS_SYNC0_RIS, ESCSS_INTR_RIS_SYNC1_RIS, ESCSS_INTR_RIS_IRQ_RIS, ESCSS_INTR_RIS_DMA_DONE_RIS, ESCSS_INTR_RIS_TIMEOUT_ERR_RIS, ESCSS_INTR_RIS_MDEVICE_RESET_RIS.

    Return

      Returns the Raw Interrupt Status Value.

  void `ESCSS_setMaskedInterruptStatus`(uint32_t base, uint16_t interruptMask)

    Allows to mask individual interrupt cause impacting the interrupt.

    This function sets the Masked Interrupt Status of the different interrupt triggers as per the input mask value.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `interruptMask`: is the mask value to select the different type of interrupt.

    The Masked interrupt Status can have the following valid options for interruptMask can be OR’ed together:

    - ESCSS_INTR_MASK_SYNC0_MASK - Masks SYNC0 to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_SYNC1_MASK - Masks SYNC1 to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_IRQ_MASK - Masks EtherCATSS IRQ to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_DMA_DONE_MASK - Masks DMA Done to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_TIMEOUT_ERR_MASK - Masks PDI access timeout Error to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_MDEVICE_RESET_MASK - Masks EtherCAT MainDevice reset event against any effect on interrupts or other CPU Interrupts.

    Return

      None.

  void `ESCSS_resetMaskedInterruptStatus`(uint32_t base, uint16_t interruptMask)

    Allows to reset the mask individual interrupt cause impacting the interrupt.

    This function resets the Masked Interrupt Status of the different interrupt triggers as per the input mask value passed as parameter.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `interruptMask`: is the mask value to select the different type of interrupt.

    The Masked interrupt Status can have the following valid options for interruptMask can be OR’ed together:

    - ESCSS_INTR_MASK_SYNC0_MASK - Masks SYNC0 to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_SYNC1_MASK - Masks SYNC1 to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_IRQ_MASK - Masks EtherCATSS IRQ to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_DMA_DONE_MASK - Masks DMA Done to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_TIMEOUT_ERR_MASK - Masks PDI access timeout Error to have effect on interrupts or other CPU/DMA Trigger,

    - ESCSS_INTR_MASK_MDEVICE_RESET_MASK - Masks EtherCAT MainDevice reset event against any effect on interrupts or other CPU Interrupts.

    Return

      None.

  uint16_t `ESCSS_getMaskedInterruptStatus`(uint32_t base, uint16_t interruptMask)

    Gets the Masked Interrupt Status all interrupt triggers.

    This function returns the Masked Interrupt Status of the different interrupt triggers as per the input mask value.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `interruptMask`: is the mask value to select the different type of interrupt.

    The Masked interrupt Status can have the following valid options for interruptMask can be OR’ed together: ESCSS_INTR_MIS_SYNC0_MIS, ESCSS_INTR_MIS_SYNC1_MIS, ESCSS_INTR_MIS_IRQ_MIS, ESCSS_INTR_MIS_DMA_DONE_MIS, ESCSS_INTR_MIS_TIMEOUT_ERR_MIS, ESCSS_INTR_MIS_MDEVICE_RESET_MIS.

    Return

      Returns the Masked Interrupt Status Value.

  void `ESCSS_clearRawInterruptStatus`(uint32_t base, uint16_t interruptMask)

    Clears the individual interrupt cause.

    This function clears the individual interrupt cause based on the mask value passed. Writing a 1 clears the Raw Status.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `interruptMask`: is the mask value to select the different type of interrupt.

    The interrupt Status Mask parameter can have the following valid options for interruptMask can be OR’ed together: ESCSS_INTR_CLR_SYNC0_CLR, ESCSS_INTR_CLR_SYNC1_CLR, ESCSS_INTR_CLR_IRQ_CLR, ESCSS_INTR_CLR_DMA_DONE_CLR, ESCSS_INTR_CLR_TIMEOUT_ERR_CLR, ESCSS_INTR_CLR_MDEVICE_RESET_CLR.

    Return

      None.

  void `ESCSS_selectLatch0Mux`(uint32_t base, ESCSS_LatchTrigger muxSelectValue)

    Selects the LATCH0 Inputs Mux Select.

    This function sets the Mux Select value for LATCH0 input to ESC SS.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `muxSelectValue`: is the mux select value for Latch0.

    The muxSelectValue parameter can be one of the possible values from the ESCSS_LatchTrigger enum.

    Return

      None.

  void `ESCSS_selectLatch1Mux`(uint32_t base, ESCSS_LatchTrigger muxSelectValue)

    Select the LATCH1 Inputs Mux Select.

    This function sets the Mux Select value for LATCH1 input to ESC SS.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `muxSelectValue`: is the mux select value for Latch1.

    The muxSelectValue parameter can be one of the possible values from the ESCSS_LatchTrigger enum.

    Return

      None.

  void `ESCSS_configure16BitAsyncAccessWaitState`(uint32_t base, uint16_t waitState)

    Configures the Wait State on the 16 bit Asynchronous Interface.

    This function configures the predefined minimum number of wait-states which the VBUS bridge will put out accesses on the 16-bit Asynchronous interface.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `waitState`: is the minimum wait state value.

    Return

      None.

  void `ESCSS_enablePDIAccessTimeOut`(uint32_t base)

    Enables the PDI Timeout Feature.

    Enables the Timeout features which counts programmed number of Sys clocks before the Local host aborts the transaction. The timeout counter starts counting upon BUSY is asserted by EtherCAT IP.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      None.

  void `ESCSS_disablePDIAccessTimeOut`(uint32_t base)

    Disables the PDI Timeout Feature.

    Disables the Timeout features which counts programmed number of Sys clocks before the Local host aborts the transaction on PDI interface.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      None.

  void `ESCSS_enableDebugAccess`(uint32_t base)

    Enables the Debug Access through the PDI Controller.

    This function configures the debug accesses to be allowed to go through.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      None.

  void `ESCSS_disableDebugAccess`(uint32_t base)

    Disables the Debug Access through the PDI Controller.

    This function configures the debug accesses to be not allowed to go through.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      None.

  uint32_t `ESCSS_readGPINData`(uint32_t base)

    Reads the GPIN Data.

    This function returns the GPIN Data. Local GPIN data register connects to GPIN pipelined register for debug & override purposes.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      Returns the GPIN Data Value.

  void `ESCSS_setGPINData`(uint32_t base, uint32_t pinValue)

    Sets the GPIN Data Register Value.

    This function writes the GPIN Data. Local GPIN data register connects to GPIN pipelined register for debug & override purposes.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `pinValue`: is the value to be written in the GPIN Register.

    The pinValue can have the respective GPIN Defines OR’ed to select which PIN to write to. The defines are ESCSS_GPIN_x where x is from 0 to 31.

    Return

      None.

  void `ESCSS_resetGPINData`(uint32_t base, uint32_t pinValue)

    Resets the GPIN Data Register Value.

    This function writes the GPIN Data. Local GPIN data register connects to GPIN pipelined register for debug & override purposes.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `pinValue`: is the value to be written in the GPIN Register.

    The pinValue can have the respective GPIN Defines OR’ed to select which PIN to write to. The defines are ESCSS_GPIN_x where x is from 0 to 31.

    Return

      None.

  void `ESCSS_enableGPIPipelinedRegCaptureOnEvent`(uint32_t base, uint32_t pipelineMask)

    Enables the connection of GPIN to EtherCATSS through pipelined register as against the direct from IO.

    This function enables that the connection is through the pipelined register which is captured on programmed event.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `pipelineMask`: is the mask to enable connection is through pipelined register.

    The pipelineMask can have the respective GPIN Defines OR’ed to select which PIN to write to. The defines are ESCSS_GPIN_x where x is from 0 to 31.

    Return

      None.

  void `ESCSS_disableGPIPipelinedRegCaptureOnEvent`(uint32_t base, uint32_t pipelineMask)

    Disables the connection of GPIN to EtherCATSS through pipelined register and is direct from the IO Pad.

    This function disables the connection through the pipelined register and connection is directly from the IO pad.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `pipelineMask`: is the mask to enable connection is through pipelined register.

    The pipelineMask can have the respective GPIN Defines OR’ed to select which PIN to write to. The defines are ESCSS_GPIN_x where x is from 0 to 31.

    Return

      None.

  uint32_t `ESCSS_readGPOUTData`(uint32_t base)

    Reads the GPOUT Data.

    This function returns the GPOUT Data. Local GPOUT data register which is synchronized version on SysClk, each bit is represents GPOUT IORead is allowed for CPU to process (IO extender or so if required).

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      Returns the GPOUT Data Value.

  void `ESCSS_enableGPOUTPipelinedRegCaptureOnEvent`(uint32_t base, uint32_t pipelineMask)

    Enables the connection of EtherCATSS GPOUT output to the IO pad through pipelined register as against the direct connection.

    This function enables the connection to be through the pipelined register which captures EtherCATSS o/p on programmed event.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `pipelineMask`: is the mask to enable connection is through pipelined register.

    The pipelineMask can have the respective GPOUT Defines OR’ed to select which PIN to write to. The defines are ESCSS_GPOUT_x where x is from 0 to 31.

    Return

      None.

  void `ESCSS_disableGPOUTPipelinedRegCaptureOnEvent`(uint32_t base, uint32_t pipelineMask)

    Disables the connection of GPOUT to EtherCATSS through pipelined register and is direct from the IO Pad.

    This function disables the connection through the pipelined register and connection is directly from the IO pad.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `pipelineMask`: is the mask to enable connection is through pipelined register.

    The pipelineMask can have the respective GPOUT Defines OR’ed to select which PIN to write to. The defines are ESCSS_GPOUT_x where x is from 0 to 31.

    Return

      None.

  void `ESCSS_initMemory`(uint32_t base)

    Initializes the Memory Init.

    This function starts the initialization when set.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      None.

  bool `ESCSS_getMemoryInitDoneStatusNonBlocking`(uint32_t base)

    Returns the memory init status.

    This function returns the status of the memory initialization.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      Returns true indicating memory initialization completion, and false if not ye completed.

  uint32_t `ESCSS_getMemoryInitDoneStatusBlocking`(uint32_t base, uint32_t loopCount)

    Waits for the memory init status to be set till the loop count.

    This function returns the status of the memory initialization after waiting till a loop count.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `loopCount`: is the count till which the loop will run till the Memory init is done.

    Return

      Returns true indicating memory initialization completion, and false if not ye completed.

  bool `ESCSS_isConfigurationLockEnabled`(uint32_t base)

    Checks if lock configuration is done.

    This function checks if the lock configuration is done and returns the status.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

    Return

      None.

  uint16_t `ESCSS_enableLEDOptions`(uint32_t base, uint16_t ledSelectConfig)

    Enables the selection of LED o/p connect to IO Pad.

    This function enables the selection of LED o/p connect to IO Pad. This selection assumes both buffer input and buffer enable connection as required.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `ledSelectConfig`: is the Mux Selection Value.

    The LED Configuration Mask parameter can have the following valid options for ledSelectConfig can be OR’ed together:

    - ESCSS_LED_CONFIG_STATE - GPIO enable for STATE LED,

    - ESCSS_LED_CONFIG_ERR - GPIO enable for ERR LED,

    - ESCSS_LED_CONFIG_RUN - GPIO enable for RUN LED.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableLEDOptions`(uint32_t base, uint16_t ledSelectConfig)

    Disables the selection of LED o/p connect to IO Pad.

    This function disables the selection of LED o/p connect to IO Pad. The non-EtherCAT function is selected on the IO.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `ledSelectConfig`: is the Mux Selection Value.

    The LED Configuration Mask parameter can have the following valid options for ledSelectConfig can be OR’ed together:

    - ESCSS_LED_CONFIG_STATE,

    - ESCSS_LED_CONFIG_ERR,

    - ESCSS_LED_CONFIG_RUN.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableGPIN`(uint32_t base, uint32_t selectValue)

    Enable for GPIN Connection to IO pad.

    This function allows bit-wise selection of the GPIN be connected from GPIO PAD. Once those are not driven by GPIO, will be driven from register writable from local Host.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `selectValue`: is the mask for the mux select.

    The selectValue can have the respective GPIN Defines OR’ed to select which PIN to enable. The defines are ESCSS_GPIN_x where x is from 0 to 31.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableGPIN`(uint32_t base, uint32_t selectValue)

    Disable for GPIN Connection to IO pad.

    This function disables connection to GPIO PAD, but connects to ESCSS_GPIN_DAT.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `selectValue`: is the mask for the mux select.

    The selectValue can have the respective GPIN Defines OR’ed to select which GPIN to disable. The defines are ESCSS_GPIN_x where x is from 0 to 31.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableGPOUT`(uint32_t base, uint32_t selectValue)

    Enable GPOUT selection between register or GPIO pad.

    This function is to allow the EtherCAT GPOUT output be driven to either of the two IO-pads allocated.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `selectValue`: is the mask for the mux select.

    The selectValue can have the respective GPOUT Defines OR’ed to select which GPOUT to enable. The defines are ESCSS_GPOUT_x where x is from 0 to 31.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableGPOUT`(uint32_t base, uint32_t selectValue)

    Disable GPOUT selection between register or GPIO pad.

    This function is to disable the EtherCAT GPOUT output be driven to either of the two IO-pads allocated.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `selectValue`: is the mask for the mux select.

    The selectValue can have the respective GPOUT Defines OR’ed to select which GPOUT to disable. The defines are ESCSS_GPOUT_x where x is from 0 to 31.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_configureTX0ShiftForTxEnaAndTxData`(uint32_t base, uint32_t shiftValue)

    Configure the TX for shift for Port 0.

    This function is to configure the TX for shift for Port 0. Two bit TX_SHIFT configuration in terms of 10ns counts for port0. This is the shift added to TX_ENA & TX_DATA to match delay of PHY TX_CLK w.r.t. device internal clock.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `shiftValue`: is the shift in 10ns terms.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_configureTX1ShiftForTxEnaAndTxData`(uint32_t base, uint32_t shiftValue)

    Configure the TX for shift for Port 1.

    This function is to configure the TX for shift for Port 1. Two bit TX_SHIFT configuration in terms of 10ns counts for port1. This is the shift added to TX_ENA & TX_DATA to match delay of PHY TX_CLK w.r.t. device internal clock.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `shiftValue`: is the shift in 10ns terms.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enablePDIEmulation`(uint32_t base)

    Enable the PDI Emulation.

    This function will be hooked up to the PDI_EMULATION input of the EtherCAT IP.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disablePDIEmulation`(uint32_t base)

    Disable the PDI Emulation.

    This function will not allow hooking up to the PDI_EMULATION input of the EtherCAT IP.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_configurePhyAddressOffset`(uint32_t base, uint16_t registerOffset)

    Configure the Physical Address Offset.

    This function will set the PHY_OFFSET[4:0] input of the EtherCAT IP.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `registerOffset`: is the register offset value.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_setRawInterruptStatus`(uint32_t base, uint16_t interruptMask, uint16_t writeKey)

    Sets the Raw Interrupt Cause Status.

    This function sets the individual interrupt cause based on the mask value passed to emulate the interrupt cause.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `interruptMask`: is the mask value to select the different type of interrupt.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    The interrupt Status Mask parameter can have the following valid options for interruptMask can be OR’ed together: ESCSS_INTR_SET_SYNC0_SET, ESCSS_INTR_SET_SYNC1_SET, ESCSS_INTR_SET_IRQ_SET, ESCSS_INTR_SET_DMA_DONE_SET, ESCSS_INTR_SET_TIMEOUT_ERR_SET, ESCSS_INTR_SET_MDEVICE_RESET_SET.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  void `ESCSS_setGPINGroupCaptureTriggerSelect`(uint32_t base, ESCSS_GroupCaptureSelect selectGPIN, ESCSS_CaptureTrigger triggerCapSelect)

    Sets the GPIN pipe group capture trigger.

    This function selects the trigger to capture the IO input in pipeline register for GPIN. The

    selectGPIN parameter takes the following parameters: ESCSS_GROUP_CAPTURE_SELECT0, ESCSS_GROUP_CAPTURE_SELECT1, ESCSS_GROUP_CAPTURE_SELECT2 and ESCSS_GROUP_CAPTURE_SELECT3. The ESCSS_CaptureTrigger parameter takes the values: ESCSS_SOF_CAPTURE_TRIGGER, ESCSS_SYNC0_CAPTURE_TRIGGER, ESCSS_SYNC1_CAPTURE_TRIGGER, ESCSS_LATCH0_CAPTURE_TRIGGER, ESCSS_LATCH1_CAPTURE_TRIGGER.
    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `selectGPIN`: is to select the trigger to capture the IO input in pipeline register for selective GPIN.

      - `triggerCapSelect`: is the GPIN Data to be written.

    Return

      None.

  void `ESCSS_setGPOUTGroupCaptureTriggerSelect`(uint32_t base, ESCSS_GroupCaptureSelect selectGPOUT, ESCSS_CaptureTrigger triggerCapSelect)

    GPOUT pipe group capture trigger.

    This function selects the trigger to capture the IO input in pipeline register for GPOUT. The

    selectGPOUT parameter takes the following parameters: ESCSS_GROUP_CAPTURE_SELECT0, ESCSS_GROUP_CAPTURE_SELECT1, ESCSS_GROUP_CAPTURE_SELECT2 and ESCSS_GROUP_CAPTURE_SELECT3. The ESCSS_CaptureTrigger parameter takes the values: ESCSS_SOF_CAPTURE_TRIGGER, ESCSS_SYNC0_CAPTURE_TRIGGER, ESCSS_SYNC1_CAPTURE_TRIGGER, ESCSS_LATCH0_CAPTURE_TRIGGER, ESCSS_LATCH1_CAPTURE_TRIGGER.
    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `selectGPOUT`: is to select the trigger to capture the IO input in pipeline register for selective GPIN.

      - `triggerCapSelect`: is the GPIN Data to be written.

    Return

      None.

  uint16_t `ESCSS_enableCPUReset`(uint32_t base, uint16_t writeKey)

    Enables EtherCAT Reset drives to EtherCAT IP and PHY Reset.

    This function enables the EtherCAT Reset to drive the IP & PHY reset.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableCPUReset`(uint32_t base, uint16_t writeKey)

    EtherCAT Reset does not drive to EtherCAT IP and PHY Reset.

    This function configures the EtherCAT Reset not to drive to EtherCAT IP and PHY Reset. The application shall configure NMI/Interrupt to eventually complete the reset through system control soft reset.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableResetToNMI`(uint32_t base, uint16_t writeKey)

    Enables for reset out to drive the CPU NMI.

    This function configures the EtherCAT Reset to drive the CPU NMI. IP Reset out drives CPU NMI to which it belongs. NMI handler is expected to complete the required tasks or context save if any and then reset the EtherCAT through the system control soft reset.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableResetToNMI`(uint32_t base, uint16_t writeKey)

    Disables for reset out to drive the CPU NMI

    This function configures the EtherCAT Reset not to drive the CPU NMI.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableResetToInterrupt`(uint32_t base, uint16_t writeKey)

    Enables for reset out to drive the interrupt to CPU which it belongs to.

    This function enables the EtherCAT Reset to drive the interrupt to CPU which it belongs to.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableResetToInterrupt`(uint32_t base, uint16_t writeKey)

    Disables for reset out to drive the interrupt to CPU which it belongs to.

    This function configures the EtherCAT Reset not to drive the interrupt to CPU which it belongs to.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_configureSync0Connections`(uint32_t base, uint16_t connectionInterrupt, uint16_t writeKey)

    Configures the EtherCAT connection from SYNC0 to a particular interrupt.

    This function configures the connection from SYNC0 to the interrupt to the respective selection made. The following valid options for

    connectionInterrupt are:

    - ESCSS_SYNC0_CONFIG_C28X_PIE_EN - Connects the SYNC0 to C28x PIE Interrupt

    - ESCSS_SYNC0_CONFIG_CLA_INT_EN - Connects the SYNC0 to CLA Interrupt

    - ESCSS_SYNC0_CONFIG_C28X_DMA_EN - Connects the SYNC0 to C28x DMA Trigger

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `connectionInterrupt`: is the interrupt to which SYNC0 output is connected to.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_configureSync1Connections`(uint32_t base, uint16_t connectionInterrupt, uint16_t writeKey)

    Configures the EtherCAT connection from SYNC1 to a particular interrupt.

    This function configures the connection from SYNC1 to the interrupt to the respective selection made. The following valid options for

    connectionInterrupt are:

    - ESCSS_SYNC1_CONFIG_C28X_PIE_EN - Connects the SYNC1 to C28x PIE Interrupt

    - ESCSS_SYNC1_CONFIG_CLA_INT_EN - Connects the SYNC1 to CLA Interrupt

    - ESCSS_SYNC1_CONFIG_C28X_DMA_EN - Connects the SYNC1 to C28x DMA Trigger

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `connectionInterrupt`: is the interrupt to which SYNC1 output is connected to.

      - `writeKey`: is the key Value which decides if the writes to this register are to take affect.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableConfigurationLock`(uint32_t base, uint16_t writeKey)

    Enables the configuration lock.

    This bit enables locking the contents of all the EtherCAT configuration registers. This bit can be set only once after ecatXRSN and gets reset after the next ecatXRSN.

    Parameters

      - `base`: is the base address of EtherCAT Sub-System.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableIOConnectionLock`(uint32_t base, uint16_t writeKey)

    Locking the IO Configuration.

    This function leads to locking of the IO Configurations. Changing IO selections or IO configurations after this bit is set can have unpredictable IO behavior on the device IOs.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableIOConnectionLock`(uint32_t base, uint16_t writeKey)

    Disable Lock on the IO Configuration.

    This function leads to disabling of the locking of the IO Configurations. EtherCAT ports are not connected to the IO pad.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableResetInputFromGpioPad`(uint32_t base, uint16_t writeKey)

    Enabled ResetIN from GPIO.

    This function enables the RESET_IN GPIO pad input to be connected in reset input cone.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableResetInputFromGpioPad`(uint32_t base, uint16_t writeKey)

    Disable ResetIN from GPIO.

    This function leads to RESET_IN GPIO pad to not be enabled, only SW & PMM resets affect EtherCAT reset.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableESCEEPROMI2CIoPadConnection`(uint32_t base, uint16_t writeKey)

    Enables the EEPROM I2C IOPAD connection.

    This function leads to EEPROM I2C connections driving the IOPAD connections.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableESCEEPROMI2CIoPadConnection`(uint32_t base, uint16_t writeKey)

    Disable the EEPROM I2C IOPAD connection.

    This function leads to EEPROM I2C Connections not connected to IOPAD.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_configurePortCount`(uint32_t base, ESCSS_PortSelection portConfig, uint16_t writeKey)

    Number of PHY port counts.

    Indicates the number of PHY ports selected for operation in addition to Port0 which is default. The various values for the selection of

    portConfig are: ESCSS_ONE_PORT_SELECTION, ESCSS_TWO_PORT_SELECTION.
    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `portConfig`: indicating the number of PHY Ports to be selected.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableAutoCompensationTxClkIOPad`(uint32_t base, uint16_t writeKey)

    Auto Compensation based on sampling of TX_CLK.

    This setting is used to allocate the IO pad for TX_CLK for doing the Auto compensation for the sampling of TXEN & TXDATA.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableAutoCompensationTxClkIOPad`(uint32_t base, uint16_t writeKey)

    Manual Compensation is there using CLK_IN.

    This function sets the manual compensation using CLK_IN no TX_CLK Pad, IP input is tied to ‘0’.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableSync0GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    SYNC0 connection to OUT pad enabled.

    This function enables the direct mux between Sync0 output of EtherCAT and other GPIO functions.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableSync0GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    SYNC0 connection to OUT pad disabled.

    This function does not enables the direct mux between Sync0 output of EtherCAT and other GPIO functions.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableSync1GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    SYNC1 connection to OUT pad enabled.

    This function enables the direct mux between Sync1 output of EtherCAT and other GPIO functions.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableSync1GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    SYNC1 connection to OUT pad disabled.

    This function does not enables the direct mux between Sync1 output of EtherCAT and other GPIO functions.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableLatch0GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    LATCH0 connection to IN pad enabled.

    This function enables the direct mux between LATCH0 input from IOPAD and other GPIO functions to the EtherCATSS input.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableLatch0GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    LATCH0 connection to IN pad disabled.

    This function does not enable the direct mux between LATCH0 input from IOPAD and other GPIO functions to the EtherCATSS input.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_enableLatch1GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    LATCH1 connection to IN pad enabled.

    This function enables the direct mux between LATCH1 input from IOPAD and other GPIO functions to the EtherCATSS input.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  uint16_t `ESCSS_disableLatch1GpioMuxConnection`(uint32_t base, uint16_t writeKey)

    LATCH1 connection to IN pad disabled.

    This function does not enable the direct mux between LATCH1 input from IOPAD and other GPIO functions to the EtherCATSS input.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `writeKey`: is the key Value to enable the writing lock.

    Return

      Returns ESCSS_API_SUCCESS if the Register Access is successful, ESCSS_API_FAIL if access to the Register Fails.

  void `ESCSS_configureEEPROMSize`(uint32_t base, ESCSS_SizeSelect eepromSize)

    Configure EEPROM Size bound as per the select.

    This function set the bit which will be hooked up to the EEPROM_SIZE input of the EtherCAT IP . This is set to 0 for EEPROMs of size 16K bits or lower and set to 1 for EEPROMs of size above 16K bits.

    Parameters

      - `base`: is the base address of EtherCAT configuration Registers.

      - `eepromSize`: is the shift in 10ns terms.

    Return

      None.

The following describes important details and recommendations when using the ESCSS API.

Once system control enables the ESCSS module, ESCSS_initMemory() needs to be called to initialize the memory. Next, use ESCSS_enableDebugAccess() which configures the debug accesses to be allowed to go through. The API ESCSS_enableGPIPipelinedRegCaptureOnEvent() enables the connection of GPIN to EtherCATSS through pipelined register as against the direct from IO. The ESCSS_setGPINData() sets the GPIN Data Register Value.

The code for this module is contained in driverlib/escss.c, with driverlib/escss.h containing the API declarations for use by applications.