1/*
2 * File: Inverter_001.h
3 *
4 * Code generated for Simulink model 'Inverter_001'.
5 *
6 * Model version : 1.139
7 * Simulink Coder version : 8.14 (R2018a) 06-Feb-2018
8 * C/C++ source code generated on : Wed Apr 14 17:37:41 2021
9 *
10 * Target selection: ert.tlc
11 * Embedded hardware selection: Texas Instruments->C2000
12 * Code generation objectives: Unspecified
13 * Validation result: Not run
14 */
15
16#ifndef RTW_HEADER_Inverter_001_h_
17#define RTW_HEADER_Inverter_001_h_
18#include <math.h>
19#include <string.h>
20#include <stddef.h>
21#ifndef Inverter_001_COMMON_INCLUDES_
22# define Inverter_001_COMMON_INCLUDES_
23#include <IQmathLib.h>
24#include "rtwtypes.h"
25#include "F2837xD_device.h"
26#include "F2837xD_gpio.h"
27#include "F2837xD_Examples.h"
28#include "IQmathLib.h"
29#include "MW_c2837xdIPC.h"
30#include "MW_c2000DAC.h"
31#endif /* Inverter_001_COMMON_INCLUDES_ */
32
33#include "Inverter_001_types.h"
34#include "MW_target_hardware_resources.h"
35#include "IQmathLib.h"
36
37/* Macros for accessing real-time model data structure */
38#ifndef rtmGetErrorStatus
39# define rtmGetErrorStatus(rtm) ((rtm)->errorStatus)
40#endif
41
42#ifndef rtmSetErrorStatus
43# define rtmSetErrorStatus(rtm, val) ((rtm)->errorStatus = (val))
44#endif
45
46#ifndef rtmStepTask
47# define rtmStepTask(rtm, idx) ((rtm)->Timing.TaskCounters.TID[(idx)] == 0)
48#endif
49
50#ifndef rtmTaskCounter
51# define rtmTaskCounter(rtm, idx) ((rtm)->Timing.TaskCounters.TID[(idx)])
52#endif
53
54extern void config_ePWM_GPIO (void);
55
56/* Block signals (default storage) */
57typedef struct {
58 real32_T TmpRTBAtConstant62Outport1; /* '<Root>/Constant62' */
59 real32_T TmpRTBAtAdd11Inport2;
60 real32_T RateTransition1; /* '<Root>/Rate Transition1' */
61 real32_T TmpRTBAtAdd10Inport2;
62 real32_T TmpRTBAtAdd9Inport2;
63 real32_T TmpRTBAtConstant12Outport1; /* '<Root>/Constant12' */
64 real32_T TmpRTBAtAdd16Inport2;
65 real32_T TmpRTBAtAdd5Inport2;
66 real32_T TmpRTBAtAdd4Inport2;
67 real32_T TmpRTBAtAdd3Inport2;
68 real32_T TmpRTBAtAdd7Inport2;
69 real32_T TmpRTBAtAdd2Inport2;
70 real32_T RateTransition5[3]; /* '<Root>/Rate Transition5' */
71 real32_T IPCReceive_o1; /* '<Root>/IPC Receive' */
72 int32_T RateTransition60[3]; /* '<Root>/Rate Transition60' */
73 int32_T RateTransition62[3]; /* '<Root>/Rate Transition62' */
74 int32_T RateTransition21[3]; /* '<Root>/Rate Transition21' */
75 int32_T RateTransition61; /* '<Root>/Rate Transition61' */
76 int32_T RateTransition20[3]; /* '<Root>/Rate Transition20' */
77 int32_T RateTransition19[3]; /* '<Root>/Rate Transition19' */
78 uint16_T ADC2; /* '<S2>/ADC2' */
79 uint16_T ADC3; /* '<S2>/ADC3' */
80 uint16_T ADC4; /* '<S2>/ADC4' */
81 uint16_T ADC5; /* '<S2>/ADC5' */
82 uint16_T LoadCurrentIa; /* '<S2>/ADC6' */
83 uint16_T InverterCurrentIc; /* '<S2>/ADC7' */
84 uint16_T ADC9; /* '<S2>/ADC9' */
85 uint16_T ADC10; /* '<S2>/ADC10' */
86 uint16_T ADC11; /* '<S2>/ADC11' */
87 uint16_T IPCReceive_o2; /* '<Root>/IPC Receive' */
88 boolean_T RelationalOperator2[3]; /* '<Root>/Relational Operator2' */
89} B_Inverter_001_T;
90
91/* Block states (default storage) for system '<Root>' */
92typedef struct {
93 int32_T UnitDelay_DSTATE; /* '<S7>/Unit Delay' */
94 int32_T UnitDelay1_DSTATE; /* '<S7>/Unit Delay1' */
95 int32_T UnitDelay_DSTATE_c; /* '<S8>/Unit Delay' */
96 int32_T UnitDelay1_DSTATE_k; /* '<S8>/Unit Delay1' */
97 int32_T UnitDelay_DSTATE_f; /* '<S9>/Unit Delay' */
98 int32_T UnitDelay1_DSTATE_j; /* '<S9>/Unit Delay1' */
99 int32_T UnitDelay_DSTATE_g; /* '<S10>/Unit Delay' */
100 int32_T UnitDelay1_DSTATE_l; /* '<S10>/Unit Delay1' */
101 int32_T UnitDelay_DSTATE_k; /* '<S11>/Unit Delay' */
102 int32_T UnitDelay1_DSTATE_h; /* '<S11>/Unit Delay1' */
103 int32_T UnitDelay_DSTATE_p; /* '<S12>/Unit Delay' */
104 int32_T UnitDelay1_DSTATE_i; /* '<S12>/Unit Delay1' */
105 int32_T UnitDelay_DSTATE_d; /* '<S13>/Unit Delay' */
106 int32_T UnitDelay1_DSTATE_hy; /* '<S13>/Unit Delay1' */
107 int32_T UnitDelay_DSTATE_j; /* '<S14>/Unit Delay' */
108 int32_T UnitDelay1_DSTATE_jm; /* '<S14>/Unit Delay1' */
109 int32_T UnitDelay_DSTATE_l; /* '<S15>/Unit Delay' */
110 int32_T UnitDelay1_DSTATE_p; /* '<S15>/Unit Delay1' */
111 int32_T UnitDelay3_DSTATE; /* '<S30>/Unit Delay3' */
112 int32_T UnitDelay2_DSTATE; /* '<S30>/Unit Delay2' */
113 int32_T UnitDelay1_DSTATE_b; /* '<S30>/Unit Delay1' */
114 int32_T UnitDelay3_DSTATE_c; /* '<S29>/Unit Delay3' */
115 int32_T UnitDelay2_DSTATE_h; /* '<S29>/Unit Delay2' */
116 int32_T UnitDelay1_DSTATE_d; /* '<S29>/Unit Delay1' */
117 int32_T UnitDelay3_DSTATE_m; /* '<S28>/Unit Delay3' */
118 int32_T UnitDelay2_DSTATE_g; /* '<S28>/Unit Delay2' */
119 int32_T UnitDelay1_DSTATE_hyo; /* '<S28>/Unit Delay1' */
120 int32_T UnitDelay_DSTATE_lt; /* '<S28>/Unit Delay' */
121 int32_T UnitDelay3_DSTATE_o; /* '<S24>/Unit Delay3' */
122 int32_T UnitDelay2_DSTATE_gq; /* '<S24>/Unit Delay2' */
123 int32_T UnitDelay1_DSTATE_c; /* '<S24>/Unit Delay1' */
124 int32_T UnitDelay_DSTATE_a; /* '<S24>/Unit Delay' */
125 int32_T UnitDelay_DSTATE_o; /* '<S29>/Unit Delay' */
126 int32_T UnitDelay3_DSTATE_g; /* '<S25>/Unit Delay3' */
127 int32_T UnitDelay2_DSTATE_m; /* '<S25>/Unit Delay2' */
128 int32_T UnitDelay1_DSTATE_m; /* '<S25>/Unit Delay1' */
129 int32_T UnitDelay_DSTATE_m; /* '<S25>/Unit Delay' */
130 int32_T UnitDelay_DSTATE_i; /* '<S30>/Unit Delay' */
131 int32_T UnitDelay3_DSTATE_h; /* '<S26>/Unit Delay3' */
132 int32_T UnitDelay2_DSTATE_gh; /* '<S26>/Unit Delay2' */
133 int32_T UnitDelay_DSTATE_ci; /* '<S26>/Unit Delay' */
134 int32_T UnitDelay1_DSTATE_g; /* '<S26>/Unit Delay1' */
135 int32_T UnitDelay_DSTATE_lw; /* '<S34>/Unit Delay' */
136 real32_T TmpRTBAtConstant62Outport1_Buff;/* synthesized block */
137 real32_T TmpRTBAtAdd11Inport2_Buffer0;/* synthesized block */
138 real32_T RateTransition1_Buffer0; /* '<Root>/Rate Transition1' */
139 real32_T TmpRTBAtAdd10Inport2_Buffer0;/* synthesized block */
140 real32_T TmpRTBAtAdd9Inport2_Buffer0;/* synthesized block */
141 real32_T TmpRTBAtConstant12Outport1_Buff;/* synthesized block */
142 real32_T TmpRTBAtAdd16Inport2_Buffer0;/* synthesized block */
143 real32_T TmpRTBAtAdd5Inport2_Buffer0;/* synthesized block */
144 real32_T TmpRTBAtAdd4Inport2_Buffer0;/* synthesized block */
145 real32_T TmpRTBAtAdd3Inport2_Buffer0;/* synthesized block */
146 real32_T TmpRTBAtAdd7Inport2_Buffer0;/* synthesized block */
147 real32_T TmpRTBAtAdd2Inport2_Buffer0;/* synthesized block */
148} DW_Inverter_001_T;
149
150/* Parameters (default storage) */
151struct P_Inverter_001_T_ {
152 struct_LAUrP08Nl5w42cAMHTmYgH Control;/* Variable: Control
153 * Referenced by:
154 * '<S24>/Gain'
155 * '<S24>/Gain1'
156 * '<S25>/Gain'
157 * '<S25>/Gain1'
158 * '<S26>/Gain'
159 * '<S26>/Gain1'
160 * '<S28>/Gain'
161 * '<S28>/Gain1'
162 * '<S29>/Gain'
163 * '<S29>/Gain1'
164 * '<S30>/Gain'
165 * '<S30>/Gain1'
166 */
167 int32_T CC_Tci; /* Variable: CC_Tci
168 * Referenced by: '<S16>/Ki2'
169 */
170 int32_T CC_Tci0; /* Variable: CC_Tci0
171 * Referenced by: '<S16>/Ki1'
172 */
173 int32_T CC_Tcr; /* Variable: CC_Tcr
174 * Referenced by:
175 * '<S16>/Kr1'
176 * '<S16>/Kr2'
177 */
178 int32_T Kcp; /* Variable: Kcp
179 * Referenced by: '<S16>/Kp2'
180 */
181 int32_T Kcp0; /* Variable: Kcp0
182 * Referenced by: '<S16>/Kp1'
183 */
184 int32_T Kvp; /* Variable: Kvp
185 * Referenced by: '<S23>/Kp4'
186 */
187 int32_T Kvp0; /* Variable: Kvp0
188 * Referenced by: '<S23>/Kp2'
189 */
190 int32_T VC_Tci; /* Variable: VC_Tci
191 * Referenced by: '<S23>/Ki3'
192 */
193 int32_T VC_Tci0; /* Variable: VC_Tci0
194 * Referenced by: '<S23>/Ki2'
195 */
196 int32_T VC_Tcr; /* Variable: VC_Tcr
197 * Referenced by:
198 * '<S23>/Kr2'
199 * '<S23>/Kr3'
200 */
201 real_T FloattoIQN2_P1; /* Expression: Q_value
202 * Referenced by: '<S6>/Float to IQN2'
203 */
204 real_T FloattoIQN_P1; /* Expression: Q_value
205 * Referenced by: '<S6>/Float to IQN'
206 */
207 real_T FloattoIQN1_P1; /* Expression: Q_value
208 * Referenced by: '<S6>/Float to IQN1'
209 */
210 real_T FloattoIQN_P1_j; /* Expression: Q_value
211 * Referenced by: '<S33>/Float to IQN'
212 */
213 real_T FloattoIQN1_P1_i; /* Expression: Q_value
214 * Referenced by: '<S5>/Float to IQN1'
215 */
216 real_T FloattoIQN4_P1; /* Expression: Q_value
217 * Referenced by: '<Root>/Float to IQN4'
218 */
219 real_T FloattoIQN_P1_o; /* Expression: Q_value
220 * Referenced by: '<S18>/Float to IQN'
221 */
222 real_T FloattoIQN_P1_l; /* Expression: Q_value
223 * Referenced by: '<S19>/Float to IQN'
224 */
225 real_T FloattoIQN_P1_g; /* Expression: Q_value
226 * Referenced by: '<S20>/Float to IQN'
227 */
228 real_T FloattoIQN_P1_gu; /* Expression: Q_value
229 * Referenced by: '<S17>/Float to IQN'
230 */
231 real_T FloattoIQN4_P1_f; /* Expression: Q_value
232 * Referenced by: '<S3>/Float to IQN4'
233 */
234 int32_T Saturation4_UpperSat; /* Computed Parameter: Saturation4_UpperSat
235 * Referenced by: '<Root>/Saturation4'
236 */
237 int32_T Saturation4_LowerSat; /* Computed Parameter: Saturation4_LowerSat
238 * Referenced by: '<Root>/Saturation4'
239 */
240 int32_T Constant8_Value; /* Computed Parameter: Constant8_Value
241 * Referenced by: '<Root>/Constant8'
242 */
243 int32_T Saturation5_UpperSat; /* Computed Parameter: Saturation5_UpperSat
244 * Referenced by: '<Root>/Saturation5'
245 */
246 int32_T Saturation5_LowerSat; /* Computed Parameter: Saturation5_LowerSat
247 * Referenced by: '<Root>/Saturation5'
248 */
249 int32_T Constant3_Value; /* Computed Parameter: Constant3_Value
250 * Referenced by: '<Root>/Constant3'
251 */
252 int32_T Constant2_Value; /* Computed Parameter: Constant2_Value
253 * Referenced by: '<S1>/Constant2'
254 */
255 int32_T UnitDelay_InitialCondition; /* Computed Parameter: UnitDelay_InitialCondition
256 * Referenced by: '<S7>/Unit Delay'
257 */
258 int32_T UnitDelay1_InitialCondition; /* Computed Parameter: UnitDelay1_InitialCondition
259 * Referenced by: '<S7>/Unit Delay1'
260 */
261 int32_T UnitDelay_InitialCondition_e;/* Computed Parameter: UnitDelay_InitialCondition_e
262 * Referenced by: '<S8>/Unit Delay'
263 */
264 int32_T UnitDelay1_InitialCondition_g;/* Computed Parameter: UnitDelay1_InitialCondition_g
265 * Referenced by: '<S8>/Unit Delay1'
266 */
267 int32_T UnitDelay_InitialCondition_i;/* Computed Parameter: UnitDelay_InitialCondition_i
268 * Referenced by: '<S9>/Unit Delay'
269 */
270 int32_T UnitDelay1_InitialCondition_b;/* Computed Parameter: UnitDelay1_InitialCondition_b
271 * Referenced by: '<S9>/Unit Delay1'
272 */
273 int32_T UnitDelay_InitialCondition_n;/* Computed Parameter: UnitDelay_InitialCondition_n
274 * Referenced by: '<S10>/Unit Delay'
275 */
276 int32_T UnitDelay1_InitialCondition_a;/* Computed Parameter: UnitDelay1_InitialCondition_a
277 * Referenced by: '<S10>/Unit Delay1'
278 */
279 int32_T UnitDelay_InitialCondition_c;/* Computed Parameter: UnitDelay_InitialCondition_c
280 * Referenced by: '<S11>/Unit Delay'
281 */
282 int32_T UnitDelay1_InitialCondition_l;/* Computed Parameter: UnitDelay1_InitialCondition_l
283 * Referenced by: '<S11>/Unit Delay1'
284 */
285 int32_T UnitDelay_InitialCondition_cr;/* Computed Parameter: UnitDelay_InitialCondition_cr
286 * Referenced by: '<S12>/Unit Delay'
287 */
288 int32_T UnitDelay1_InitialCondition_l1;/* Computed Parameter: UnitDelay1_InitialCondition_l1
289 * Referenced by: '<S12>/Unit Delay1'
290 */
291 int32_T UnitDelay_InitialCondition_k;/* Computed Parameter: UnitDelay_InitialCondition_k
292 * Referenced by: '<S13>/Unit Delay'
293 */
294 int32_T UnitDelay1_InitialCondition_f;/* Computed Parameter: UnitDelay1_InitialCondition_f
295 * Referenced by: '<S13>/Unit Delay1'
296 */
297 int32_T UnitDelay_InitialCondition_d;/* Computed Parameter: UnitDelay_InitialCondition_d
298 * Referenced by: '<S14>/Unit Delay'
299 */
300 int32_T UnitDelay1_InitialCondition_m;/* Computed Parameter: UnitDelay1_InitialCondition_m
301 * Referenced by: '<S14>/Unit Delay1'
302 */
303 int32_T UnitDelay_InitialCondition_p;/* Computed Parameter: UnitDelay_InitialCondition_p
304 * Referenced by: '<S15>/Unit Delay'
305 */
306 int32_T UnitDelay1_InitialCondition_e;/* Computed Parameter: UnitDelay1_InitialCondition_e
307 * Referenced by: '<S15>/Unit Delay1'
308 */
309 int32_T UnitDelay3_InitialCondition; /* Computed Parameter: UnitDelay3_InitialCondition
310 * Referenced by: '<S30>/Unit Delay3'
311 */
312 int32_T UnitDelay2_InitialCondition; /* Computed Parameter: UnitDelay2_InitialCondition
313 * Referenced by: '<S30>/Unit Delay2'
314 */
315 int32_T UnitDelay1_InitialCondition_b1;/* Computed Parameter: UnitDelay1_InitialCondition_b1
316 * Referenced by: '<S30>/Unit Delay1'
317 */
318 int32_T UnitDelay3_InitialCondition_g;/* Computed Parameter: UnitDelay3_InitialCondition_g
319 * Referenced by: '<S29>/Unit Delay3'
320 */
321 int32_T UnitDelay2_InitialCondition_h;/* Computed Parameter: UnitDelay2_InitialCondition_h
322 * Referenced by: '<S29>/Unit Delay2'
323 */
324 int32_T UnitDelay1_InitialCondition_gr;/* Computed Parameter: UnitDelay1_InitialCondition_gr
325 * Referenced by: '<S29>/Unit Delay1'
326 */
327 int32_T w5_Value; /* Computed Parameter: w5_Value
328 * Referenced by: '<S23>/w5'
329 */
330 int32_T UnitDelay3_InitialCondition_o;/* Computed Parameter: UnitDelay3_InitialCondition_o
331 * Referenced by: '<S28>/Unit Delay3'
332 */
333 int32_T UnitDelay2_InitialCondition_m;/* Computed Parameter: UnitDelay2_InitialCondition_m
334 * Referenced by: '<S28>/Unit Delay2'
335 */
336 int32_T UnitDelay1_InitialCondition_lk;/* Computed Parameter: UnitDelay1_InitialCondition_lk
337 * Referenced by: '<S28>/Unit Delay1'
338 */
339 int32_T UnitDelay_InitialCondition_ck;/* Computed Parameter: UnitDelay_InitialCondition_ck
340 * Referenced by: '<S28>/Unit Delay'
341 */
342 int32_T UnitDelay3_InitialCondition_j;/* Computed Parameter: UnitDelay3_InitialCondition_j
343 * Referenced by: '<S24>/Unit Delay3'
344 */
345 int32_T UnitDelay2_InitialCondition_k;/* Computed Parameter: UnitDelay2_InitialCondition_k
346 * Referenced by: '<S24>/Unit Delay2'
347 */
348 int32_T UnitDelay1_InitialCondition_h;/* Computed Parameter: UnitDelay1_InitialCondition_h
349 * Referenced by: '<S24>/Unit Delay1'
350 */
351 int32_T UnitDelay_InitialCondition_ph;/* Computed Parameter: UnitDelay_InitialCondition_ph
352 * Referenced by: '<S24>/Unit Delay'
353 */
354 int32_T w2_Value; /* Computed Parameter: w2_Value
355 * Referenced by: '<S16>/w2'
356 */
357 int32_T UnitDelay_InitialCondition_f;/* Computed Parameter: UnitDelay_InitialCondition_f
358 * Referenced by: '<S29>/Unit Delay'
359 */
360 int32_T UnitDelay3_InitialCondition_p;/* Computed Parameter: UnitDelay3_InitialCondition_p
361 * Referenced by: '<S25>/Unit Delay3'
362 */
363 int32_T UnitDelay2_InitialCondition_b;/* Computed Parameter: UnitDelay2_InitialCondition_b
364 * Referenced by: '<S25>/Unit Delay2'
365 */
366 int32_T UnitDelay1_InitialCondition_fy;/* Computed Parameter: UnitDelay1_InitialCondition_fy
367 * Referenced by: '<S25>/Unit Delay1'
368 */
369 int32_T UnitDelay_InitialCondition_g;/* Computed Parameter: UnitDelay_InitialCondition_g
370 * Referenced by: '<S25>/Unit Delay'
371 */
372 int32_T UnitDelay_InitialCondition_nv;/* Computed Parameter: UnitDelay_InitialCondition_nv
373 * Referenced by: '<S30>/Unit Delay'
374 */
375 int32_T UnitDelay3_InitialCondition_d;/* Computed Parameter: UnitDelay3_InitialCondition_d
376 * Referenced by: '<S26>/Unit Delay3'
377 */
378 int32_T UnitDelay2_InitialCondition_f;/* Computed Parameter: UnitDelay2_InitialCondition_f
379 * Referenced by: '<S26>/Unit Delay2'
380 */
381 int32_T UnitDelay_InitialCondition_e3;/* Computed Parameter: UnitDelay_InitialCondition_e3
382 * Referenced by: '<S26>/Unit Delay'
383 */
384 int32_T UnitDelay1_InitialCondition_n;/* Computed Parameter: UnitDelay1_InitialCondition_n
385 * Referenced by: '<S26>/Unit Delay1'
386 */
387 int32_T w1_Value; /* Computed Parameter: w1_Value
388 * Referenced by: '<S16>/w1'
389 */
390 int32_T w2_Value_n; /* Computed Parameter: w2_Value_n
391 * Referenced by: '<S23>/w2'
392 */
393 int32_T Constant11_Value; /* Computed Parameter: Constant11_Value
394 * Referenced by: '<S6>/Constant11'
395 */
396 int32_T Constant8_Value_e; /* Computed Parameter: Constant8_Value_e
397 * Referenced by: '<S6>/Constant8'
398 */
399 int32_T Constant9_Value; /* Computed Parameter: Constant9_Value
400 * Referenced by: '<S6>/Constant9'
401 */
402 int32_T UnitDelay_InitialCondition_pq;/* Computed Parameter: UnitDelay_InitialCondition_pq
403 * Referenced by: '<S34>/Unit Delay'
404 */
405 int32_T u_Value; /* Computed Parameter: u_Value
406 * Referenced by: '<S36>/1'
407 */
408 int32_T u_Value_e; /* Computed Parameter: u_Value_e
409 * Referenced by: '<S36>/-1'
410 */
411 int32_T u_Value_f; /* Computed Parameter: u_Value_f
412 * Referenced by: '<S37>/1'
413 */
414 int32_T u_Value_c; /* Computed Parameter: u_Value_c
415 * Referenced by: '<S37>/-1'
416 */
417 int32_T Gain6_Gain; /* Computed Parameter: Gain6_Gain
418 * Referenced by: '<S16>/Gain6'
419 */
420 int32_T Gain7_Gain; /* Computed Parameter: Gain7_Gain
421 * Referenced by: '<S16>/Gain7'
422 */
423 int32_T Gain_Gain; /* Computed Parameter: Gain_Gain
424 * Referenced by: '<S5>/Gain'
425 */
426 int32_T Gain_Gain_g; /* Computed Parameter: Gain_Gain_g
427 * Referenced by: '<S19>/Gain'
428 */
429 int32_T Gain1_Gain; /* Computed Parameter: Gain1_Gain
430 * Referenced by: '<S19>/Gain1'
431 */
432 int32_T Gain_Gain_b; /* Computed Parameter: Gain_Gain_b
433 * Referenced by: '<S18>/Gain'
434 */
435 int32_T Gain1_Gain_g; /* Computed Parameter: Gain1_Gain_g
436 * Referenced by: '<S18>/Gain1'
437 */
438 int32_T Gain_Gain_n; /* Computed Parameter: Gain_Gain_n
439 * Referenced by: '<S20>/Gain'
440 */
441 int32_T Gain1_Gain_f; /* Computed Parameter: Gain1_Gain_f
442 * Referenced by: '<S20>/Gain1'
443 */
444 int32_T Gain_Gain_j; /* Computed Parameter: Gain_Gain_j
445 * Referenced by: '<S31>/Gain'
446 */
447 int32_T Gain1_Gain_o; /* Computed Parameter: Gain1_Gain_o
448 * Referenced by: '<S31>/Gain1'
449 */
450 int32_T Gain12_Gain; /* Computed Parameter: Gain12_Gain
451 * Referenced by: '<S23>/Gain12'
452 */
453 int32_T Gain13_Gain; /* Computed Parameter: Gain13_Gain
454 * Referenced by: '<S23>/Gain13'
455 */
456 real32_T TmpRTBAtConstant62Outport1_Init;/* Computed Parameter: TmpRTBAtConstant62Outport1_Init
457 * Referenced by: synthesized block
458 */
459 real32_T TmpRTBAtAdd11Inport2_InitialCon;/* Computed Parameter: TmpRTBAtAdd11Inport2_InitialCon
460 * Referenced by: synthesized block
461 */
462 real32_T Constant2_Value_p; /* Computed Parameter: Constant2_Value_p
463 * Referenced by: '<Root>/Constant2'
464 */
465 real32_T Constant14_Value; /* Computed Parameter: Constant14_Value
466 * Referenced by: '<S4>/Constant14'
467 */
468 real32_T Constant13_Value; /* Computed Parameter: Constant13_Value
469 * Referenced by: '<S4>/Constant13'
470 */
471 real32_T RateTransition1_InitialConditio;/* Computed Parameter: RateTransition1_InitialConditio
472 * Referenced by: '<Root>/Rate Transition1'
473 */
474 real32_T Gain3_Gain; /* Computed Parameter: Gain3_Gain
475 * Referenced by: '<S6>/Gain3'
476 */
477 real32_T Constant13_Value_c; /* Computed Parameter: Constant13_Value_c
478 * Referenced by: '<S6>/Constant13'
479 */
480 real32_T Constant14_Value_p; /* Computed Parameter: Constant14_Value_p
481 * Referenced by: '<S6>/Constant14'
482 */
483 real32_T Constant10_Value; /* Computed Parameter: Constant10_Value
484 * Referenced by: '<S6>/Constant10'
485 */
486 real32_T Gain2_Gain; /* Computed Parameter: Gain2_Gain
487 * Referenced by: '<S6>/Gain2'
488 */
489 real32_T Constant_Value; /* Computed Parameter: Constant_Value
490 * Referenced by: '<S33>/Constant'
491 */
492 real32_T Constant15_Value; /* Computed Parameter: Constant15_Value
493 * Referenced by: '<S4>/Constant15'
494 */
495 real32_T TmpRTBAtAdd10Inport2_InitialCon;/* Computed Parameter: TmpRTBAtAdd10Inport2_InitialCon
496 * Referenced by: synthesized block
497 */
498 real32_T TmpRTBAtAdd9Inport2_InitialCond;/* Computed Parameter: TmpRTBAtAdd9Inport2_InitialCond
499 * Referenced by: synthesized block
500 */
501 real32_T TmpRTBAtConstant12Outport1_Init;/* Computed Parameter: TmpRTBAtConstant12Outport1_Init
502 * Referenced by: synthesized block
503 */
504 real32_T TmpRTBAtAdd16Inport2_InitialCon;/* Computed Parameter: TmpRTBAtAdd16Inport2_InitialCon
505 * Referenced by: synthesized block
506 */
507 real32_T TmpRTBAtAdd5Inport2_InitialCond;/* Computed Parameter: TmpRTBAtAdd5Inport2_InitialCond
508 * Referenced by: synthesized block
509 */
510 real32_T TmpRTBAtAdd4Inport2_InitialCond;/* Computed Parameter: TmpRTBAtAdd4Inport2_InitialCond
511 * Referenced by: synthesized block
512 */
513 real32_T TmpRTBAtAdd3Inport2_InitialCond;/* Computed Parameter: TmpRTBAtAdd3Inport2_InitialCond
514 * Referenced by: synthesized block
515 */
516 real32_T TmpRTBAtAdd7Inport2_InitialCond;/* Computed Parameter: TmpRTBAtAdd7Inport2_InitialCond
517 * Referenced by: synthesized block
518 */
519 real32_T TmpRTBAtAdd2Inport2_InitialCond;/* Computed Parameter: TmpRTBAtAdd2Inport2_InitialCond
520 * Referenced by: synthesized block
521 */
522 real32_T Gain2_Gain_f; /* Computed Parameter: Gain2_Gain_f
523 * Referenced by: '<Root>/Gain2'
524 */
525 real32_T Constant10_Value_j; /* Computed Parameter: Constant10_Value_j
526 * Referenced by: '<S3>/Constant10'
527 */
528 real32_T Constant13_Value_cs; /* Computed Parameter: Constant13_Value_cs
529 * Referenced by: '<S3>/Constant13'
530 */
531 real32_T Constant14_Value_o; /* Computed Parameter: Constant14_Value_o
532 * Referenced by: '<S3>/Constant14'
533 */
534 real32_T Constant_Value_h; /* Computed Parameter: Constant_Value_h
535 * Referenced by: '<S18>/Constant'
536 */
537 real32_T Constant_Value_b; /* Computed Parameter: Constant_Value_b
538 * Referenced by: '<S19>/Constant'
539 */
540 real32_T Constant_Value_m; /* Computed Parameter: Constant_Value_m
541 * Referenced by: '<S20>/Constant'
542 */
543 real32_T Constant_Value_br; /* Computed Parameter: Constant_Value_br
544 * Referenced by: '<S17>/Constant'
545 */
546 real32_T Bias1_Bias; /* Computed Parameter: Bias1_Bias
547 * Referenced by: '<Root>/Bias1'
548 */
549 real32_T Bias2_Bias; /* Computed Parameter: Bias2_Bias
550 * Referenced by: '<Root>/Bias2'
551 */
552 real32_T Constant12_Value; /* Computed Parameter: Constant12_Value
553 * Referenced by: '<Root>/Constant12'
554 */
555 real32_T Constant14_Value_m; /* Computed Parameter: Constant14_Value_m
556 * Referenced by: '<Root>/Constant14'
557 */
558 real32_T Constant55_Value; /* Computed Parameter: Constant55_Value
559 * Referenced by: '<Root>/Constant55'
560 */
561 real32_T Constant57_Value; /* Computed Parameter: Constant57_Value
562 * Referenced by: '<Root>/Constant57'
563 */
564 real32_T Constant58_Value; /* Computed Parameter: Constant58_Value
565 * Referenced by: '<Root>/Constant58'
566 */
567 real32_T Constant61_Value; /* Computed Parameter: Constant61_Value
568 * Referenced by: '<Root>/Constant61'
569 */
570 real32_T Constant62_Value; /* Computed Parameter: Constant62_Value
571 * Referenced by: '<Root>/Constant62'
572 */
573 real32_T Constant63_Value; /* Computed Parameter: Constant63_Value
574 * Referenced by: '<Root>/Constant63'
575 */
576 real32_T Constant65_Value; /* Computed Parameter: Constant65_Value
577 * Referenced by: '<Root>/Constant65'
578 */
579 real32_T Constant68_Value; /* Computed Parameter: Constant68_Value
580 * Referenced by: '<Root>/Constant68'
581 */
582 real32_T Constant72_Value; /* Computed Parameter: Constant72_Value
583 * Referenced by: '<Root>/Constant72'
584 */
585 real32_T Constant89_Value; /* Computed Parameter: Constant89_Value
586 * Referenced by: '<Root>/Constant89'
587 */
588};
589
590/* Real-time Model Data Structure */
591struct tag_RTM_Inverter_001_T {
592 const char_T *errorStatus;
593
594 /*
595 * Timing:
596 * The following substructure contains information regarding
597 * the timing information for the model.
598 */
599 struct {
600 struct {
601 uint16_T TID[4];
602 } TaskCounters;
603
604 struct {
605 boolean_T TID0_1;
606 boolean_T TID0_3;
607 } RateInteraction;
608 } Timing;
609};
610
611/* Block parameters (default storage) */
612extern P_Inverter_001_T Inverter_001_P;
613
614/* Block signals (default storage) */
615extern B_Inverter_001_T Inverter_001_B;
616
617/* Block states (default storage) */
618extern DW_Inverter_001_T Inverter_001_DW;
619
620/* External function called from main */
621extern void Inverter_001_SetEventsForThisBaseStep(boolean_T *eventFlags);
622
623/* Model entry point functions */
624extern void Inverter_001_SetEventsForThisBaseStep(boolean_T *eventFlags);
625extern void Inverter_001_initialize(void);
626extern void Inverter_001_step0(void);
627extern void Inverter_001_step1(void);
628extern void Inverter_001_step2(void);
629extern void Inverter_001_step3(void);
630extern void Inverter_001_terminate(void);
631
632/* Real-time Model object */
633extern RT_MODEL_Inverter_001_T *const Inverter_001_M;
634
635/*-
636 * These blocks were eliminated from the model due to optimizations:
637 *
638 * Block '<S17>/Product2' : Unused code path elimination
639 * Block '<S17>/Product3' : Unused code path elimination
640 * Block '<S17>/Product4' : Unused code path elimination
641 * Block '<S17>/Product5' : Unused code path elimination
642 * Block '<S17>/Product6' : Unused code path elimination
643 * Block '<S17>/Product7' : Unused code path elimination
644 * Block '<S17>/Sum1' : Unused code path elimination
645 * Block '<S17>/Sum4' : Unused code path elimination
646 * Block '<S17>/Sum5' : Unused code path elimination
647 * Block '<Root>/Rate Transition6' : Unused code path elimination
648 * Block '<Root>/Rate Transition7' : Unused code path elimination
649 * Block '<S39>/Data Type Duplicate' : Unused code path elimination
650 * Block '<Root>/Scope7' : Unused code path elimination
651 * Block '<Root>/Scope8' : Unused code path elimination
652 * Block '<S24>/Data Type Conversion' : Eliminate redundant data type conversion
653 * Block '<S25>/Data Type Conversion' : Eliminate redundant data type conversion
654 * Block '<S26>/Data Type Conversion' : Eliminate redundant data type conversion
655 * Block '<S28>/Data Type Conversion' : Eliminate redundant data type conversion
656 * Block '<S29>/Data Type Conversion' : Eliminate redundant data type conversion
657 * Block '<S30>/Data Type Conversion' : Eliminate redundant data type conversion
658 * Block '<Root>/Rate Transition4' : Eliminated since input and output rates are identical
659 * Block '<S39>/Conversion' : Eliminate redundant data type conversion
660 */
661
662/*-
663 * The generated code includes comments that allow you to trace directly
664 * back to the appropriate location in the model. The basic format
665 * is <system>/block_name, where system is the system number (uniquely
666 * assigned by Simulink) and block_name is the name of the block.
667 *
668 * Use the MATLAB hilite_system command to trace the generated code back
669 * to the model. For example,
670 *
671 * hilite_system('<S3>') - opens system 3
672 * hilite_system('<S3>/Kp') - opens and selects block Kp which resides in S3
673 *
674 * Here is the system hierarchy for this model
675 *
676 * '<Root>' : 'Inverter_001'
677 * '<S1>' : 'Inverter_001/AC Filter'
678 * '<S2>' : 'Inverter_001/ADC'
679 * '<S3>' : 'Inverter_001/Control'
680 * '<S4>' : 'Inverter_001/InverterPWM'
681 * '<S5>' : 'Inverter_001/Modulation1'
682 * '<S6>' : 'Inverter_001/Reference'
683 * '<S7>' : 'Inverter_001/AC Filter/Low Pass Filter1'
684 * '<S8>' : 'Inverter_001/AC Filter/Low Pass Filter2'
685 * '<S9>' : 'Inverter_001/AC Filter/Low Pass Filter3'
686 * '<S10>' : 'Inverter_001/AC Filter/Low Pass Filter4'
687 * '<S11>' : 'Inverter_001/AC Filter/Low Pass Filter5'
688 * '<S12>' : 'Inverter_001/AC Filter/Low Pass Filter6'
689 * '<S13>' : 'Inverter_001/AC Filter/Low Pass Filter7'
690 * '<S14>' : 'Inverter_001/AC Filter/Low Pass Filter8'
691 * '<S15>' : 'Inverter_001/AC Filter/Low Pass Filter9'
692 * '<S16>' : 'Inverter_001/Control/Current contro v2'
693 * '<S17>' : 'Inverter_001/Control/Inverse Park Transformation'
694 * '<S18>' : 'Inverter_001/Control/Park Transformation'
695 * '<S19>' : 'Inverter_001/Control/Park Transformation1'
696 * '<S20>' : 'Inverter_001/Control/Park Transformation2'
697 * '<S21>' : 'Inverter_001/Control/Subsystem'
698 * '<S22>' : 'Inverter_001/Control/Subsystem1'
699 * '<S23>' : 'Inverter_001/Control/Voltage control v1'
700 * '<S24>' : 'Inverter_001/Control/Current contro v2/PIR controller1'
701 * '<S25>' : 'Inverter_001/Control/Current contro v2/PIR controller2'
702 * '<S26>' : 'Inverter_001/Control/Current contro v2/PIR controller3'
703 * '<S27>' : 'Inverter_001/Control/Current contro v2/PIR controller4'
704 * '<S28>' : 'Inverter_001/Control/Voltage control v1/PIR controller1'
705 * '<S29>' : 'Inverter_001/Control/Voltage control v1/PIR controller2'
706 * '<S30>' : 'Inverter_001/Control/Voltage control v1/PIR controller3'
707 * '<S31>' : 'Inverter_001/Modulation1/Carrier1'
708 * '<S32>' : 'Inverter_001/Modulation1/Carrier1/MATLAB Function'
709 * '<S33>' : 'Inverter_001/Reference/Inverse Park Transformation'
710 * '<S34>' : 'Inverter_001/Reference/Ramp Generator1'
711 * '<S35>' : 'Inverter_001/Reference/Ramp Generator1/Convert Param To fix-pt with floor rounding mode'
712 * '<S36>' : 'Inverter_001/Reference/Ramp Generator1/Subsystem'
713 * '<S37>' : 'Inverter_001/Reference/Ramp Generator1/Subsystem1'
714 * '<S38>' : 'Inverter_001/Reference/Ramp Generator1/Convert Param To fix-pt with floor rounding mode/Embedded MATLAB Function'
715 * '<S39>' : 'Inverter_001/Reference/Ramp Generator1/Subsystem/Data Type Conversion Inherited'
716 */
717#endif /* RTW_HEADER_Inverter_001_h_ */
718
719/*
720 * File trailer for generated code.
721 *
722 * [EOF]
723 */
724