/* ==============================================================================
File Name:	CommonVariables.c

Description:
    This file defines variables that are commonly used in CPU1 and CPU2.
    These variables are put in the GsRAM owned by CPU1, so they are read-only
    for CPU2. The common variables are instanced within both CPUs (assigned value
    in CPU 1), and they are mapped to the same memory zone (via pragma instruction).

=================================================================================  */
//###########################################################################
//
// FILE:   f2838x_device.h
//
// TITLE:  F2838x Device Definitions.
//
//###########################################################################
// $TI Release: F2838x Support Library v3.02.00.00 $
// $Release Date: Tue May 26 17:21:56 IST 2020 $
// $Copyright:
// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
//
// Redistribution and use in source and binary forms, with or without 
// modification, are permitted provided that the following conditions 
// are met:
// 
//   Redistributions of source code must retain the above copyright 
//   notice, this list of conditions and the following disclaimer.
// 
//   Redistributions in binary form must reproduce the above copyright
//   notice, this list of conditions and the following disclaimer in the 
//   documentation and/or other materials provided with the   
//   distribution.
// 
//   Neither the name of Texas Instruments Incorporated nor the names of
//   its contributors may be used to endorse or promote products derived
//   from this software without specific prior written permission.
// 
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
// $
//###########################################################################






//
// User To Select Target Device:
//


//
// C++ Bool Compatibility
//

//
// C99 defines boolean type to be _Bool, but this doesn't match the format of
// the other standard integer types.  bool_t has been defined to fill this gap.
//
typedef _Bool bool_t;

//
//used for a bool function return status
//
typedef _Bool status_t;








typedef signed char					int8;
typedef short						int16;
typedef int							int32;
typedef unsigned char				Uint8;
typedef unsigned short				Uint16;
typedef unsigned int				Uint32;
typedef float						float32;
typedef long double					float64;

// Define maximum supported axis and encoder number and slot number
//#define	MAX_CMPNT_NUM_FRONTSTAGE	6	// No use. FrontStage sup max component number=6 but DeviceInfo only sup 4
//#define	MAX_CMPNT_NUM_EXTBOARD		6	// No use. ExtBoard sup max component number=6 but DeviceInfo only sup 4
//#define	MAX_CMPNT_NUM_ADDONCARD		6	// No use. AddonCard sup max component number=6 but DeviceInfo only sup 4


// Define for M3 extended IO

// Define for extended monitor for each encoder (current spedification is related to the axis number)

// Define M3 maximum supported extend slave number

// Define for axis and encoder number in execution for each CPU
// two axial axes run in CPU1

// one axial and one spindle axes(with dual-feedback) run in CPU2

// Timer loop frequency (Hz)


// MCU revision ID



//
// End of file.
//
/* ==============================================================================
File Name:	CommonVariables.h

Description:
    This file defines variables that are commonly used in CPU1 and CPU2.
    These variables are put in the GsRAM owned by CPU1, so they are read-only
    for CPU2. The common variables are instanced within both CPUs (assigned value
    in CPU 1), and they are mapped to the same memory zone (via pragma instruction).

=================================================================================  */


/* =================================================================================
File name:        DMCTYPE.H                    
                    
Originator:	Digital Control Systems Group
			Texas Instruments

Description: DMC data type definition file.
=====================================================================================
 History:
-------------------------------------------------------------------------------------
 04-15-2005	Version 3.20                                               
------------------------------------------------------------------------------*/
 

//---------------------------------------------------------------------------
// For Portability, User Is Recommended To Use Following Data Type Size
// Definitions For 16-bit and 32-Bit Signed/Unsigned Integers:
//

typedef signed char					int8;
typedef short						int16;
typedef int							int32;
typedef long long					int64;
typedef unsigned char				Uint8;
typedef unsigned short				Uint16;
typedef unsigned int				Uint32;
typedef unsigned long long			Uint64;
typedef float						float32;
typedef long double					float64;



//#define PI 3.14159265358979L, if higher accuracy is necessary, suffix L should be added.

//define TWOPI 6.28318530717958L, if higher accuracy is necessary, suffix L should be added.





// Version Number Coding
// X.XX.XXrcXXX		for development pre-release
// X.XX.XX		for final release, which release candidate number is zero.

 

typedef struct {     Uint32  EncUpdateTimeTick;
    int32   LastAbsCounter;
    int32   AbsCounter;
    int32   LastAbsCounterOri_E1;
    int32   AbsCounterOri_E1;
    int32   LastAbsCounterOri_E2;
    int32   AbsCounterOri_E2;
} EncDelayTable;

typedef struct {    int16 MotionDirPolarity;
                    float32 EncUpdateFreq;      // Constant value, delay table update frequency. Unit: period / us
                    float32 EncDelayTime;
                    int16   EncTableIndex;
                    int16   EnEnc1DelayTable;
                    int16   EnEnc2DelayTable;
                    EncDelayTable DelayTable[2];
                } HostEncDelayTableVar;

// Define for variables in CPU1 which will be referenced in CM
// must allocate to CPU1toCM message RAM
typedef struct {
	Uint16	IPCStatus;
	int16	HostCommType;
	int16	IsMechIsrPeriodErr;
	float32	TransCycleTime;
	HostEncDelayTableVar EncDelayTableVar[2];
	int16	AxisControlType[2];
} CPU1RefVariablesCM;






//===========================================================================
// No more.
//===========================================================================



#pragma DATA_SECTION(CPU1RefVarCM,"CPU1RefVariableCMFiles");
#pragma RETAIN(CPU1RefVarCM);
#pragma DATA_SECTION(Host_ServoRspCH_MasterCPU,"Host_CPU1ServoRspFiles");
#pragma RETAIN(Host_ServoRspCH_MasterCPU);

//#pragma CODE_SECTION(multi_slv_exchange_sync, "ramfuncs");
#pragma DATA_SECTION(lnk_sbuff,"MIII_LnkSbuffFiles");
#pragma RETAIN(lnk_sbuff);
#pragma DATA_SECTION(lnk_rbuff,"MIII_LnkRbuffFiles");
#pragma RETAIN(lnk_rbuff);
#pragma DATA_SECTION(MIIIReceiveError1,"MIII_ReceiveErrorFiles");
#pragma RETAIN(MIIIReceiveError1);

/* globals */
/* Buffer */
volatile Uint32 lnk_sbuff[ 11 + 1 ][ ( 60 >> 2 ) ]; /* Send Buffer */
volatile Uint32 lnk_rbuff[ 11 + 1 ][ ( 60 >> 2 ) ]; /* Receive Buffer */

typedef struct{
    Uint16 commstat_syntec;
    Uint32 asic_ests;
    Uint32 commdata_not_rcv;
    Uint32 comm_enabled_st;
} MIIIReceiveError;

/* Error Status */
MIIIReceiveError MIIIReceiveError1;







// Instance variables in CPU1 which will be referenced in CM
CPU1RefVariablesCM CPU1RefVarCM;
Uint32 Host_ServoRspCH_MasterCPU[2 * 56];