interrupt void scibRxFifoIsr(void)
{
    charUSARTB[contaComB] = ScibRegs.SCIRXBUF.all;

    if( (charUSARTB[contaComB++] == 0x04)) //EOF
    {
    	charUSARTB[contaComB]='\0';
    	contaComB=0;
    	receive_completeB=1;
    }
    else
    {
    	if(contaComB>7) // if it receives data bigger than 7 bytes it reset the counter
    	{
    		// Reseta o array
    		for(contaComB = 0; contaComB <=9; contaComB++)
			{
				charUSARTB[contaComB] = 0x0000;
			}
    		contaComB = 0;
    	}
    }

    ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;   	// Clear Overflow flag
    ScibRegs.SCIFFRX.bit.RXFFINTCLR=1;   	// Clear Interrupt flag

    PieCtrlRegs.PIEACK.all|=PIEACK_GROUP9;	// Issue PIE ack
}


void scib_config(void) // SCI-B    
{
	EALLOW;

 	ScibRegs.SCICCR.all = 0x0007;   // 1 stop bit,  No loopback
                                   // No parity,8 char bits,
                                   // async mode, idle-line protocol
 	ScibRegs.SCICTL1.all = 0x0003;  // enable TX, RX, internal SCICLK,
                                   // Disable RX ERR, SLEEP, TXWAKE

 	ScibRegs.SCICTL2.bit.TXINTENA =1;			// enable TXRDY interrupt
 	ScibRegs.SCICTL2.bit.RXBKINTENA =1;			// enable RXDY/BRKDT interrupt
    //
    // SCIA at 9600 baud
    // @LSPCLK = 50 MHz (200 MHz SYSCLK) HBAUD = 0x02 and LBAUD = 0x8B.
    // @LSPCLK = 30 MHz (120 MHz SYSCLK) HBAUD = 0x01 and LBAUD = 0x86.
    //
 										// 115200
 	ScibRegs.SCIHBAUD.all    =	0x0000;
 	ScibRegs.SCILBAUD.all    =	0x0035;// 6D;
 	ScibRegs.SCICCR.bit.LOOPBKENA = 0 ; // Disable loop back



 	ScibRegs.SCIFFTX.all	=	0xC001;
 	ScibRegs.SCIFFRX.all	=	0x0021;
 	ScibRegs.SCIFFCT.all	=	0x00;

 	ScibRegs.SCICTL1.all 	=	0x0023;  // Relinquish SCI from Reset
 	ScibRegs.SCIFFTX.bit.TXFIFORESET	=	1;
 	ScibRegs.SCIFFRX.bit.RXFIFORESET	=	1;

 	EDIS;
}