//########################################################################### // // FILE: F2806x_SysCtrl.c + SymmetricPWM-DevInit_F2806x.c // // TITLE: F2806x Device System Control Initialization & Support Functions. // // DESCRIPTION: // // Merged initialization of system resources. // //########################################################################### // $TI Release: F2806x C/C++ Header Files and Peripheral Examples V151 $ // $Release Date: February 2, 2016 $ // $Copyright: Copyright (C) 2011-2016 Texas Instruments Incorporated - // http://www.ti.com/ ALL RIGHTS RESERVED $ //########################################################################### #include "F2806x_Device.h" // Headerfile Include File #include "F2806x_Examples.h" // Examples Include File //#include "PeripheralHeaderIncludes.h" // Functions that will be run from RAM need to be assigned to // a different section. This section will then be mapped to a load and // run address using the linker cmd file. // // *IMPORTANT* // IF RUNNING FROM FLASH, PLEASE COPY OVER THE SECTION "ramfuncs" FROM FLASH // TO RAM PRIOR TO CALLING InitSysCtrl(). THIS PREVENTS THE MCU FROM THROWING // AN EXCEPTION WHEN A CALL TO DELAY_US() IS MADE. // #pragma CODE_SECTION(InitFlash, "ramfuncs"); //--------------------------------------------------------------------------- // InitSysCtrl: //--------------------------------------------------------------------------- // This function initializes the System Control registers to a known state. // - Disables the watchdog // - Set the PLLCR for proper SYSCLKOUT frequency // - Set the pre-scaler for the high and low frequency peripheral clocks // - Enable the clocks to the peripherals void InitSysCtrl(void) { // Disable the watchdog DisableDog(); // *IMPORTANT* // The Device_cal function, which copies the ADC & oscillator calibration values // from TI reserved OTP into the appropriate trim registers, occurs automatically // in the Boot ROM. If the boot ROM code is bypassed during the debug process, the // following function MUST be called for the ADC and oscillators to function according // to specification. The clocks to the ADC MUST be enabled before calling this // function. // See the device data manual and/or the ADC Reference // Manual for more information. EALLOW; SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; // Enable ADC peripheral clock (*Device_cal)(); SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 0; // Return ADC clock to original state EDIS; // Select Internal Oscillator 1 as Clock Source (default), and turn off all unused clocks to // conserve power. IntOsc1Sel(); // Initialize the PLL control: PLLCR and CLKINDIV // DSP28_PLLCR and DSP28_CLKINDIV are defined in F2806x_Examples.h InitPll(DSP28_PLLCR,DSP28_DIVSEL); // Initialize the peripheral clocks InitPeripheralClocks(); } //--------------------------------------------------------------------------- // Example: ServiceDog: //--------------------------------------------------------------------------- // This function resets the watchdog timer. // Enable this function for using ServiceDog in the application void ServiceDog(void) { EALLOW; SysCtrlRegs.WDKEY = 0x0055; SysCtrlRegs.WDKEY = 0x00AA; EDIS; } //--------------------------------------------------------------------------- // Example: DisableDog: //--------------------------------------------------------------------------- // This function disables the watchdog timer. void DisableDog(void) { EALLOW; SysCtrlRegs.WDCR= 0x0068; EDIS; } //--------------------------------------------------------------------------- // Example: InitPll: //--------------------------------------------------------------------------- // This function initializes the PLLCR register. void InitPll(Uint16 val, Uint16 divsel) { volatile Uint16 iVol; // Make sure the PLL is not running in limp mode if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 0) { EALLOW; // OSCCLKSRC1 failure detected. PLL running in limp mode. // Re-enable missing clock logic. SysCtrlRegs.PLLSTS.bit.MCLKCLR = 1; EDIS; // Replace this line with a call to an appropriate // SystemShutdown(); function. __asm(" ESTOP0"); // Uncomment for debugging purposes } // DIVSEL MUST be 0 before PLLCR can be changed from // 0x0000. It is set to 0 by an external reset XRSn // This puts us in 1/4 if (SysCtrlRegs.PLLSTS.bit.DIVSEL != 0) { EALLOW; SysCtrlRegs.PLLSTS.bit.DIVSEL = 0; EDIS; } // Change the PLLCR if (SysCtrlRegs.PLLCR.bit.DIV != val) { EALLOW; // Before setting PLLCR turn off missing clock detect logic SysCtrlRegs.PLLSTS.bit.MCLKOFF = 1; SysCtrlRegs.PLLCR.bit.DIV = val; EDIS; // Optional: Wait for PLL to lock. // During this time the CPU will switch to OSCCLK/2 until // the PLL is stable. Once the PLL is stable the CPU will // switch to the new PLL value. // // This time-to-lock is monitored by a PLL lock counter. // // Code is not required to sit and wait for the PLL to lock. // However, if the code does anything that is timing critical, // and requires the correct clock be locked, then it is best to // wait until this switching has completed. // Wait for the PLL lock bit to be set. // The watchdog should be disabled before this loop, or fed within // the loop via ServiceDog(). // Uncomment to disable the watchdog DisableDog(); while(SysCtrlRegs.PLLSTS.bit.PLLLOCKS != 1) { // Uncomment to service the watchdog // ServiceDog(); } EALLOW; SysCtrlRegs.PLLSTS.bit.MCLKOFF = 0; EDIS; } // If switching to 1/2 if((divsel == 1)||(divsel == 2)) { EALLOW; SysCtrlRegs.PLLSTS.bit.DIVSEL = divsel; EDIS; } // If switching to 1/1 // * First go to 1/2 and let the power settle // The time required will depend on the system, this is only an example // * Then switch to 1/1 if(divsel == 3) { EALLOW; SysCtrlRegs.PLLSTS.bit.DIVSEL = 2; DELAY_US(50L); SysCtrlRegs.PLLSTS.bit.DIVSEL = 3; EDIS; } } //--------------------------------------------------------------------------- // Example: InitPll2: //--------------------------------------------------------------------------- // This function initializes the PLL2 registers. void InitPll2(Uint16 clksrc, Uint16 pllmult, Uint16 clkdiv) { EALLOW; // Check if SYSCLK2DIV2DIS is in /2 mode if(DevEmuRegs.DEVICECNF.bit.SYSCLK2DIV2DIS != 0) { DevEmuRegs.DEVICECNF.bit.SYSCLK2DIV2DIS = 0; } // Enable PLL2 SysCtrlRegs.PLL2CTL.bit.PLL2EN = 1; // Select clock source for PLL2 SysCtrlRegs.PLL2CTL.bit.PLL2CLKSRCSEL = clksrc; // Set PLL2 Multiplier SysCtrlRegs.PLL2MULT.bit.PLL2MULT = pllmult; // Wait for PLL to lock. // Uncomment to disable the watchdog DisableDog(); while(SysCtrlRegs.PLL2STS.bit.PLL2LOCKS!= 1) { // Uncomment to service the watchdog // ServiceDog(); } // Set System Clock 2 divider DevEmuRegs.DEVICECNF.bit.SYSCLK2DIV2DIS = clkdiv; EDIS; } //-------------------------------------------------------------------------- // Example: InitPeripheralClocks: //--------------------------------------------------------------------------- // This function initializes the clocks to the peripheral modules. // First the high and low clock prescalers are set // Second the clocks are enabled to each peripheral. // To reduce power, leave clocks to unused peripherals disabled // // Note: If a peripherals clock is not enabled then you cannot // read or write to the registers for that peripheral void InitPeripheralClocks(void) { EALLOW; // LOSPCP prescale register settings, normally it will be set to default values // GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3; // GPIO18 = XCLKOUT SysCtrlRegs.LOSPCP.all = 0x0002; // XCLKOUT to SYSCLKOUT ratio. By default XCLKOUT = 1/4 SYSCLKOUT SysCtrlRegs.XCLK.bit.XCLKOUTDIV=2; // Peripheral clock enables set for the selected peripherals. // If you are not using a peripheral leave the clock off // to save on power. // // Note: not all peripherals are available on all F2806x derivates. // Refer to the datasheet for your particular device. // // This function is not written to be an example of efficient code. SysCtrlRegs.PCLKCR1.bit.EPWM1ENCLK = 1; // ePWM1 SysCtrlRegs.PCLKCR1.bit.EPWM2ENCLK = 1; // ePWM2 SysCtrlRegs.PCLKCR1.bit.EPWM3ENCLK = 1; // ePWM3 SysCtrlRegs.PCLKCR1.bit.EPWM4ENCLK = 1; // ePWM4 SysCtrlRegs.PCLKCR1.bit.EPWM5ENCLK = 1; // ePWM5 SysCtrlRegs.PCLKCR1.bit.EPWM6ENCLK = 1; // ePWM6 SysCtrlRegs.PCLKCR1.bit.EPWM7ENCLK = 1; // ePWM7 SysCtrlRegs.PCLKCR1.bit.EPWM8ENCLK = 1; // ePWM8 SysCtrlRegs.PCLKCR0.bit.HRPWMENCLK = 1; // HRPWM SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Enable TBCLK within the ePWM SysCtrlRegs.PCLKCR1.bit.EQEP1ENCLK = 1; // eQEP1 SysCtrlRegs.PCLKCR1.bit.EQEP2ENCLK = 1; // eQEP2 SysCtrlRegs.PCLKCR1.bit.ECAP1ENCLK = 1; // eCAP1 SysCtrlRegs.PCLKCR1.bit.ECAP2ENCLK = 1; // eCAP2 SysCtrlRegs.PCLKCR1.bit.ECAP3ENCLK = 1; // eCAP3 SysCtrlRegs.PCLKCR2.bit.HRCAP1ENCLK = 1; // HRCAP1 SysCtrlRegs.PCLKCR2.bit.HRCAP2ENCLK = 1; // HRCAP2 SysCtrlRegs.PCLKCR2.bit.HRCAP3ENCLK = 1; // HRCAP3 SysCtrlRegs.PCLKCR2.bit.HRCAP4ENCLK = 1; // HRCAP4 SysCtrlRegs.PCLKCR0.bit.ADCENCLK = 1; // ADC SysCtrlRegs.PCLKCR3.bit.COMP1ENCLK = 1; // COMP1 SysCtrlRegs.PCLKCR3.bit.COMP2ENCLK = 1; // COMP2 SysCtrlRegs.PCLKCR3.bit.COMP3ENCLK = 1; // COMP3 SysCtrlRegs.PCLKCR3.bit.CPUTIMER0ENCLK = 1; // CPU Timer 0 SysCtrlRegs.PCLKCR3.bit.CPUTIMER1ENCLK = 1; // CPU Timer 1 SysCtrlRegs.PCLKCR3.bit.CPUTIMER2ENCLK = 1; // CPU Timer 2 SysCtrlRegs.PCLKCR3.bit.DMAENCLK = 1; // DMA SysCtrlRegs.PCLKCR3.bit.CLA1ENCLK = 1; // CLA1 SysCtrlRegs.PCLKCR3.bit.USB0ENCLK = 1; // USB0 SysCtrlRegs.PCLKCR0.bit.I2CAENCLK = 1; // I2C-A SysCtrlRegs.PCLKCR0.bit.SPIAENCLK = 1; // SPI-A SysCtrlRegs.PCLKCR0.bit.SPIBENCLK = 1; // SPI-B SysCtrlRegs.PCLKCR0.bit.SCIAENCLK = 1; // SCI-A SysCtrlRegs.PCLKCR0.bit.SCIBENCLK = 1; //SCI-B SysCtrlRegs.PCLKCR0.bit.MCBSPAENCLK = 1; // McBSP-A SysCtrlRegs.PCLKCR0.bit.ECANAENCLK=1; // eCAN-A SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1; // Enable TBCLK within the ePWM //-------------------------------------------------------------------------------------- // GPIO (GENERAL PURPOSE I/O) CONFIG //-------------------------------------------------------------------------------------- //----------------------- // QUICK NOTES on USAGE: //----------------------- // If GpioCtrlRegs.GP?MUX?bit.GPIO?= 1, 2 or 3 (i.e. Non GPIO func), then leave // rest of lines commented // If GpioCtrlRegs.GP?MUX?bit.GPIO?= 0 (i.e. GPIO func), then: // 1) uncomment GpioCtrlRegs.GP?DIR.bit.GPIO? = ? and choose pin to be IN or OUT // 2) If IN, can leave next to lines commented // 3) If OUT, uncomment line with ..GPACLEAR.. to force pin LOW or // uncomment line with ..GPASET.. to force pin HIGH or //-------------------------------------------------------------------------------------- //-------------------------------------------------------------------------------------- // GPIO-00 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1; // 0=GPIO, 1=EPWM1A, 2=Resv, 3=Resv GpioCtrlRegs.GPADIR.bit.GPIO0 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO0 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO0 = 1; // uncomment if --> Set High initially // GpioCtrlRegs.GPAPUD.bit.GPIO0 = 1; // Disable pull-up on GPIO0 (EPWM1A) //-------------------------------------------------------------------------------------- // GPIO-01 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1; // 0=GPIO, 1=EPWM1B, 2=EMU (0), 3=COMP1OUT GpioCtrlRegs.GPADIR.bit.GPIO1 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO1 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO1 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-02 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1; // 0=GPIO, 1=EPWM2A, 2=Resv, 3=Resv GpioCtrlRegs.GPADIR.bit.GPIO2 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO2 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO2 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-03 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1; // 0=GPIO, 1=EPWM2B, 2=SPISOMIA, 3=COMP2OUT GpioCtrlRegs.GPADIR.bit.GPIO3 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO3 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO3 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-04 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 0; // 0=GPIO, 1=EPWM3A, 2=Resv, 3=Resv GpioCtrlRegs.GPADIR.bit.GPIO4 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO4 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO4 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-05 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 0; // 0=GPIO, 1=EPWM3B, 2=SPISIMOA, 3=ECAP1 GpioCtrlRegs.GPADIR.bit.GPIO5 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO5 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO5 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-06 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0; // 0=GPIO, 1=EPWM4A, 2=EPWMSYNCI, 3=EPWMSYNCO GpioCtrlRegs.GPADIR.bit.GPIO6 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO6 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO6 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-07 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 0; // 0=GPIO, 1=EPWM4B, 2=SCIRXDA, 3=ECAP2 GpioCtrlRegs.GPADIR.bit.GPIO7 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO7 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO7 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-12 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 0; // 0=GPIO, 1=TZ1n, 2=SCITXDA, 3=SPISIMOB GpioCtrlRegs.GPADIR.bit.GPIO12 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO12 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO12 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-16 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 0; // 0=GPIO, 1=SPISIMOA, 2=Resv CAN-B, 3=TZ2n GpioCtrlRegs.GPADIR.bit.GPIO16 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO16 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO16 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-17 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 0; // 0=GPIO, 1=SPISOMIA, 2=Resv CAN-B, 3=TZ3n GpioCtrlRegs.GPADIR.bit.GPIO17 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO17 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO17 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-18 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 0; // 0=GPIO, 1=SPICLKA, 2=SCITXDB, 3=XCLKOUT GpioCtrlRegs.GPADIR.bit.GPIO18 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO18 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO18 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-19 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; // 0=GPIO, 1=SPISTEA, 2=SCIRXDB, 3=ECAP1 GpioCtrlRegs.GPADIR.bit.GPIO19 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO19 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO19 = 1; // uncomment if --> Set High initially // GpioCtrlRegs.GPAPUD.bit.GPIO19 = 1; //-------------------------------------------------------------------------------------- // GPIO-28 - PIN FUNCTION = SCI-RX // GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 2; // 0=GPIO, 1=SCIRX-A, 2=I2CSDA-A, 3=TZ2 // GpioCtrlRegs.GPADIR.bit.GPIO28 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO28 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO28 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-29 - PIN FUNCTION = SCI-TX // GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 2; // 0=GPIO, 1=SCITXD-A, 2=I2CSCL-A, 3=TZ3 // GpioCtrlRegs.GPADIR.bit.GPIO29 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO29 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO29 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-30 - PIN FUNCTION = --Spare-- GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 0; // 0=GPIO, 1=CANRX-A, 2=EQEP2I, 3=EPWM7A GpioCtrlRegs.GPADIR.bit.GPIO30 = 0; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO30 = 1; // uncomment if --> Set Low initially // GpioDataRegs.GPASET.bit.GPIO30 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- // GPIO-31 - PIN FUNCTION = LED2 on controlCARD GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0; // 0=GPIO, 1=CANTX-A, 2=EQEP2S, 3=EPWM8A GpioCtrlRegs.GPADIR.bit.GPIO31 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPACLEAR.bit.GPIO31 = 1; // uncomment if --> Set Low initially GpioDataRegs.GPASET.bit.GPIO31 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- //-------------------------------------------------------------------------------------- // GPIO-34 - PIN FUNCTION = LED for F2806x USB dongle GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0; // 0=GPIO, 1=COMP2OUT, 2=EMU1, 3=Resv GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; // 1=OUTput, 0=INput // GpioDataRegs.GPBCLEAR.bit.GPIO34 = 1; // uncomment if --> Set Low initially GpioDataRegs.GPBSET.bit.GPIO34 = 1; // uncomment if --> Set High initially //-------------------------------------------------------------------------------------- EDIS; } //--------------------------------------------------------------------------- // Example: CsmUnlock: //--------------------------------------------------------------------------- // This function unlocks the CSM. User must replace 0xFFFF's with current // password for the DSP. Returns 1 if unlock is successful. #define STATUS_FAIL 0 #define STATUS_SUCCESS 1 Uint16 CsmUnlock() { volatile Uint16 temp; // Load the key registers with the current password. The 0xFFFF's are dummy // passwords. User should replace them with the correct password for the DSP. EALLOW; CsmRegs.KEY0 = 0xFFFF; CsmRegs.KEY1 = 0xFFFF; CsmRegs.KEY2 = 0xFFFF; CsmRegs.KEY3 = 0xFFFF; CsmRegs.KEY4 = 0xFFFF; CsmRegs.KEY5 = 0xFFFF; CsmRegs.KEY6 = 0xFFFF; CsmRegs.KEY7 = 0xFFFF; EDIS; // Perform a dummy read of the password locations // if they match the key values, the CSM will unlock temp = CsmPwl.PSWD0; temp = CsmPwl.PSWD1; temp = CsmPwl.PSWD2; temp = CsmPwl.PSWD3; temp = CsmPwl.PSWD4; temp = CsmPwl.PSWD5; temp = CsmPwl.PSWD6; temp = CsmPwl.PSWD7; // If the CSM unlocked, return succes, otherwise return // failure. if (CsmRegs.CSMSCR.bit.SECURE == 0) return STATUS_SUCCESS; else return STATUS_FAIL; } //--------------------------------------------------------------------------- // Example: IntOsc1Sel: //--------------------------------------------------------------------------- // This function switches to Internal Oscillator 1 and turns off all other clock // sources to minimize power consumption void IntOsc1Sel (void) { EALLOW; SysCtrlRegs.CLKCTL.bit.INTOSC1OFF = 0; SysCtrlRegs.CLKCTL.bit.OSCCLKSRCSEL=0; // Clk Src = INTOSC1 SysCtrlRegs.CLKCTL.bit.XCLKINOFF=1; // Turn off XCLKIN SysCtrlRegs.CLKCTL.bit.XTALOSCOFF=1; // Turn off XTALOSC SysCtrlRegs.CLKCTL.bit.INTOSC2OFF=1; // Turn off INTOSC2 EDIS; } //--------------------------------------------------------------------------- // Example: IntOsc2Sel: //--------------------------------------------------------------------------- // This function switches to Internal oscillator 2 from External Oscillator // and turns off all other clock sources to minimize power consumption // NOTE: If there is no external clock connection, when switching from // INTOSC1 to INTOSC2, EXTOSC and XLCKIN must be turned OFF prior // to switching to internal oscillator 1 void IntOsc2Sel (void) { EALLOW; SysCtrlRegs.CLKCTL.bit.INTOSC2OFF = 0; // Turn on INTOSC2 SysCtrlRegs.CLKCTL.bit.OSCCLKSRC2SEL = 1; // Switch to INTOSC2 SysCtrlRegs.CLKCTL.bit.XCLKINOFF = 1; // Turn off XCLKIN SysCtrlRegs.CLKCTL.bit.XTALOSCOFF = 1; // Turn off XTALOSC SysCtrlRegs.CLKCTL.bit.OSCCLKSRCSEL = 1; // Switch to Internal Oscillator 2 SysCtrlRegs.CLKCTL.bit.WDCLKSRCSEL = 0; // Clock Watchdog off of INTOSC1 always SysCtrlRegs.CLKCTL.bit.INTOSC1OFF = 0; // Leave INTOSC1 on EDIS; } //--------------------------------------------------------------------------- // Example: XtalOscSel: //--------------------------------------------------------------------------- // This function switches to External CRYSTAL oscillator and turns off all other clock // sources to minimize power consumption. This option may not be available on all // device packages void XtalOscSel (void) { EALLOW; SysCtrlRegs.CLKCTL.bit.XTALOSCOFF = 0; // Turn on XTALOSC DELAY_US(1000); // Wait for 1ms while XTAL starts up SysCtrlRegs.CLKCTL.bit.XCLKINOFF = 1; // Turn off XCLKIN SysCtrlRegs.CLKCTL.bit.OSCCLKSRC2SEL = 0; // Switch to external clock SysCtrlRegs.CLKCTL.bit.OSCCLKSRCSEL = 1; // Switch from INTOSC1 to INTOSC2/ext clk SysCtrlRegs.CLKCTL.bit.WDCLKSRCSEL = 0; // Clock Watchdog off of INTOSC1 always SysCtrlRegs.CLKCTL.bit.INTOSC2OFF = 1; // Turn off INTOSC2 SysCtrlRegs.CLKCTL.bit.INTOSC1OFF = 0; // Leave INTOSC1 on EDIS; } //--------------------------------------------------------------------------- // Example: ExtOscSel: //--------------------------------------------------------------------------- // This function switches to External oscillator and turns off all other clock // sources to minimize power consumption. void ExtOscSel (void) { EALLOW; SysCtrlRegs.XCLK.bit.XCLKINSEL = 1; // 1-GPIO19 = XCLKIN, 0-GPIO38 = XCLKIN SysCtrlRegs.CLKCTL.bit.XTALOSCOFF = 1; // Turn on XTALOSC SysCtrlRegs.CLKCTL.bit.XCLKINOFF = 0; // Turn on XCLKIN SysCtrlRegs.CLKCTL.bit.OSCCLKSRC2SEL = 0; // Switch to external clock SysCtrlRegs.CLKCTL.bit.OSCCLKSRCSEL = 1; // Switch from INTOSC1 to INTOSC2/ext clk SysCtrlRegs.CLKCTL.bit.WDCLKSRCSEL = 0; // Clock Watchdog off of INTOSC1 always SysCtrlRegs.CLKCTL.bit.INTOSC2OFF = 1; // Turn off INTOSC2 SysCtrlRegs.CLKCTL.bit.INTOSC1OFF = 0; // Leave INTOSC1 on EDIS; } void InitFlash(void) { EALLOW; //Enable Flash Pipeline mode to improve performance //of code executed from Flash. FlashRegs.FOPT.bit.ENPIPE = 1; // CAUTION //Minimum waitstates required for the flash operating //at a given CPU rate must be characterized by TI. //Refer to the datasheet for the latest information. //Set the Paged Waitstate for the Flash FlashRegs.FBANKWAIT.bit.PAGEWAIT = 3; //Set the Random Waitstate for the Flash FlashRegs.FBANKWAIT.bit.RANDWAIT = 3; //Set the Waitstate for the OTP FlashRegs.FOTPWAIT.bit.OTPWAIT = 5; // CAUTION //ONLY THE DEFAULT VALUE FOR THESE 2 REGISTERS SHOULD BE USED FlashRegs.FSTDBYWAIT.bit.STDBYWAIT = 0x01FF; FlashRegs.FACTIVEWAIT.bit.ACTIVEWAIT = 0x01FF; EDIS; //Force a pipeline flush to ensure that the write to //the last register configured occurs before returning. asm(" RPT #7 || NOP"); } // This function will copy the specified memory contents from // one location to another. // // Uint16 *SourceAddr Pointer to the first word to be moved // SourceAddr < SourceEndAddr // Uint16* SourceEndAddr Pointer to the last word to be moved // Uint16* DestAddr Pointer to the first destination word // // No checks are made for invalid memory locations or that the // end address is > then the first start address. void MemCopy(Uint16 *SourceAddr, Uint16* SourceEndAddr, Uint16* DestAddr) { while(SourceAddr < SourceEndAddr) { *DestAddr++ = *SourceAddr++; } return; } //=========================================================================== // End of file. //===========================================================================