MEMORY
{
   BEGIN            : origin = 0x00080000, length = 0x00000002
   BOOT_RSVD        : origin = 0x00000002, length = 0x00000126

   RAMM0            : origin = 0x00000128, length = 0x000002D8
   RAMM1            : origin = 0x00000400, length = 0x000003F8
   // RAMM1_RSVD       : origin = 0x000007F8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */

   RAMLS0_1           : origin = 0x00008000, length = 0x00003FF8
   // RAMLS1_RSVD      : origin = 0x0000BFF8, length = 0x00000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
   RESET            : origin = 0x003FFFC0, length = 0x00000002

   /* Flash sectors */
   FLASH_BANK0_SEC_0_31     : origin = 0x080002, length = 0x7FFE  /* on-chip Flash */

   FLASH_BANK0_SEC_32_63   : origin = 0x088000, length = 0x8000  /* on-chip Flash */

   FLASH_BANK0_SEC_64_127   : origin = 0x090000, length = 0x1FF0  /* for program code*/
   // FLASH_BANK0_SEC_127_RSVD : origin = 0x09FFF0, length = 0x0010  /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
}

SECTIONS
{
   codestart        : > BEGIN

   .text            : >>FLASH_BANK0_SEC_64_127, ALIGN(8)

   .cinit           : > FLASH_BANK0_SEC_0_31, ALIGN(8)
   .switch          : > FLASH_BANK0_SEC_0_31, ALIGN(8)

   .reset           : > RESET,  TYPE = DSECT /* not used, */

   .stack           : > RAMM1

#if defined(__TI_EABI__)
   .bss             : > RAMLS0_1
   .bss:output      : > RAMLS0_1
   .init_array      : >> FLASH_BANK0_SEC_0_31, ALIGN(8)
   .const           : >> FLASH_BANK0_SEC_32_63, ALIGN(8)
   .data            : > RAMLS0_1
   .sysmem          : > RAMLS0_1
  .bss:cio          : > RAMLS0_1
#else
   .pinit           : >> FLASH_BANK0_SEC_0_31, ALIGN(8)
   .ebss            : > RAMLS0_1
   .econst          : >> FLASH_BANK0_SEC_32_63, ALIGN(8)
   .esysmem         : > RAMLS0_1
   .cio             : > RAMLS0_1
#endif

#if defined(__TI_EABI__)
   .TI.ramfunc      : LOAD = FLASH_BANK0_SEC_0_31,
                      RUN = RAMLS0_1,
                      LOAD_START(RamfuncsLoadStart),
                      LOAD_SIZE(RamfuncsLoadSize),
                      LOAD_END(RamfuncsLoadEnd),
                      RUN_START(RamfuncsRunStart),
                      RUN_SIZE(RamfuncsRunSize),
                      RUN_END(RamfuncsRunEnd),
                      ALIGN(8)
#else
   .TI.ramfunc      : LOAD = FLASH_BANK0_SEC_0_31,
                      RUN = RAMLS0_1,
                      LOAD_START(_RamfuncsLoadStart),
                      LOAD_SIZE(_RamfuncsLoadSize),
                      LOAD_END(_RamfuncsLoadEnd),
                      RUN_START(_RamfuncsRunStart),
                      RUN_SIZE(_RamfuncsRunSize),
                      RUN_END(_RamfuncsRunEnd),
                      ALIGN(8)
#endif

    /*  Allocate IQ math areas: */
   IQmath           : > FLASH_BANK0_SEC_32_63, ALIGN(8)
   IQmathTables     : > FLASH_BANK0_SEC_32_63, ALIGN(8)
}
