//###########################################################################
//
// FILE:    hw_gcrc.h
//
// TITLE:   Definitions for the GCRC registers.
//
//###########################################################################
// $TI Release: F2838x Support Library v3.02.00.00 $
// $Release Date: Tue May 26 17:21:56 IST 2020 $
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//###########################################################################

#ifndef HW_GCRC_H
#define HW_GCRC_H

//*****************************************************************************
//
// The following are defines for the GCRC register offsets
//
//*****************************************************************************
#define GCRC_O_CRCCTRL            0x0U         // CRC Control Register
#define GCRC_O_CRCPOLY            0x4U         // CRC Polynomial Register
#define GCRC_O_CRCDATAMASK        0x8U         // CRC Data Mask Register
#define GCRC_O_CRCDATAIN          0xCU         // CRC Data Input Register
#define GCRC_O_CRCDATAOUT         0x10U        // CRC Data Output Register
#define GCRC_O_CRCDATATRANS       0x14U        // CRC Transformed Data Register

//*****************************************************************************
//
// The following are defines for the bit fields in the CRCCTRL register
//
//*****************************************************************************
#define GCRC_CRCCTRL_POLYSIZE_S   0U
#define GCRC_CRCCTRL_POLYSIZE_M   0x3FU        // CRC polynomial order
#define GCRC_CRCCTRL_ENDIANNESS   0x40U        // Defines the endianness of the
                                               // data stream.
#define GCRC_CRCCTRL_BITREVERSE   0x80U        // Enables the DATAIN bus to the
                                               // CRC engine to be bit
                                               // reversed.
#define GCRC_CRCCTRL_DATATYPE_S   8U
#define GCRC_CRCCTRL_DATATYPE_M   0x300U       // Defines the DATATYPE of the
                                               // element of the data array.

//*****************************************************************************
//
// The following are defines for the bit fields in the CRCDATAMASK register
//
//*****************************************************************************
#define GCRC_CRCDATAMASK_DATAMASK_S  0U
#define GCRC_CRCDATAMASK_DATAMASK_M  0x1FU        // Number of bits to be masked
#endif
