//###########################################################################
//
// FILE:   cpu_Timers_cpu01.c
//
// TITLE:  Cpu Timers Example for F2837xD.
//
//! \addtogroup cpu01_example_list
//! <h1> CPU Timers </h1>
//!
//! This example configures CPU Timer0, 1, and 2 and increments
//! a counter each time the timer asserts an interrupt.
//!
//! \b Watch \b Variables \n
//! - CpuTimer0.InterruptCount
//! - CpuTimer1.InterruptCount
//! - CpuTimer2.InterruptCount
//!
//###########################################################################

//
// Included Files
//
#include "F28x_Project.h"
#include "math.h"

#define TB_PRD 3125
#define pi 3.14159
#define Ts 0.00005
#define sample_size 500
#define Gain 2.4420e-04

float w = 2*50*3.14159, x=0, x2=0, x3=0, A=0, B=0, C=0;
float m_a = 1, m_f = 0.8, vf = 1;
float sam =0;
int data_type = 1, i = 1;
double data_log_1[sample_size];

float B1 = 0, B2 = 0, B3 = 0, B4 = 0, B5 = 0, B6 = 0, B7 = 0, B8 = 0, B9 = 0, B10 = 0, B11 = 0, B12 = 0;
float G1 = 1, G2 = 1, G3 = 1, G4 = 1, G5 = 1, G6 = 1, G7 = 1, G8 = 1, G9 = 1, G10 = 1, G11 = 1, G12 = 1;

Uint16 V_sen[16];      //Total sensing
 int ADC = 0;

 Uint16 sensorSample;
 int16 sensorTemp;



//
// Function Prototypes
//
void Gpio_select(void);
void InitEPwm1Example(void);
void ConfigureEPWM(void);
void ConfigureADC(void);
void SetupADCEpwm(Uint16 channel);
// void SetupPPBOffset(int16 aOffset, int16 bOffset);
interrupt void adca1_isr(void);
interrupt void adcb1_isr(void);
__interrupt void cpu_timer0_isr(void);

void main(void)
{
//
// Step 1. Initialize System Control:

     InitSysCtrl();

// Step 2. Initialize GPIO:
   Gpio_select();

//
// Step 2.1. Initialize the Device Peripherals:
//
    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =0;
    EDIS;

    InitEPwm1Example();

    EALLOW;
    CpuSysRegs.PCLKCR0.bit.TBCLKSYNC =1;
    EDIS;

//

// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts

    DINT;

// Initialize the PIE control registers to their default state.

    InitPieCtrl();

// Disable CPU interrupts and clear all CPU interrupt flags:

    IER = 0x0000;
    IFR = 0x0000;

// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).

    InitPieVectTable();


// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.

    EALLOW;  // This is needed to write to EALLOW protected registers
    PieVectTable.TIMER0_INT = &cpu_timer0_isr;
    PieVectTable.ADCA1_INT = &adca1_isr; //function for ADCA interrupt 1
    PieVectTable.ADCB1_INT = &adcb1_isr; //function for ADCB interrupt 1
    EDIS;    // This is needed to disable write to EALLOW protected registers


    // Enable TINT0 in the PIE: Group 1 interrupt 7, adc_a1 and adc_b1
         PieCtrlRegs.PIEIER1.bit.INTx1 = 1;
         PieCtrlRegs.PIEIER1.bit.INTx2 = 1;
         PieCtrlRegs.PIEIER1.bit.INTx7 = 1;


    //
    // Configure the ADC and power it up
    //
        ConfigureADC();

    //
    // Configure the ePWM
    //
        ConfigureEPWM();

    //
    // Setup the ADC for ePWM triggered conversions on channel 0
    //
        SetupADCEpwm(0);

    //
    //Setup PPB offset correction
    //conversion on channel A will subtract 100
    //conversion on channel B will add 100
    //
 //      SetupPPBOffset(100, -1000);

// Step 4. Initialize the Device Peripheral.

    InitCpuTimers();   // For this example, only initialize the Cpu Timers

// Configure CPU-Timer 0 to interrupt every second:
// 200MHz CPU Freq, 1 second Period (in uSeconds)

    ConfigCpuTimer(&CpuTimer0, 200, 50);

// To ensure precise timing, use write-only instructions to write to the
// entire register. Therefore, if any of the configuration bits are changed in
// ConfigCpuTimer and InitCpuTimers (in F2837xD_cputimervars.h), the below
// settings must also be updated.

    CpuTimer0Regs.TCR.all = 0x4000;

// Step 5. User specific code, enable interrupts:

// Enable CPU int1 which is connected to CPU-Timer 0

    IER |= M_INT1;



// Enable global Interrupts and higher priority real-time debug events:

    EINT;  // Enable Global interrupt INTM
    ERTM;  // Enable Global realtime interrupt DBGM


// Step 6. IDLE loop. Just sit and loop forever (optional):
    while(1)
    {

    }
}


//
// ConfigureEPWM - Configure EPWM SOC and compare values
//
void ConfigureEPWM(void)
{
    EALLOW;
    EPwm2Regs.TBCTL.all = 0xC030;   // Configure timer control register
    /*
     bit 15-14     11:     FREE/SOFT, 11 = ignore emulation suspend
     bit 13        0:      PHSDIR, 0 = count down after sync event
     bit 12-10     000:    CLKDIV, 000 => TBCLK = HSPCLK/1
     bit 9-7       000:    HSPCLKDIV, 000 => HSPCLK = SYSCLKOUT/1
     bit 6         0:      SWFSYNC, 0 = no software sync produced
     bit 5-4       11:     SYNCOSEL, 11 = sync-out disabled
     bit 3         0:      PRDLD, 0 = reload PRD on counter=0
     bit 2         0:      PHSEN, 0 = phase control disabled
     bit 1-0       00:     CTRMODE, 00 = count up mode
    */

    EPwm2Regs.TBPRD = 2999; // TPPRD +1  =  TPWM / (HSPCLKDIV * CLKDIV * TSYSCLK)
                            //           =  20 µs / 6.667 ns

    EPwm2Regs.ETPS.all = 0x0100;            // Configure ADC start by ePWM2
    /*
     bit 15-14     00:     EPWMxSOCB, read-only
     bit 13-12     00:     SOCBPRD, don't care
     bit 11-10     00:     EPWMxSOCA, read-only
     bit 9-8       01:     SOCAPRD, 01 = generate SOCA on first event
     bit 7-4       0000:   reserved
     bit 3-2       00:     INTCNT, don't care
     bit 1-0       00:     INTPRD, don't care
    */

    EPwm2Regs.ETSEL.all = 0x0A00;           // Enable SOCA to ADC
    /*
     bit 15        0:      SOCBEN, 0 = disable SOCB
     bit 14-12     000:    SOCBSEL, don't care
     bit 11        1:      SOCAEN, 1 = enable SOCA
     bit 10-8      010:    SOCASEL, 010 = SOCA on PRD event
     bit 7-4       0000:   reserved
     bit 3         0:      INTEN, 0 = disable interrupt
     bit 2-0       000:    INTSEL, don't care
    */
    EDIS;
}


//
// adca1_isr - Read ADC Buffer in ISR
//
interrupt void adca1_isr(void)
{
    V_sen[1]  = AdcaResultRegs.ADCRESULT0 >> 4 ;
    V_sen[2]  = AdcaResultRegs.ADCRESULT1 >> 4 ;
    V_sen[3]  = AdcaResultRegs.ADCRESULT2 >> 4 ;
    V_sen[4]  = AdcaResultRegs.ADCRESULT3 >> 4 ;
    V_sen[5]  = AdcaResultRegs.ADCRESULT4 >> 4 ;
    V_sen[6]  = AdcaResultRegs.ADCRESULT5 >> 4 ;


    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag


    //
    // Check if overflow has occurred ADCa
    //
    if(1 == AdcaRegs.ADCINTOVF.bit.ADCINT1)
    {
        AdcaRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
        AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
    }


    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

}

//
// adcb1_isr - Read ADCB Buffer in ISR
//
interrupt void adcb1_isr(void)
{

    GpioDataRegs.GPBSET.bit.GPIO35 = 1;


    V_sen[7]  = AdcbResultRegs.ADCRESULT0 >> 4 ;
    V_sen[8]  = AdcbResultRegs.ADCRESULT1 >> 4 ;
    V_sen[9]  = AdcbResultRegs.ADCRESULT2 >> 4 ;
    V_sen[10] = AdcbResultRegs.ADCRESULT3 >> 4 ;
    V_sen[11] = AdcbResultRegs.ADCRESULT4 >> 4 ;
    V_sen[12] = AdcbResultRegs.ADCRESULT5 >> 4 ;


   GpioDataRegs.GPBCLEAR.bit.GPIO35 = 1;




    AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag

    //
    // Check if overflow has occurred ADCb
    //
    if(1 == AdcbRegs.ADCINTOVF.bit.ADCINT1)
    {
        AdcbRegs.ADCINTOVFCLR.bit.ADCINT1 = 1; //clear INT1 overflow flag
        AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //clear INT1 flag
    }


    PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;

}

//
// ConfigureADC
//
void ConfigureADC(void)
{
    EALLOW;

    //
    //write configurations
    //
    AdcaRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
    AdcbRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
    AdccRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4
    AdcdRegs.ADCCTL2.bit.PRESCALE = 6; //set ADCCLK divider to /4

    AdcSetMode(ADC_ADCA, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
    AdcSetMode(ADC_ADCB, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
    AdcSetMode(ADC_ADCC, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);
    AdcSetMode(ADC_ADCD, ADC_RESOLUTION_12BIT, ADC_SIGNALMODE_SINGLE);


    //
    //Set pulse positions to late
    //
    AdcaRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdcbRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdccRegs.ADCCTL1.bit.INTPULSEPOS = 1;
    AdcdRegs.ADCCTL1.bit.INTPULSEPOS = 1;



    //
    //power up the ADCs
    //
    AdcaRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    AdcbRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    AdccRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    AdcdRegs.ADCCTL1.bit.ADCPWDNZ = 1;
    //
    //delay for 1ms to allow ADC time to power up
    //
    DELAY_US(1000);

    EDIS;
}

//
// SetupADCEpwm - Setup ADC EPWM acquisition window
//
void SetupADCEpwm(Uint16 channel)
{
    Uint16 acqps;

    // HERE IT IS ONLY WRITTEN FOR ADC A ONLY, Pleae do write for ADC B Also.............
    // Determine minimum acquisition window (in SYSCLKS) based on resolution
    //
    if(ADC_RESOLUTION_12BIT == AdcaRegs.ADCCTL2.bit.RESOLUTION)
    {
        acqps = 14; //75ns
    }
    else //resolution is 16-bit
    {
        acqps = 63; //320ns
    }

    //
    //Select the channels to convert and end of conversion flag
    //
    EALLOW;

                      //----------ADC_A Pins------------//
    AdcaRegs.ADCSOC0CTL.bit.CHSEL = 0;  //SOC0 will convert pin A0
    AdcaRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcaRegs.ADCSOC0CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcaRegs.ADCSOC1CTL.bit.CHSEL = 1;  //SOC1 will convert pin A1
    AdcaRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcaRegs.ADCSOC1CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcaRegs.ADCSOC2CTL.bit.CHSEL = 2;  //SOC2 will convert pin A2
    AdcaRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcaRegs.ADCSOC2CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcaRegs.ADCSOC3CTL.bit.CHSEL = 3;  //SOC3 will convert pin A3
    AdcaRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcaRegs.ADCSOC3CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcaRegs.ADCSOC4CTL.bit.CHSEL = 4;  //SOC4 will convert pin A4
    AdcaRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcaRegs.ADCSOC4CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcaRegs.ADCSOC5CTL.bit.CHSEL = 5;  //SOC5 will convert pin A5
    AdcaRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcaRegs.ADCSOC5CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C


    // Should i comment out this part ??
    AdcaRegs.ADCINTSEL1N2.bit.INT1E  = 1;  //enable INT1 flag
    AdcaRegs.ADCINTSEL1N2.bit.INT1CONT = 0;
    AdcaRegs.ADCINTSEL1N2.bit.INT1SEL = 5; //end of A_SOC5 will set INT1 flag
    AdcaRegs.ADCINTFLGCLR.bit.ADCINT1 = 1; //make sure INT1 flag is cleared


                      //----------ADC_B Pins------------//
    AdcbRegs.ADCSOC0CTL.bit.CHSEL = 0;  //SOC0 will convert pin B0
    AdcbRegs.ADCSOC0CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC0CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcbRegs.ADCSOC1CTL.bit.CHSEL = 1;  //SOC1 will convert pin B1
    AdcbRegs.ADCSOC1CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC1CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcbRegs.ADCSOC2CTL.bit.CHSEL = 2;  //SOC2 will convert pin B2
    AdcbRegs.ADCSOC2CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC2CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcbRegs.ADCSOC3CTL.bit.CHSEL = 3;  //SOC3 will convert pin B3
    AdcbRegs.ADCSOC3CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC3CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcbRegs.ADCSOC4CTL.bit.CHSEL = 4;  //SOC4 will convert pin B4
    AdcbRegs.ADCSOC4CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC4CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C

    AdcbRegs.ADCSOC5CTL.bit.CHSEL = 5;  //SOC5 will convert pin B5
    AdcbRegs.ADCSOC5CTL.bit.ACQPS = acqps; //sample window is 100 SYSCLK cycles
    AdcbRegs.ADCSOC5CTL.bit.TRIGSEL = 7; //trigger on ePWM2 SOCA/C


    AdcbRegs.ADCINTSEL1N2.bit.INT1E   = 1;   // enable INT1 flag
    AdcbRegs.ADCINTSEL1N2.bit.INT1CONT = 0;
    AdcbRegs.ADCINTSEL1N2.bit.INT1SEL = 5;   // end of B_SOC5 will set INT1 flag
    AdcbRegs.ADCINTFLGCLR.bit.ADCINT1 = 1;   // make sure INT1 flag is cleared

/*
Since we are triggering with the ePWM 2B pin, this section is not necesssary.
    //
    //ADCINT1 will trigger
    //
    AdcaRegs.ADCINTSOCSEL1.bit.SOC0 = 1;
    AdcaRegs.ADCINTSOCSEL1.bit.SOC1 = 1;
    AdcaRegs.ADCINTSOCSEL1.bit.SOC2 = 1;
    AdcaRegs.ADCINTSOCSEL1.bit.SOC3 = 1;
    AdcaRegs.ADCINTSOCSEL1.bit.SOC4 = 1;
    AdcaRegs.ADCINTSOCSEL1.bit.SOC5 = 1;


    //
    //ADCINT1 will trigger
    //
    AdcbRegs.ADCINTSOCSEL1.bit.SOC0 = 1;
    AdcbRegs.ADCINTSOCSEL1.bit.SOC1 = 1;
    AdcbRegs.ADCINTSOCSEL1.bit.SOC2 = 1;
    AdcbRegs.ADCINTSOCSEL1.bit.SOC3 = 1;
    AdcbRegs.ADCINTSOCSEL1.bit.SOC4 = 1;
    AdcbRegs.ADCINTSOCSEL1.bit.SOC5 = 1;
*/

    EDIS;
}






/*
//
// SetupPPBOffset - Configure PPB for SOC
//
void SetupPPBOffset(int16 aOffset, int16 bOffset)
{
    EALLOW;
    AdcaRegs.ADCPPB1CONFIG.bit.CONFIG = 5; //PPB1 is associated with SOC1
    AdcaRegs.ADCPPB1OFFCAL.all = aOffset;  //PPB1 will subtract OFFCAL value
                                           //to associated SOC

    AdcbRegs.ADCPPB1CONFIG.bit.CONFIG = 0; //PPB1 is associated with SOC1
    AdcbRegs.ADCPPB1OFFCAL.all = bOffset;  //PPB1 will subtract OFFCAL value
                                           //to associated SOC
    EDIS;
}

*/





// cpu_timer0_isr - CPU Timer0 ISR with interrupt counter

__interrupt void cpu_timer0_isr(void)
{
   CpuTimer0.InterruptCount++;

/*
    EALLOW;
    SysCtrlRegs.WDKEY = 0x55;
    SysCtrlRegs.WDKEY = 0xAA;   // service WD #2
    EDIS;
*/

    x  = m_a*vf*sin(m_f*w*Ts*vf*sam);
    x2 = m_a*vf*sin(m_f*w*Ts*vf*sam - 2*pi/3);
    x3 = m_a*vf*sin(m_f*w*Ts*vf*sam - 4*pi/3);

    /*
    if (x >=0)
    {
        GpioDataRegs.GPBSET.bit.GPIO35 = 1;
    }
    else
    {
    GpioDataRegs.GPBCLEAR.bit.GPIO35 = 1;
    }

*/

    A = 0.5*(1 - x);
    B = 0.5*(1 - x2);
    C = 0.5*(1 - x3);


   if (ADC == 0)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*A ;
    }

    else if (ADC == 1)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G1*Gain*(V_sen[1] - B1);
    }

    else if (ADC == 2)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G2*Gain*(V_sen[2] - B2);
    }

    else if (ADC == 3)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G3*Gain*(V_sen[3] - B3);
    }

    else if (ADC == 4)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G4*Gain*(V_sen[4] - B4);
    }

    else if (ADC == 5)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G5*Gain*(V_sen[5] - B5);
    }

    else if (ADC == 6)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G6*Gain*(V_sen[6] - B6);
    }

    else if (ADC == 7)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G7*Gain*(V_sen[7] - B7);
    }

    else if (ADC == 8)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G8*Gain*(V_sen[8] - B8);
    }

    else if (ADC == 9)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G9*Gain*(V_sen[9] - B9);
    }

    else if (ADC == 10)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G10*Gain*(V_sen[10] - B10);
    }

    else if (ADC == 11)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G11*Gain*(V_sen[11] - B11);
    }


    else if (ADC == 12)
    {
        EPwm1Regs.CMPA.bit.CMPA= TB_PRD*G12*Gain*(V_sen[12] - B12);
    }



    EPwm1Regs.CMPA.bit.CMPA = TB_PRD*A ;
    EPwm1Regs.CMPB.bit.CMPB = TB_PRD*A ;

    EPwm3Regs.CMPA.bit.CMPA = TB_PRD*B ;
    EPwm3Regs.CMPB.bit.CMPB = TB_PRD*B ;
    EPwm4Regs.CMPA.bit.CMPA = TB_PRD*C ;
    EPwm4Regs.CMPB.bit.CMPB = TB_PRD*C ;

   //
   // Acknowledge this interrupt to receive more interrupts from group 1
   //
   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;


   if (data_type == 1)
   {
       data_log_1[i] = 1000*x;
   }

   else if (data_type == 2)
   {
       data_log_1[i] = m_f*w*Ts*vf*sam;
   }

   else if (data_type == 3)
   {
       data_log_1[i] = G1*Gain*(V_sen[1] - B1);
   }
   else if (data_type == 4)
   {
       data_log_1[i] = G2*Gain*(V_sen[2] - B2);
   }
   else if (data_type == 5)
   {
       data_log_1[i] = G3*Gain*(V_sen[3] - B3);
   }
   else if (data_type == 6)
   {
       data_log_1[i] = G4*Gain*(V_sen[4] - B4);
   }
   else if (data_type == 7)
   {
       data_log_1[i] = G5*Gain*(V_sen[5] - B5);
   }
   else if (data_type == 8)
   {
       data_log_1[i] = G6*Gain*(V_sen[6] - B6);
   }

   else if (data_type == 9)
   {
       data_log_1[i] = G7*Gain*(V_sen[7] - B7);
   }
   else if (data_type == 10)
   {
       data_log_1[i] = G8*Gain*(V_sen[8] - B8);
   }
   else if (data_type == 11)
   {
       data_log_1[i] = G9*Gain*(V_sen[9] - B9);
   }
   else if (data_type == 12)
   {
       data_log_1[i] = G10*Gain*(V_sen[10] - B10);
   }
   else if (data_type == 13)
   {
       data_log_1[i] = G11*Gain*(V_sen[11] - B11);
   }
   else if (data_type == 14)
   {
       data_log_1[i] = G12*Gain*(V_sen[12] - B12);
   }



   i = i+1;

   if (i == sample_size)
   {
       i = 0;
   }

   sam++ ;

   if (m_f*w*Ts*vf*sam == 2*pi)
   {
       sam = 0;
   }

}


void Gpio_select(void)
{
    EALLOW;
    GpioCtrlRegs.GPAMUX1.all = 0x00000000;  // All GPIO
    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;       // Activating ePWM1A
    GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;       // Activating ePWM1B
// ePWM2 is used for ADC conversion and thats why it not used here.
    GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1;       // Activating ePWM3A
    GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;       // Activating ePWM3B
    GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1;       // Activating ePWM4A
    GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1;       // Activating ePWM4B


    GpioCtrlRegs.GPAMUX2.all = 0x00000000;  // All GPIO
    GpioCtrlRegs.GPBMUX1.all = 0x00000000;  // All GPIO
    GpioCtrlRegs.GPADIR.all = 0xFFFFFFFF;   // All outputs
    GpioCtrlRegs.GPBDIR.all = 0x00001FFF;   // All outputs
    EDIS;
}

void InitEPwm1Example()
{
    EPwm1Regs.TBPRD = 3125;                       // Set timer period
    EPwm1Regs.TBPHS.bit.TBPHS = 0x0000;           // Phase is 0
    EPwm1Regs.TBCTR = 0x0000;                     // Clear counter

    //
    // Setup TBCLK
    //
    EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
    EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
    EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
    EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV4;

    EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;    // Load registers every ZERO
    EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    //
    // Setup compare
    //
    // EPwm1Regs.CMPA.bit.CMPA = 3000;

    //
    // Set actions
    //
    EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;            // Set PWM1A on Zero
    EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;


    EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR;          // Set PWM1A on Zero
    EPwm1Regs.AQCTLB.bit.CAD = AQ_SET;

    /*
    //
    // Active Low PWMs - Setup Deadband
    //
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LO;
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBRED.bit.DBRED = EPWM1_MIN_DB;
    EPwm1Regs.DBFED.bit.DBFED = EPWM1_MIN_DB;
    EPwm1_DB_Direction = DB_UP;


    //
    // Interrupt where we will change the Deadband
    //
    EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;    // Select INT on Zero event

    EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;          // Generate INT on 3rd event
    */
    EPwm1Regs.ETSEL.bit.INTEN = 1;               // Enable INT


    //---------------------------------- ePWM3----------------------------------

    EPwm3Regs.TBPRD = 3125;                       // Set timer period
    EPwm3Regs.TBPHS.bit.TBPHS = 0x0000;           // Phase is 0
    EPwm3Regs.TBCTR = 0x0000;                     // Clear counter

    //
    // Setup TBCLK
    //
    EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
    EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
    EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
    EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV4;

    EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;    // Load registers every ZERO
    EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    //
    // Setup compare
    //
    // EPwm1Regs.CMPA.bit.CMPA = 3000;

    //
    // Set actions
    //
    EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;            // Set PWM1A on Zero
    EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;


    EPwm3Regs.AQCTLB.bit.CAU = AQ_CLEAR;          // Set PWM1A on Zero
    EPwm3Regs.AQCTLB.bit.CAD = AQ_SET;

    /*
    //
    // Active Low PWMs - Setup Deadband
    //
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LO;
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBRED.bit.DBRED = EPWM1_MIN_DB;
    EPwm1Regs.DBFED.bit.DBFED = EPWM1_MIN_DB;
    EPwm1_DB_Direction = DB_UP;


    //
    // Interrupt where we will change the Deadband
    //
    EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;    // Select INT on Zero event

    EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;          // Generate INT on 3rd event
    */
    EPwm3Regs.ETSEL.bit.INTEN = 1;               // Enable INT



    //---------------------------------- ePWM4----------------------------------

    EPwm4Regs.TBPRD =3125;                       // Set timer period
    EPwm4Regs.TBPHS.bit.TBPHS = 0x0000;           // Phase is 0
    EPwm4Regs.TBCTR = 0x0000;                     // Clear counter

    //
    // Setup TBCLK
    //
    EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
    EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
    EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
    EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV4;

    EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;    // Load registers every ZERO
    EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
    EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
    EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;

    //
    // Setup compare
    //
    // EPwm1Regs.CMPA.bit.CMPA = 3000;

    //
    // Set actions
    //
    EPwm4Regs.AQCTLA.bit.CAU = AQ_SET;            // Set PWM1A on Zero
    EPwm4Regs.AQCTLA.bit.CAD = AQ_CLEAR;


    EPwm4Regs.AQCTLB.bit.CAU = AQ_CLEAR;          // Clear PWM4B on Zero
    EPwm4Regs.AQCTLB.bit.CAD = AQ_SET;

    /*
    //
    // Active Low PWMs - Setup Deadband
    //
    EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
    EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LO;
    EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
    EPwm1Regs.DBRED.bit.DBRED = EPWM1_MIN_DB;
    EPwm1Regs.DBFED.bit.DBFED = EPWM1_MIN_DB;
    EPwm1_DB_Direction = DB_UP;


    //
    // Interrupt where we will change the Deadband
    //
    EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;    // Select INT on Zero event

    EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;          // Generate INT on 3rd event
    */
    EPwm4Regs.ETSEL.bit.INTEN = 1;               // Enable INT

}



//
// End of file
//