#ifndef PORTABLE_WORDSIZES

#ifdef __MW_TARGET_USE_HARDWARE_RESOURCES_H__

#ifndef __MW_TARGET_HARDWARE_RESOURCES_H__

#define __MW_TARGET_HARDWARE_RESOURCES_H__



#define MW_MULTI_TASKING_MODE 1

#include "c2000BoardSupport.h"

#include "F2837xD_device.h"

#include "F2837xD_Examples.h"

#include "F2837xD_GlobalPrototypes.h"

#include "F2837xD_cputimer.h"

#include "c2000SchedulerTimer.h"



#define MW_USECODERTARGET 1

#define MW_TARGETHARDWARE TI Delfino F2837xD

#define MW_CONNECTIONINFO_SERIAL_IPADDRESS codertarget.registry.getLoopbackIP;

#define MW_CONNECTIONINFO_SERIAL_PORT 17725

#define MW_CONNECTIONINFO_SERIAL_VERBOSE 0

#define MW_CONNECTIONINFO_CAN_MEXARGS  

#define MW_EXTMODE_CONFIGURATION serial

#define MW_RTOS Baremetal

#define MW_SCHEDULER_INTERRUPT_SOURCE 0

#define MW_RUNTIME_BUILDACTION 0

#define MW_RUNTIME_DEVICEID 1

#define MW_RUNTIME_FLASHLOAD 1

#define MW_RUNTIME_CPU 0

#define MW_RUNTIME_LOADCOMMANDARG $(TARGET_ROOT)/CCS_Config/f28377D.ccxml

#define MW_RUNTIME_CPU2MODELENABLE 102

#define MWalse #define MW_RUNTIME_CPU2MODEL 

#define MW_RUNTIME_PF1DMAACCESS 0

#define MW_RUNTIME_PF2DMAACCESS 0

#define MW_TARGETLINKOBJ_USECUSTOMLINKER 0

#define MW_TARGETLINKOBJ_NAME $(TARGET_ROOT)/src/c28377D.cmd

#define MW_CLOCKING_CPUCLOCKRATEMHZ 200

#define MW_CLOCKING_USEINTERNALOSC 0

#define MW_CLOCKING_OSCCLK 20

#define MW_CLOCKING_AUTOSETPLLSETTINGS 1

#define MW_CLOCKING_PLLCR 20

#define MW_CLOCKING_DIVSEL 2

#define MW_CLOCKING_CLOSESTCPUCLOCK 200

#define MW_CLOCKING_LSPCLKDIV 0

#define MW_CLOCKING_LSPCLK 200.000000

#define MW_ADCA_CPUCORE 1

#define MW_ADCA_CLOCKDIV 7

#define MW_ADCA_CLOCKFREQUENCY 40.000000

#define MW_ADCA_OFFSETCORRECTIONVALUE AdcaRegs.ADCOFFTRIM.bit.OFFTRIM

#define MW_ADCA_EXTERNALREFERENCESELECTOR 0

#define MW_ADCA_EXTERNALREFERENCEVREFHI 3.3

#define MW_ADCA_EXTERNALREFERENCEVREFLO 0

#define MW_ADCA_INTPULSEGENERATION 0

#define MW_ADCA_SOCPRIORITY 0

#define MW_ADCA_XINT2GPIO GPIO0

#define MW_ADCB_CPUCORE 1

#define MW_ADCB_CLOCKDIV 7

#define MW_ADCB_CLOCKFREQUENCY 40.000000

#define MW_ADCB_OFFSETCORRECTIONVALUE AdcbRegs.ADCOFFTRIM.bit.OFFTRIM

#define MW_ADCB_EXTERNALREFERENCESELECTOR 0

#define MW_ADCB_EXTERNALREFERENCEVREFHI 3.3

#define MW_ADCB_EXTERNALREFERENCEVREFLO 0

#define MW_ADCB_INTPULSEGENERATION 0

#define MW_ADCB_SOCPRIORITY 0

#define MW_ADCB_XINT2GPIO GPIO0

#define MW_ADCC_CPUCORE 1

#define MW_ADCC_CLOCKDIV 7

#define MW_ADCC_CLOCKFREQUENCY 40.000000

#define MW_ADCC_OFFSETCORRECTIONVALUE AdccRegs.ADCOFFTRIM.bit.OFFTRIM

#define MW_ADCC_EXTERNALREFERENCESELECTOR 0

#define MW_ADCC_EXTERNALREFERENCEVREFHI 3.3

#define MW_ADCC_EXTERNALREFERENCEVREFLO 0

#define MW_ADCC_INTPULSEGENERATION 0

#define MW_ADCC_SOCPRIORITY 0

#define MW_ADCC_XINT2GPIO GPIO0

#define MW_ADCD_CPUCORE 1

#define MW_ADCD_CLOCKDIV 7

#define MW_ADCD_CLOCKFREQUENCY 40.000000

#define MW_ADCD_OFFSETCORRECTIONVALUE AdcdRegs.ADCOFFTRIM.bit.OFFTRIM

#define MW_ADCD_EXTERNALREFERENCESELECTOR 0

#define MW_ADCD_EXTERNALREFERENCEVREFHI 3.3

#define MW_ADCD_EXTERNALREFERENCEVREFLO 0

#define MW_ADCD_INTPULSEGENERATION 0

#define MW_ADCD_SOCPRIORITY 0

#define MW_ADCD_XINT2GPIO GPIO0

#define MW_DACA_VOLTAGE 0

#define MW_DACA_LOADMODE 0

#define MW_DACB_VOLTAGE 0

#define MW_DACB_LOADMODE 0

#define MW_DACC_VOLTAGE 0

#define MW_DACC_LOADMODE 0

#define MW_EPWM_CLOCKDIV 1

#define MW_EPWM_PINASSIGNMENT_TZ1 GPIO12

#define MW_EPWM_PINASSIGNMENT_TZ2 None

#define MW_EPWM_PINASSIGNMENT_TZ3 None

#define MW_EPWM_PINASSIGNMENT_SYNCI None

#define MW_EPWM_PINASSIGNMENT_SYNCO None

#define MW_EPWM_PINASSIGNMENT_PWM1A 1

#define MW_EPWM_PINASSIGNMENT_PWM1B 1

#define MW_EPWM_PINASSIGNMENT_PWM2A 1

#define MW_EPWM_PINASSIGNMENT_PWM2B 1

#define MW_EPWM_PINASSIGNMENT_PWM3A 1

#define MW_EPWM_PINASSIGNMENT_PWM3B 1

#define MW_EPWM_PINASSIGNMENT_PWM4A 1

#define MW_EPWM_PINASSIGNMENT_PWM4B 1

#define MW_EPWM_PINASSIGNMENT_PWM5A 1

#define MW_EPWM_PINASSIGNMENT_PWM5B 1

#define MW_EPWM_PINASSIGNMENT_PWM6A 1

#define MW_EPWM_PINASSIGNMENT_PWM6B 1

#define MW_EPWM_PINASSIGNMENT_PWM7A 1

#define MW_EPWM_PINASSIGNMENT_PWM7B 1

#define MW_EPWM_PINASSIGNMENT_PWM8A 1

#define MW_EPWM_PINASSIGNMENT_PWM8B 1

#define MW_EPWM_PINASSIGNMENT_PWM9A 1

#define MW_EPWM_PINASSIGNMENT_PWM9B 1

#define MW_EPWM_PINASSIGNMENT_PWM10A 1

#define MW_EPWM_PINASSIGNMENT_PWM10B 1

#define MW_EPWM_PINASSIGNMENT_PWM11A 1

#define MW_EPWM_PINASSIGNMENT_PWM11B 1

#define MW_EPWM_PINASSIGNMENT_PWM12A 1

#define MW_EPWM_PINASSIGNMENT_PWM12B 1

#define MW_ECAP_PINASSIGNMENT_ECAP1 GPIO24

#define MW_ECAP_PINASSIGNMENT_ECAP2 GPIO25

#define MW_ECAP_PINASSIGNMENT_ECAP3 GPIO26

#define MW_ECAP_PINASSIGNMENT_ECAP4 GPIO20

#define MW_ECAP_PINASSIGNMENT_ECAP5 GPIO21

#define MW_ECAP_PINASSIGNMENT_ECAP6 GPIO23

#define MW_ECAP_PINASSIGNMENT_APWM1 13

#define MW_ECAP_PINASSIGNMENT_APWM2 14

#define MW_ECAP_PINASSIGNMENT_APWM3 15

#define MW_ECAP_PINASSIGNMENT_APWM4 16

#define MW_ECAP_PINASSIGNMENT_APWM5 17

#define MW_ECAP_PINASSIGNMENT_APWM6 18

#define MW_EQEP_PINASSIGNMENT_EQEP1A 2

#define MW_EQEP_PINASSIGNMENT_EQEP1B 2

#define MW_EQEP_PINASSIGNMENT_EQEP1S 2

#define MW_EQEP_PINASSIGNMENT_EQEP1I 2

#define MW_EQEP_PINASSIGNMENT_EQEP2A 1

#define MW_EQEP_PINASSIGNMENT_EQEP2B 1

#define MW_EQEP_PINASSIGNMENT_EQEP2S 1

#define MW_EQEP_PINASSIGNMENT_EQEP2I 1

#define MW_EQEP_PINASSIGNMENT_EQEP3A 2

#define MW_EQEP_PINASSIGNMENT_EQEP3B 2

#define MW_EQEP_PINASSIGNMENT_EQEP3S 2

#define MW_EQEP_PINASSIGNMENT_EQEP3I 2

#define MW_I2C_MODE 0

#define MW_I2C_ADDRDATAFORMAT 0

#define MW_I2C_OWNADDRESS 1

#define MW_I2C_BITCOUNT 0

#define MW_I2C_MODULECLOCKPRESCALER 9

#define MW_I2C_MODULECLOCKFREQUENCY 20000000.000000

#define MW_I2C_MASTERCLKLOWTIME 20

#define MW_I2C_MASTERCLKHIGHTIME 20

#define MW_I2C_MASTERCLOCKFREQUENCY 400000.000000

#define MW_I2C_MASTERCLOCKFREQUENCY_1 400000.000000

#define MW_I2C_MASTERCLOCKFREQUENCY_2 400000.000000

#define MW_I2C_ENABLELOOPBACK 0

#define MW_I2C_PINASSIGNMENT_SDAA 1

#define MW_I2C_PINASSIGNMENT_SCLA 1

#define MW_I2C_ENABLETXINT 0

#define MW_I2C_TXFIFOLEVEL 16

#define MW_I2C_ENABLERXINT 0

#define MW_I2C_RXFIFOLEVEL 16

#define MW_I2C_ENABLESYSINT 0

#define MW_I2C_AAS 0

#define MW_I2C_SCD 0

#define MW_I2C_ARDY 0

#define MW_I2C_NACK 0

#define MW_I2C_AL 0

#define MW_I2C_B_MODE 0

#define MW_I2C_B_ADDRDATAFORMAT 0

#define MW_I2C_B_OWNADDRESS 1

#define MW_I2C_B_BITCOUNT 0

#define MW_I2C_B_MODULECLOCKPRESCALER 9

#define MW_I2C_B_MODULECLOCKFREQUENCY 20000000.000000

#define MW_I2C_B_MASTERCLKLOWTIME 20

#define MW_I2C_B_MASTERCLKHIGHTIME 20

#define MW_I2C_B_MASTERCLOCKFREQUENCY 400000.000000

#define MW_I2C_B_MASTERCLOCKFREQUENCY_1 400000.000000

#define MW_I2C_B_MASTERCLOCKFREQUENCY_2 400000.000000

#define MW_I2C_B_ENABLELOOPBACK 0

#define MW_I2C_B_PINASSIGNMENT_SDAA 1

#define MW_I2C_B_PINASSIGNMENT_SCLA 1

#define MW_I2C_B_ENABLETXINT 0

#define MW_I2C_B_TXFIFOLEVEL 16

#define MW_I2C_B_ENABLERXINT 0

#define MW_I2C_B_RXFIFOLEVEL 16

#define MW_I2C_B_ENABLESYSINT 0

#define MW_I2C_B_AAS 0

#define MW_I2C_B_SCD 0

#define MW_I2C_B_ARDY 0

#define MW_I2C_B_NACK 0

#define MW_I2C_B_AL 0

#define MW_SCI_A_ENABLELOOPBACK 0

#define MW_SCI_A_SUSPENSIONMODE 2

#define MW_SCI_A_NUMBEROFSTOPBITS 0

#define MW_SCI_A_PARITYMODE 0

#define MW_SCI_A_CHARACTERLENGTHBITS 0

#define MW_SCI_A_USERBAUDRATE 115200

#define MW_SCI_A_BAUDRATEPRESCALER 216.000000

#define MW_SCI_A_BAUDRATE 115207.000000

#define MW_SCI_A_COMMUNICATIONMODE 0

#define MW_SCI_A_BLOCKINGMODE 0

#define MW_SCI_A_DATABYTEORDER 0

#define MW_SCI_A_DATASWAPWIDTH 0

#define MW_SCI_A_PINASSIGNMENT_TX 2

#define MW_SCI_A_PINASSIGNMENT_RX 2

#define MW_SCI_B_ENABLELOOPBACK 0

#define MW_SCI_B_SUSPENSIONMODE 2

#define MW_SCI_B_NUMBEROFSTOPBITS 0

#define MW_SCI_B_PARITYMODE 0

#define MW_SCI_B_CHARACTERLENGTHBITS 0

#define MW_SCI_B_USERBAUDRATE 115200

#define MW_SCI_B_BAUDRATEPRESCALER 216.000000

#define MW_SCI_B_BAUDRATE 115207.000000

#define MW_SCI_B_COMMUNICATIONMODE 0

#define MW_SCI_B_BLOCKINGMODE 0

#define MW_SCI_B_DATABYTEORDER 0

#define MW_SCI_B_DATASWAPWIDTH 0

#define MW_SCI_B_PINASSIGNMENT_TX 1

#define MW_SCI_B_PINASSIGNMENT_RX 1

#define MW_SCI_C_ENABLELOOPBACK 0

#define MW_SCI_C_SUSPENSIONMODE 2

#define MW_SCI_C_NUMBEROFSTOPBITS 0

#define MW_SCI_C_PARITYMODE 0

#define MW_SCI_C_CHARACTERLENGTHBITS 0

#define MW_SCI_C_USERBAUDRATE 115200

#define MW_SCI_C_BAUDRATEPRESCALER 216.000000

#define MW_SCI_C_BAUDRATE 115207.000000

#define MW_SCI_C_COMMUNICATIONMODE 0

#define MW_SCI_C_BLOCKINGMODE 0

#define MW_SCI_C_DATABYTEORDER 0

#define MW_SCI_C_DATASWAPWIDTH 0

#define MW_SCI_C_PINASSIGNMENT_TX 1

#define MW_SCI_C_PINASSIGNMENT_RX 1

#define MW_SCI_D_ENABLELOOPBACK 0

#define MW_SCI_D_SUSPENSIONMODE 2

#define MW_SCI_D_NUMBEROFSTOPBITS 0

#define MW_SCI_D_PARITYMODE 0

#define MW_SCI_D_CHARACTERLENGTHBITS 0

#define MW_SCI_D_USERBAUDRATE 115200

#define MW_SCI_D_BAUDRATEPRESCALER 216.000000

#define MW_SCI_D_BAUDRATE 115207.000000

#define MW_SCI_D_COMMUNICATIONMODE 0

#define MW_SCI_D_BLOCKINGMODE 0

#define MW_SCI_D_DATABYTEORDER 0

#define MW_SCI_D_DATASWAPWIDTH 0

#define MW_SCI_D_PINASSIGNMENT_TX 1

#define MW_SCI_D_PINASSIGNMENT_RX 1

#define MW_SPI_A_MODE 0

#define MW_SPI_A_USERBAUDRATE 1843200

#define MW_SPI_A_BAUDRATEFACTOR 108.000000

#define MW_SPI_A_BAUDRATE 1834862.000000

#define MW_SPI_A_DATABITS 15

#define MW_SPI_A_CLOCKPOLARITY 0

#define MW_SPI_A_CLOCKPHASE 0

#define MW_SPI_A_SUSPENSIONMODE 2

#define MW_SPI_A_ENABLELOOPBACK 0

#define MW_SPI_A_ENABLETHREEWIRE 0

#define MW_SPI_A_TXINTERRUPTENABLE 0

#define MW_SPI_A_FIFOINTERRUPTLEVEL_TX 0

#define MW_SPI_A_RXINTERRUPTENABLE 0

#define MW_SPI_A_FIFOINTERRUPTLEVEL_RX 16

#define MW_SPI_A_FIFOENABLE 1

#define MW_SPI_A_FIFOTRANSMITDELAY 0

#define MW_SPI_A_PINASSIGNMENT_SIMO 1

#define MW_SPI_A_PINASSIGNMENT_SOMI 1

#define MW_SPI_A_PINASSIGNMENT_CLK 1

#define MW_SPI_A_PINASSIGNMENT_STE 1

#define MW_SPI_A_PINVALUE_SIMO 16

#define MW_SPI_A_PINVALUE_SOMI 17

#define MW_SPI_A_PINVALUE_CLK 18

#define MW_SPI_A_PINVALUE_STE 19

#define MW_SPI_A_PINMUX_SIMO 1

#define MW_SPI_A_PINMUX_SOMI 1

#define MW_SPI_A_PINMUX_CLK 1

#define MW_SPI_A_PINMUX_STE 1

#define MW_SPI_A_FIFO_LEVEL 16.000000

#define MW_SPI_B_MODE 0

#define MW_SPI_B_USERBAUDRATE 1843200

#define MW_SPI_B_BAUDRATEFACTOR 108.000000

#define MW_SPI_B_BAUDRATE 1834862.000000

#define MW_SPI_B_DATABITS 15

#define MW_SPI_B_CLOCKPOLARITY 0

#define MW_SPI_B_CLOCKPHASE 0

#define MW_SPI_B_SUSPENSIONMODE 2

#define MW_SPI_B_ENABLELOOPBACK 0

#define MW_SPI_B_ENABLETHREEWIRE 0

#define MW_SPI_B_TXINTERRUPTENABLE 0

#define MW_SPI_B_FIFOINTERRUPTLEVEL_TX 0

#define MW_SPI_B_RXINTERRUPTENABLE 0

#define MW_SPI_B_FIFOINTERRUPTLEVEL_RX 16

#define MW_SPI_B_FIFOENABLE 1

#define MW_SPI_B_FIFOTRANSMITDELAY 0

#define MW_SPI_B_PINASSIGNMENT_SIMO 1

#define MW_SPI_B_PINASSIGNMENT_SOMI 1

#define MW_SPI_B_PINASSIGNMENT_CLK 2

#define MW_SPI_B_PINASSIGNMENT_STE 2

#define MW_SPI_B_PINVALUE_SIMO 24

#define MW_SPI_B_PINVALUE_SOMI 25

#define MW_SPI_B_PINVALUE_CLK 26

#define MW_SPI_B_PINVALUE_STE 27

#define MW_SPI_B_PINMUX_SIMO 6

#define MW_SPI_B_PINMUX_SOMI 6

#define MW_SPI_B_PINMUX_CLK 6

#define MW_SPI_B_PINMUX_STE 6

#define MW_SPI_B_FIFO_LEVEL 16.000000

#define MW_SPI_C_MODE 0

#define MW_SPI_C_USERBAUDRATE 1843200

#define MW_SPI_C_BAUDRATEFACTOR 108.000000

#define MW_SPI_C_BAUDRATE 1834862.000000

#define MW_SPI_C_DATABITS 15

#define MW_SPI_C_CLOCKPOLARITY 0

#define MW_SPI_C_CLOCKPHASE 0

#define MW_SPI_C_SUSPENSIONMODE 2

#define MW_SPI_C_ENABLELOOPBACK 0

#define MW_SPI_C_ENABLETHREEWIRE 0

#define MW_SPI_C_TXINTERRUPTENABLE 0

#define MW_SPI_C_FIFOINTERRUPTLEVEL_TX 0

#define MW_SPI_C_RXINTERRUPTENABLE 0

#define MW_SPI_C_FIFOINTERRUPTLEVEL_RX 16

#define MW_SPI_C_FIFOENABLE 1

#define MW_SPI_C_FIFOTRANSMITDELAY 0

#define MW_SPI_C_PINASSIGNMENT_SIMO 1

#define MW_SPI_C_PINASSIGNMENT_SOMI 1

#define MW_SPI_C_PINASSIGNMENT_CLK 1

#define MW_SPI_C_PINASSIGNMENT_STE 1

#define MW_SPI_C_PINVALUE_SIMO 50

#define MW_SPI_C_PINVALUE_SOMI 51

#define MW_SPI_C_PINVALUE_CLK 52

#define MW_SPI_C_PINVALUE_STE 53

#define MW_SPI_C_PINMUX_SIMO 6

#define MW_SPI_C_PINMUX_SOMI 6

#define MW_SPI_C_PINMUX_CLK 6

#define MW_SPI_C_PINMUX_STE 6

#define MW_SPI_C_FIFO_LEVEL 16.000000

#define MW_ECAN_A_MODULECLOCKFREQUENCY 200.000000

#define MW_ECAN_A_BAUDRATEPRESCALER 20.000000

#define MW_ECAN_A_TSEG1 4

#define MW_ECAN_A_TSEG2 3

#define MW_ECAN_A_BAUDRATE 1000000

#define MW_ECAN_A_SBG 0

#define MW_ECAN_A_SJW 1

#define MW_ECAN_A_SAM 0

#define MW_ECAN_A_ENHANCEDCANMODE 1

#define MW_ECAN_A_SELFTESTMODE 0

#define MW_ECAN_A_PINASSIGNMENT_TX 3

#define MW_ECAN_A_PINASSIGNMENT_RX 3

#define MW_ECAN_B_MODULECLOCKFREQUENCY 200.000000

#define MW_ECAN_B_BAUDRATEPRESCALER 20.000000

#define MW_ECAN_B_TSEG1 4

#define MW_ECAN_B_TSEG2 3

#define MW_ECAN_B_BAUDRATE 1000000

#define MW_ECAN_B_SBG 0

#define MW_ECAN_B_SJW 1

#define MW_ECAN_B_SAM 0

#define MW_ECAN_B_ENHANCEDCANMODE 1

#define MW_ECAN_B_SELFTESTMODE 0

#define MW_ECAN_B_PINASSIGNMENT_TX 2

#define MW_ECAN_B_PINASSIGNMENT_RX 2

#define MW_WATCHDOG_ENABLE_WATCHDOG 0

#define MW_WATCHDOG_WATCHDOGCLOCK 0

#define MW_WATCHDOG_TIME_PERIOD 0.013107

#define MW_WATCHDOG_WATCHDOGEVENT 0

#define MW_GPIO0_7_GPIOQUALSEL0 0

#define MW_GPIO0_7_GPIOQUALSEL1 0

#define MW_GPIO0_7_GPIOQUALSEL2 0

#define MW_GPIO0_7_GPIOQUALSEL3 0

#define MW_GPIO0_7_GPIOQUALSEL4 0

#define MW_GPIO0_7_GPIOQUALSEL5 0

#define MW_GPIO0_7_GPIOQUALSEL6 0

#define MW_GPIO0_7_GPIOQUALSEL7 0

#define MW_GPIO0_7_QUALPRD 0

#define MW_GPIO8_15_GPIOQUALSEL8 0

#define MW_GPIO8_15_GPIOQUALSEL9 0

#define MW_GPIO8_15_GPIOQUALSEL10 0

#define MW_GPIO8_15_GPIOQUALSEL11 0

#define MW_GPIO8_15_GPIOQUALSEL12 0

#define MW_GPIO8_15_GPIOQUALSEL13 0

#define MW_GPIO8_15_GPIOQUALSEL14 0

#define MW_GPIO8_15_GPIOQUALSEL15 0

#define MW_GPIO8_15_QUALPRD 0

#define MW_GPIO16_23_GPIOQUALSEL16 0

#define MW_GPIO16_23_GPIOQUALSEL17 0

#define MW_GPIO16_23_GPIOQUALSEL18 0

#define MW_GPIO16_23_GPIOQUALSEL19 0

#define MW_GPIO16_23_GPIOQUALSEL20 0

#define MW_GPIO16_23_GPIOQUALSEL21 0

#define MW_GPIO16_23_GPIOQUALSEL22 0

#define MW_GPIO16_23_GPIOQUALSEL23 0

#define MW_GPIO16_23_QUALPRD 0

#define MW_GPIO24_31_GPIOQUALSEL24 0

#define MW_GPIO24_31_GPIOQUALSEL25 0

#define MW_GPIO24_31_GPIOQUALSEL26 0

#define MW_GPIO24_31_GPIOQUALSEL27 0

#define MW_GPIO24_31_GPIOQUALSEL28 0

#define MW_GPIO24_31_GPIOQUALSEL29 0

#define MW_GPIO24_31_GPIOQUALSEL30 0

#define MW_GPIO24_31_GPIOQUALSEL31 0

#define MW_GPIO24_31_QUALPRD 0

#define MW_GPIO32_39_GPIOQUALSEL32 0

#define MW_GPIO32_39_GPIOQUALSEL33 0

#define MW_GPIO32_39_GPIOQUALSEL34 0

#define MW_GPIO32_39_GPIOQUALSEL35 0

#define MW_GPIO32_39_GPIOQUALSEL36 0

#define MW_GPIO32_39_GPIOQUALSEL37 0

#define MW_GPIO32_39_GPIOQUALSEL38 0

#define MW_GPIO32_39_GPIOQUALSEL39 0

#define MW_GPIO32_39_QUALPRD 0

#define MW_GPIO40_47_GPIOQUALSEL40 0

#define MW_GPIO40_47_GPIOQUALSEL41 0

#define MW_GPIO40_47_GPIOQUALSEL42 0

#define MW_GPIO40_47_GPIOQUALSEL43 0

#define MW_GPIO40_47_GPIOQUALSEL44 0

#define MW_GPIO40_47_GPIOQUALSEL45 0

#define MW_GPIO40_47_GPIOQUALSEL46 0

#define MW_GPIO40_47_GPIOQUALSEL47 0

#define MW_GPIO40_47_QUALPRD 0

#define MW_GPIO48_55_GPIOQUALSEL48 0

#define MW_GPIO48_55_GPIOQUALSEL49 0

#define MW_GPIO48_55_GPIOQUALSEL50 0

#define MW_GPIO48_55_GPIOQUALSEL51 0

#define MW_GPIO48_55_GPIOQUALSEL52 0

#define MW_GPIO48_55_GPIOQUALSEL53 0

#define MW_GPIO48_55_GPIOQUALSEL54 0

#define MW_GPIO48_55_GPIOQUALSEL55 0

#define MW_GPIO48_55_QUALPRD 0

#define MW_GPIO56_63_GPIOQUALSEL56 0

#define MW_GPIO56_63_GPIOQUALSEL57 0

#define MW_GPIO56_63_GPIOQUALSEL58 0

#define MW_GPIO56_63_GPIOQUALSEL59 0

#define MW_GPIO56_63_GPIOQUALSEL60 0

#define MW_GPIO56_63_GPIOQUALSEL61 0

#define MW_GPIO56_63_GPIOQUALSEL62 0

#define MW_GPIO56_63_GPIOQUALSEL63 0

#define MW_GPIO56_63_QUALPRD 0

#define MW_GPIO64_71_GPIOQUALSEL64 0

#define MW_GPIO64_71_GPIOQUALSEL65 0

#define MW_GPIO64_71_GPIOQUALSEL66 0

#define MW_GPIO64_71_GPIOQUALSEL67 0

#define MW_GPIO64_71_GPIOQUALSEL68 0

#define MW_GPIO64_71_GPIOQUALSEL69 0

#define MW_GPIO64_71_GPIOQUALSEL70 0

#define MW_GPIO64_71_GPIOQUALSEL71 0

#define MW_GPIO64_71_QUALPRD 0

#define MW_GPIO72_79_GPIOQUALSEL72 0

#define MW_GPIO72_79_GPIOQUALSEL73 0

#define MW_GPIO72_79_GPIOQUALSEL74 0

#define MW_GPIO72_79_GPIOQUALSEL75 0

#define MW_GPIO72_79_GPIOQUALSEL76 0

#define MW_GPIO72_79_GPIOQUALSEL77 0

#define MW_GPIO72_79_GPIOQUALSEL78 0

#define MW_GPIO72_79_GPIOQUALSEL79 0

#define MW_GPIO72_79_QUALPRD 0

#define MW_GPIO80_87_GPIOQUALSEL80 0

#define MW_GPIO80_87_GPIOQUALSEL81 0

#define MW_GPIO80_87_GPIOQUALSEL82 0

#define MW_GPIO80_87_GPIOQUALSEL83 0

#define MW_GPIO80_87_GPIOQUALSEL84 0

#define MW_GPIO80_87_GPIOQUALSEL85 0

#define MW_GPIO80_87_GPIOQUALSEL86 0

#define MW_GPIO80_87_GPIOQUALSEL87 0

#define MW_GPIO80_87_QUALPRD 0

#define MW_GPIO88_95_GPIOQUALSEL88 0

#define MW_GPIO88_95_GPIOQUALSEL89 0

#define MW_GPIO88_95_GPIOQUALSEL90 0

#define MW_GPIO88_95_GPIOQUALSEL91 0

#define MW_GPIO88_95_GPIOQUALSEL92 0

#define MW_GPIO88_95_GPIOQUALSEL93 0

#define MW_GPIO88_95_GPIOQUALSEL94 0

#define MW_GPIO88_95_GPIOQUALSEL95 0

#define MW_GPIO88_95_QUALPRD 0

#define MW_GPIO96_103_GPIOQUALSEL96 0

#define MW_GPIO96_103_GPIOQUALSEL97 0

#define MW_GPIO96_103_GPIOQUALSEL98 0

#define MW_GPIO96_103_GPIOQUALSEL99 0

#define MW_GPIO96_103_GPIOQUALSEL100 0

#define MW_GPIO96_103_GPIOQUALSEL101 0

#define MW_GPIO96_103_GPIOQUALSEL102 0

#define MW_GPIO96_103_GPIOQUALSEL103 0

#define MW_GPIO96_103_QUALPRD 0

#define MW_GPIO104_111_GPIOQUALSEL104 0

#define MW_GPIO104_111_GPIOQUALSEL105 0

#define MW_GPIO104_111_GPIOQUALSEL106 0

#define MW_GPIO104_111_GPIOQUALSEL107 0

#define MW_GPIO104_111_GPIOQUALSEL108 0

#define MW_GPIO104_111_GPIOQUALSEL109 0

#define MW_GPIO104_111_GPIOQUALSEL110 0

#define MW_GPIO104_111_GPIOQUALSEL111 0

#define MW_GPIO104_111_QUALPRD 0

#define MW_GPIO112_119_GPIOQUALSEL112 0

#define MW_GPIO112_119_GPIOQUALSEL113 0

#define MW_GPIO112_119_GPIOQUALSEL114 0

#define MW_GPIO112_119_GPIOQUALSEL115 0

#define MW_GPIO112_119_GPIOQUALSEL116 0

#define MW_GPIO112_119_GPIOQUALSEL117 0

#define MW_GPIO112_119_GPIOQUALSEL118 0

#define MW_GPIO112_119_GPIOQUALSEL119 0

#define MW_GPIO112_119_QUALPRD 0

#define MW_GPIO120_127_GPIOQUALSEL120 0

#define MW_GPIO120_127_GPIOQUALSEL121 0

#define MW_GPIO120_127_GPIOQUALSEL122 0

#define MW_GPIO120_127_GPIOQUALSEL123 0

#define MW_GPIO120_127_GPIOQUALSEL124 0

#define MW_GPIO120_127_GPIOQUALSEL125 0

#define MW_GPIO120_127_GPIOQUALSEL126 0

#define MW_GPIO120_127_GPIOQUALSEL127 0

#define MW_GPIO120_127_QUALPRD 0

#define MW_GPIO128_135_GPIOQUALSEL128 0

#define MW_GPIO128_135_GPIOQUALSEL129 0

#define MW_GPIO128_135_GPIOQUALSEL130 0

#define MW_GPIO128_135_GPIOQUALSEL131 0

#define MW_GPIO128_135_GPIOQUALSEL132 0

#define MW_GPIO128_135_GPIOQUALSEL133 0

#define MW_GPIO128_135_GPIOQUALSEL134 0

#define MW_GPIO128_135_GPIOQUALSEL135 0

#define MW_GPIO128_135_QUALPRD 0

#define MW_GPIO136_143_GPIOQUALSEL136 0

#define MW_GPIO136_143_GPIOQUALSEL137 0

#define MW_GPIO136_143_GPIOQUALSEL138 0

#define MW_GPIO136_143_GPIOQUALSEL139 0

#define MW_GPIO136_143_GPIOQUALSEL140 0

#define MW_GPIO136_143_GPIOQUALSEL141 0

#define MW_GPIO136_143_GPIOQUALSEL142 0

#define MW_GPIO136_143_GPIOQUALSEL143 0

#define MW_GPIO136_143_QUALPRD 0

#define MW_GPIO144_151_GPIOQUALSEL144 0

#define MW_GPIO144_151_GPIOQUALSEL145 0

#define MW_GPIO144_151_GPIOQUALSEL146 0

#define MW_GPIO144_151_GPIOQUALSEL147 0

#define MW_GPIO144_151_GPIOQUALSEL148 0

#define MW_GPIO144_151_GPIOQUALSEL149 0

#define MW_GPIO144_151_GPIOQUALSEL150 0

#define MW_GPIO144_151_GPIOQUALSEL151 0

#define MW_GPIO144_151_QUALPRD 0

#define MW_GPIO152_159_GPIOQUALSEL152 0

#define MW_GPIO152_159_GPIOQUALSEL153 0

#define MW_GPIO152_159_GPIOQUALSEL154 0

#define MW_GPIO152_159_GPIOQUALSEL155 0

#define MW_GPIO152_159_GPIOQUALSEL156 0

#define MW_GPIO152_159_GPIOQUALSEL157 0

#define MW_GPIO152_159_GPIOQUALSEL158 0

#define MW_GPIO152_159_GPIOQUALSEL159 0

#define MW_GPIO152_159_QUALPRD 0

#define MW_GPIO160_167_GPIOQUALSEL160 0

#define MW_GPIO160_167_GPIOQUALSEL161 0

#define MW_GPIO160_167_GPIOQUALSEL162 0

#define MW_GPIO160_167_GPIOQUALSEL163 0

#define MW_GPIO160_167_GPIOQUALSEL164 0

#define MW_GPIO160_167_GPIOQUALSEL165 0

#define MW_GPIO160_167_GPIOQUALSEL166 0

#define MW_GPIO160_167_GPIOQUALSEL167 0

#define MW_GPIO160_167_QUALPRD 0

#define MW_GPIO168_175_GPIOQUALSEL168 0

#define MW_GPIO168_175_GPIOQUALSEL169 0

#define MW_GPIO168_175_GPIOQUALSEL170 0

#define MW_GPIO168_175_GPIOQUALSEL171 0

#define MW_GPIO168_175_GPIOQUALSEL172 0

#define MW_GPIO168_175_GPIOQUALSEL173 0

#define MW_GPIO168_175_GPIOQUALSEL174 0

#define MW_GPIO168_175_GPIOQUALSEL175 0

#define MW_GPIO168_175_QUALPRD 0

#define MW_DMA_CH1_ENABLEDMACHANNEL 0

#define MW_DMA_CH1_DATASIZE 0

#define MW_DMA_CH1_INTERRUPTSRC 0

#define MW_DMA_CH1_BURSTSIZE 0

#define MW_DMA_CH1_TRANSFERSIZE 1

#define MW_DMA_CH1_SRCBEGINADD 0xC000

#define MW_DMA_CH1_DSTBEGINADD 0xD000

#define MW_DMA_CH1_SRCBURSTSTEP 0

#define MW_DMA_CH1_DSTBURSTSTEP 0

#define MW_DMA_CH1_SRCTRANSSTEP 0

#define MW_DMA_CH1_DSTTRANSSTEP 0

#define MW_DMA_CH1_WRAPSRCSIZE 65536

#define MW_DMA_CH1_WRAPDSTSIZE 65536

#define MW_DMA_CH1_SRCWRAPSTEP 0

#define MW_DMA_CH1_DSTWRAPSTEP 0

#define MW_DMA_CH1_SETCH1TOHIGH 0

#define MW_DMA_CH1_ENABLEONESHOT 0

#define MW_DMA_CH1_ENABLECONTINUOUS 1

#define MW_DMA_CH1_GENINTERRUPT 0

#define MW_DMA_CH1_ENABLEOVERFLOW 0

#define MW_DMA_CH2_ENABLEDMACHANNEL 0

#define MW_DMA_CH2_DATASIZE 0

#define MW_DMA_CH2_INTERRUPTSRC 0

#define MW_DMA_CH2_BURSTSIZE 0

#define MW_DMA_CH2_TRANSFERSIZE 1

#define MW_DMA_CH2_SRCBEGINADD 0xC000

#define MW_DMA_CH2_DSTBEGINADD 0xD000

#define MW_DMA_CH2_SRCBURSTSTEP 0

#define MW_DMA_CH2_DSTBURSTSTEP 0

#define MW_DMA_CH2_SRCTRANSSTEP 0

#define MW_DMA_CH2_DSTTRANSSTEP 0

#define MW_DMA_CH2_WRAPSRCSIZE 65536

#define MW_DMA_CH2_WRAPDSTSIZE 65536

#define MW_DMA_CH2_SRCWRAPSTEP 0

#define MW_DMA_CH2_DSTWRAPSTEP 0

#define MW_DMA_CH2_ENABLEONESHOT 0

#define MW_DMA_CH2_ENABLECONTINUOUS 1

#define MW_DMA_CH2_GENINTERRUPT 0

#define MW_DMA_CH2_ENABLEOVERFLOW 0

#define MW_DMA_CH3_ENABLEDMACHANNEL 0

#define MW_DMA_CH3_DATASIZE 0

#define MW_DMA_CH3_INTERRUPTSRC 0

#define MW_DMA_CH3_BURSTSIZE 0

#define MW_DMA_CH3_TRANSFERSIZE 1

#define MW_DMA_CH3_SRCBEGINADD 0xC000

#define MW_DMA_CH3_DSTBEGINADD 0xD000

#define MW_DMA_CH3_SRCBURSTSTEP 0

#define MW_DMA_CH3_DSTBURSTSTEP 0

#define MW_DMA_CH3_SRCTRANSSTEP 0

#define MW_DMA_CH3_DSTTRANSSTEP 0

#define MW_DMA_CH3_WRAPSRCSIZE 65536

#define MW_DMA_CH3_WRAPDSTSIZE 65536

#define MW_DMA_CH3_SRCWRAPSTEP 0

#define MW_DMA_CH3_DSTWRAPSTEP 0

#define MW_DMA_CH3_ENABLEONESHOT 0

#define MW_DMA_CH3_ENABLECONTINUOUS 1

#define MW_DMA_CH3_GENINTERRUPT 0

#define MW_DMA_CH3_ENABLEOVERFLOW 0

#define MW_DMA_CH4_ENABLEDMACHANNEL 0

#define MW_DMA_CH4_DATASIZE 0

#define MW_DMA_CH4_INTERRUPTSRC 0

#define MW_DMA_CH4_BURSTSIZE 0

#define MW_DMA_CH4_TRANSFERSIZE 1

#define MW_DMA_CH4_SRCBEGINADD 0xC000

#define MW_DMA_CH4_DSTBEGINADD 0xD000

#define MW_DMA_CH4_SRCBURSTSTEP 0

#define MW_DMA_CH4_DSTBURSTSTEP 0

#define MW_DMA_CH4_SRCTRANSSTEP 0

#define MW_DMA_CH4_DSTTRANSSTEP 0

#define MW_DMA_CH4_WRAPSRCSIZE 65536

#define MW_DMA_CH4_WRAPDSTSIZE 65536

#define MW_DMA_CH4_SRCWRAPSTEP 0

#define MW_DMA_CH4_DSTWRAPSTEP 0

#define MW_DMA_CH4_ENABLEONESHOT 0

#define MW_DMA_CH4_ENABLECONTINUOUS 1

#define MW_DMA_CH4_GENINTERRUPT 0

#define MW_DMA_CH4_ENABLEOVERFLOW 0

#define MW_DMA_CH5_ENABLEDMACHANNEL 0

#define MW_DMA_CH5_DATASIZE 0

#define MW_DMA_CH5_INTERRUPTSRC 0

#define MW_DMA_CH5_BURSTSIZE 0

#define MW_DMA_CH5_TRANSFERSIZE 1

#define MW_DMA_CH5_SRCBEGINADD 0xC000

#define MW_DMA_CH5_DSTBEGINADD 0xD000

#define MW_DMA_CH5_SRCBURSTSTEP 0

#define MW_DMA_CH5_DSTBURSTSTEP 0

#define MW_DMA_CH5_SRCTRANSSTEP 0

#define MW_DMA_CH5_DSTTRANSSTEP 0

#define MW_DMA_CH5_WRAPSRCSIZE 65536

#define MW_DMA_CH5_WRAPDSTSIZE 65536

#define MW_DMA_CH5_SRCWRAPSTEP 0

#define MW_DMA_CH5_DSTWRAPSTEP 0

#define MW_DMA_CH5_ENABLEONESHOT 0

#define MW_DMA_CH5_ENABLECONTINUOUS 1

#define MW_DMA_CH5_GENINTERRUPT 0

#define MW_DMA_CH5_ENABLEOVERFLOW 0

#define MW_DMA_CH6_ENABLEDMACHANNEL 0

#define MW_DMA_CH6_DATASIZE 0

#define MW_DMA_CH6_INTERRUPTSRC 0

#define MW_DMA_CH6_BURSTSIZE 0

#define MW_DMA_CH6_TRANSFERSIZE 1

#define MW_DMA_CH6_SRCBEGINADD 0xC000

#define MW_DMA_CH6_DSTBEGINADD 0xD000

#define MW_DMA_CH6_SRCBURSTSTEP 0

#define MW_DMA_CH6_DSTBURSTSTEP 0

#define MW_DMA_CH6_SRCTRANSSTEP 0

#define MW_DMA_CH6_DSTTRANSSTEP 0

#define MW_DMA_CH6_WRAPSRCSIZE 65536

#define MW_DMA_CH6_WRAPDSTSIZE 65536

#define MW_DMA_CH6_SRCWRAPSTEP 0

#define MW_DMA_CH6_DSTWRAPSTEP 0

#define MW_DMA_CH6_ENABLEONESHOT 0

#define MW_DMA_CH6_ENABLECONTINUOUS 1

#define MW_DMA_CH6_GENINTERRUPT 0

#define MW_DMA_CH6_ENABLEOVERFLOW 0

#define MW_XINT_GPIOXINT1SEL 0

#define MW_XINT_GPIOXINT2SEL 0

#define MW_XINT_GPIOXINT3SEL 0

#define MW_XINT_GPIOXINT4SEL 0

#define MW_XINT_GPIOXINT5SEL 0

#define MW_XINT_POLARITY1 0

#define MW_XINT_POLARITY2 0

#define MW_XINT_POLARITY3 0

#define MW_XINT_POLARITY4 0

#define MW_XINT_POLARITY5 0

#define MW_EXTMODECOMPORT COM3

#define MW_EXECUTIONPROFILEBUFFERLEN 50.000000

#define MW_DATAVERSION 2016.02



#endif /* __MW_TARGET_HARDWARE_RESOURCES_H__ */



#endif



#endif