#ifndef PORTABLE_WORDSIZES

#ifdef __MW_TARGET_USE_HARDWARE_RESOURCES_H__

#ifndef __MW_TARGET_HARDWARE_RESOURCES_H__

#define __MW_TARGET_HARDWARE_RESOURCES_H__



#include "M3SchedulerTimer.h"

#include "ConcertoBoardSupport.h"

#include "concerto_wrapper.h"



#define MW_USECODERTARGET 1

#define MW_TARGETHARDWARE TI Concerto F28M35x (ARM Cortex-M3)

#define MW_CONNECTIONINFO_SERIAL_BAUDRATE codertarget.concerto.registry.UARTConfigBaudRateExternalMode

#define MW_CONNECTIONINFO_SERIAL_COMPORT COM6

#define MW_CONNECTIONINFO_SERIAL_VERBOSE 0

#define MW_CONNECTIONINFO_TCPIP_IPADDRESS codertarget.concerto.registry.EthernetConfigIPAddressExternalMode

#define MW_CONNECTIONINFO_TCPIP_PORT 17725

#define MW_CONNECTIONINFO_TCPIP_VERBOSE 0

#define MW_EXTMODE_CONFIGURATION TCP/IP

#define MW_EXTMODE_RUNNING on

#define MW_RTOS Baremetal

#define MW_SCHEDULER_INTERRUPT_SOURCE 0

#define MW_RUNTIME_BUILDACTION 1

#define MW_RUNTIME_DEVICEID 0

#define MW_RUNTIME_FLASHLOAD 1

#define MW_RUNTIME_LOADCOMMANDARG $(TARGET_ROOT)/CCS_Config/f28M35x.ccxml

#define MW_TARGETLINKOBJ_USECUSTOMLINKER 1

#define MW_TARGETLINKOBJ_NAME $(TARGET_ROOT)/src/F28M35H52C_m3.cmd

#define MW_CLOCKING_C28CPUCLOCKRATEMHZ 150

#define MW_CLOCKING_CLOSESTCPUCLOCK 75

#define MW_CLOCKING_OSCCLK 20

#define MW_CLOCKING_AUTOSETPLLSETTINGS 1

#define MW_CLOCKING_SYSPLLMULT 15

#define MW_CLOCKING_SYSDIVSEL 0

#define MW_CLOCKING_CLOSESTC28CPUCLOCK 150

#define MW_CLOCKING_M3SSDIVSEL 1

#define MW_CLOCKING_CLOSESTM3CPUCLOCK 75

#define MW_GPIOA_CLOCKENABLE 1

#define MW_GPIOA_SHOWPINSETTING 0

#define MW_GPIOA_CONTROLCOREPIN0 0

#define MW_GPIOA_OUTTYPEREGPIN0 0

#define MW_GPIOA_CONTROLCOREPIN1 0

#define MW_GPIOA_OUTTYPEREGPIN1 0

#define MW_GPIOA_CONTROLCOREPIN2 0

#define MW_GPIOA_OUTTYPEREGPIN2 0

#define MW_GPIOA_CONTROLCOREPIN3 0

#define MW_GPIOA_OUTTYPEREGPIN3 0

#define MW_GPIOA_CONTROLCOREPIN4 0

#define MW_GPIOA_OUTTYPEREGPIN4 0

#define MW_GPIOA_CONTROLCOREPIN5 0

#define MW_GPIOA_OUTTYPEREGPIN5 0

#define MW_GPIOA_CONTROLCOREPIN6 0

#define MW_GPIOA_OUTTYPEREGPIN6 0

#define MW_GPIOA_CONTROLCOREPIN7 0

#define MW_GPIOA_OUTTYPEREGPIN7 0

#define MW_GPIOB_CLOCKENABLE 1

#define MW_GPIOB_SHOWPINSETTING 0

#define MW_GPIOB_CONTROLCOREPIN0 0

#define MW_GPIOB_OUTTYPEREGPIN0 0

#define MW_GPIOB_CONTROLCOREPIN1 0

#define MW_GPIOB_OUTTYPEREGPIN1 0

#define MW_GPIOB_CONTROLCOREPIN2 0

#define MW_GPIOB_OUTTYPEREGPIN2 0

#define MW_GPIOB_CONTROLCOREPIN3 0

#define MW_GPIOB_OUTTYPEREGPIN3 0

#define MW_GPIOB_CONTROLCOREPIN4 0

#define MW_GPIOB_OUTTYPEREGPIN4 0

#define MW_GPIOB_CONTROLCOREPIN5 0

#define MW_GPIOB_OUTTYPEREGPIN5 0

#define MW_GPIOB_CONTROLCOREPIN6 0

#define MW_GPIOB_OUTTYPEREGPIN6 0

#define MW_GPIOB_CONTROLCOREPIN7 0

#define MW_GPIOB_OUTTYPEREGPIN7 0

#define MW_GPIOC_CLOCKENABLE 1

#define MW_GPIOC_SHOWPINSETTING 0

#define MW_GPIOC_CONTROLCOREPIN0 0

#define MW_GPIOC_OUTTYPEREGPIN0 0

#define MW_GPIOC_CONTROLCOREPIN1 0

#define MW_GPIOC_OUTTYPEREGPIN1 0

#define MW_GPIOC_CONTROLCOREPIN2 0

#define MW_GPIOC_OUTTYPEREGPIN2 0

#define MW_GPIOC_CONTROLCOREPIN3 0

#define MW_GPIOC_OUTTYPEREGPIN3 0

#define MW_GPIOC_CONTROLCOREPIN4 0

#define MW_GPIOC_OUTTYPEREGPIN4 1

#define MW_GPIOC_CONTROLCOREPIN5 0

#define MW_GPIOC_OUTTYPEREGPIN5 0

#define MW_GPIOC_CONTROLCOREPIN6 0

#define MW_GPIOC_OUTTYPEREGPIN6 0

#define MW_GPIOC_CONTROLCOREPIN7 0

#define MW_GPIOC_OUTTYPEREGPIN7 0

#define MW_GPIOD_CLOCKENABLE 1

#define MW_GPIOD_SHOWPINSETTING 0

#define MW_GPIOD_CONTROLCOREPIN0 0

#define MW_GPIOD_OUTTYPEREGPIN0 0

#define MW_GPIOD_CONTROLCOREPIN1 0

#define MW_GPIOD_OUTTYPEREGPIN1 0

#define MW_GPIOD_CONTROLCOREPIN2 0

#define MW_GPIOD_OUTTYPEREGPIN2 0

#define MW_GPIOD_CONTROLCOREPIN3 0

#define MW_GPIOD_OUTTYPEREGPIN3 0

#define MW_GPIOD_CONTROLCOREPIN4 0

#define MW_GPIOD_OUTTYPEREGPIN4 0

#define MW_GPIOD_CONTROLCOREPIN5 0

#define MW_GPIOD_OUTTYPEREGPIN5 0

#define MW_GPIOD_CONTROLCOREPIN6 0

#define MW_GPIOD_OUTTYPEREGPIN6 0

#define MW_GPIOD_CONTROLCOREPIN7 0

#define MW_GPIOD_OUTTYPEREGPIN7 0

#define MW_GPIOE_CLOCKENABLE 1

#define MW_GPIOE_SHOWPINSETTING 0

#define MW_GPIOE_CONTROLCOREPIN0 0

#define MW_GPIOE_OUTTYPEREGPIN0 0

#define MW_GPIOE_CONTROLCOREPIN1 0

#define MW_GPIOE_OUTTYPEREGPIN1 0

#define MW_GPIOE_CONTROLCOREPIN2 0

#define MW_GPIOE_OUTTYPEREGPIN2 0

#define MW_GPIOE_CONTROLCOREPIN3 0

#define MW_GPIOE_OUTTYPEREGPIN3 0

#define MW_GPIOE_CONTROLCOREPIN4 0

#define MW_GPIOE_OUTTYPEREGPIN4 0

#define MW_GPIOE_CONTROLCOREPIN5 0

#define MW_GPIOE_OUTTYPEREGPIN5 0

#define MW_GPIOE_CONTROLCOREPIN6 0

#define MW_GPIOE_OUTTYPEREGPIN6 0

#define MW_GPIOE_CONTROLCOREPIN7 0

#define MW_GPIOE_OUTTYPEREGPIN7 0

#define MW_GPIOF_CLOCKENABLE 1

#define MW_GPIOF_SHOWPINSETTING 0

#define MW_GPIOF_CONTROLCOREPIN0 0

#define MW_GPIOF_OUTTYPEREGPIN0 0

#define MW_GPIOF_CONTROLCOREPIN1 0

#define MW_GPIOF_OUTTYPEREGPIN1 0

#define MW_GPIOF_CONTROLCOREPIN2 0

#define MW_GPIOF_OUTTYPEREGPIN2 0

#define MW_GPIOF_CONTROLCOREPIN3 0

#define MW_GPIOF_OUTTYPEREGPIN3 0

#define MW_GPIOF_CONTROLCOREPIN4 0

#define MW_GPIOF_OUTTYPEREGPIN4 0

#define MW_GPIOF_CONTROLCOREPIN5 0

#define MW_GPIOF_OUTTYPEREGPIN5 0

#define MW_GPIOF_CONTROLCOREPIN6 0

#define MW_GPIOF_OUTTYPEREGPIN6 0

#define MW_GPIOF_CONTROLCOREPIN7 0

#define MW_GPIOF_OUTTYPEREGPIN7 0

#define MW_GPIOG_CLOCKENABLE 1

#define MW_GPIOG_SHOWPINSETTING 0

#define MW_GPIOG_CONTROLCOREPIN0 0

#define MW_GPIOG_OUTTYPEREGPIN0 0

#define MW_GPIOG_CONTROLCOREPIN1 0

#define MW_GPIOG_OUTTYPEREGPIN1 0

#define MW_GPIOG_CONTROLCOREPIN2 0

#define MW_GPIOG_OUTTYPEREGPIN2 0

#define MW_GPIOG_CONTROLCOREPIN3 0

#define MW_GPIOG_OUTTYPEREGPIN3 0

#define MW_GPIOG_CONTROLCOREPIN4 0

#define MW_GPIOG_OUTTYPEREGPIN4 0

#define MW_GPIOG_CONTROLCOREPIN5 0

#define MW_GPIOG_OUTTYPEREGPIN5 0

#define MW_GPIOG_CONTROLCOREPIN6 0

#define MW_GPIOG_OUTTYPEREGPIN6 0

#define MW_GPIOG_CONTROLCOREPIN7 0

#define MW_GPIOG_OUTTYPEREGPIN7 0

#define MW_GPIOH_CLOCKENABLE 1

#define MW_GPIOH_SHOWPINSETTING 0

#define MW_GPIOH_CONTROLCOREPIN0 0

#define MW_GPIOH_OUTTYPEREGPIN0 0

#define MW_GPIOH_CONTROLCOREPIN1 0

#define MW_GPIOH_OUTTYPEREGPIN1 0

#define MW_GPIOH_CONTROLCOREPIN2 0

#define MW_GPIOH_OUTTYPEREGPIN2 0

#define MW_GPIOH_CONTROLCOREPIN3 0

#define MW_GPIOH_OUTTYPEREGPIN3 0

#define MW_GPIOH_CONTROLCOREPIN4 0

#define MW_GPIOH_OUTTYPEREGPIN4 0

#define MW_GPIOH_CONTROLCOREPIN5 0

#define MW_GPIOH_OUTTYPEREGPIN5 0

#define MW_GPIOH_CONTROLCOREPIN6 0

#define MW_GPIOH_OUTTYPEREGPIN6 0

#define MW_GPIOH_CONTROLCOREPIN7 0

#define MW_GPIOH_OUTTYPEREGPIN7 0

#define MW_GPIOJ_CLOCKENABLE 1

#define MW_GPIOJ_SHOWPINSETTING 0

#define MW_GPIOJ_CONTROLCOREPIN0 0

#define MW_GPIOJ_OUTTYPEREGPIN0 0

#define MW_GPIOJ_CONTROLCOREPIN1 0

#define MW_GPIOJ_OUTTYPEREGPIN1 0

#define MW_GPIOJ_CONTROLCOREPIN2 0

#define MW_GPIOJ_OUTTYPEREGPIN2 0

#define MW_GPIOJ_CONTROLCOREPIN3 0

#define MW_GPIOJ_OUTTYPEREGPIN3 0

#define MW_GPIOJ_CONTROLCOREPIN4 0

#define MW_GPIOJ_OUTTYPEREGPIN4 0

#define MW_GPIOJ_CONTROLCOREPIN5 0

#define MW_GPIOJ_OUTTYPEREGPIN5 0

#define MW_GPIOJ_CONTROLCOREPIN6 0

#define MW_GPIOJ_OUTTYPEREGPIN6 0

#define MW_GPIOJ_CONTROLCOREPIN7 0

#define MW_GPIOJ_OUTTYPEREGPIN7 0

#define MW_UART0_LOOPBACKENABLE 0

#define MW_UART0_DESIREDBAUDRATE 115200

#define MW_UART0_BAUDRATE 115207.373272

#define MW_UART0_STOPBITS 0

#define MW_UART0_PARITYMODE 0

#define MW_UART0_PINASSIGNMENT_TX 2

#define MW_UART0_PINASSIGNMENT_RX 2

#define MW_UART0_ENABLETXINT 0

#define MW_UART0_ENABLERXINT 1

#define MW_UART1_LOOPBACKENABLE 0

#define MW_UART1_DESIREDBAUDRATE 115200

#define MW_UART1_BAUDRATE 115207.373272

#define MW_UART1_STOPBITS 0

#define MW_UART1_PARITYMODE 0

#define MW_UART1_PINASSIGNMENT_TX 2

#define MW_UART1_PINASSIGNMENT_RX 2

#define MW_UART1_ENABLETXINT 0

#define MW_UART1_ENABLERXINT 1

#define MW_UART2_LOOPBACKENABLE 0

#define MW_UART2_DESIREDBAUDRATE 115200

#define MW_UART2_BAUDRATE 115207.373272

#define MW_UART2_STOPBITS 0

#define MW_UART2_PARITYMODE 0

#define MW_UART2_PINASSIGNMENT_TX 1

#define MW_UART2_PINASSIGNMENT_RX 1

#define MW_UART2_ENABLETXINT 0

#define MW_UART2_ENABLERXINT 1

#define MW_UART3_LOOPBACKENABLE 0

#define MW_UART3_DESIREDBAUDRATE 115200

#define MW_UART3_BAUDRATE 115207.373272

#define MW_UART3_STOPBITS 0

#define MW_UART3_PARITYMODE 0

#define MW_UART3_PINASSIGNMENT_TX 1

#define MW_UART3_PINASSIGNMENT_RX 1

#define MW_UART3_ENABLETXINT 0

#define MW_UART3_ENABLERXINT 1

#define MW_UART4_LOOPBACKENABLE 0

#define MW_UART4_SCILOOPBACKENABLE 1

#define MW_UART4_DESIREDBAUDRATE 9.375e6

#define MW_UART4_BAUDRATE 9375000.000000

#define MW_UART4_STOPBITS 0

#define MW_UART4_PARITYMODE 0

#define MW_UART4_PINASSIGNMENT_TX 0

#define MW_UART4_PINASSIGNMENT_RX 0

#define MW_UART4_ENABLETXINT 0

#define MW_UART4_ENABLERXINT 1

#define MW_ETHERNET_DHCPENABLED 1

#define MW_ETHERNET_HOSTNAME Concerto-M3

#define MW_ETHERNET_LOCALIPADDRESS 192.168.1.20

#define MW_ETHERNET_SUBNETMASK 255.255.255.0

#define MW_ETHERNET_MACADDR A8-63-F2-80-90-80

#define MW_PIL_INTERFACE 1

#define MW_PIL_COMPORT COM1

#define MW_PIL_BAUDRATE 115207.373272

#define MW_PIL_ETHERNETPORT 17725.000000

#define MW_DATAVERSION 2016.02

#define MW_MULTI_TASKING_MODE 1



#endif /* __MW_TARGET_HARDWARE_RESOURCES_H__ */



#endif



#endif