1#include "m3_core.h"



2#include "mw_force_no_optimization.h"



3#include "arm_cortex_m_multitasking.h"



4/* Re-entrant function for multi-tasking: arm_cortex_m_call_thread_with_context_switch*/



5



6__asm  ("    .sect \".text:arm_cortex_m_call_thread_with_context_switch\"\n"



7        "    .clink\n"



8        "    .thumbfunc arm_cortex_m_call_thread_with_context_switch\n"



9        "    .thumb\n"



10        "    .align 4\n"



11        "    .global arm_cortex_m_call_thread_with_context_switch\n"



12        "arm_cortex_m_call_thread_with_context_switch:");



13#if (defined(__FPU_PRESENT) && (__FPU_PRESENT == 1)) && (defined(__FPU_USED) && (__FPU_USED == 1))



14__asm ("     TST  LR, #0x10");



15__asm ("     IT EQ");



16__asm ("     VMOVEQ S0, S0");



17#endif



18__asm ("     PUSH {R0, R1}");



19__asm ("     SUB SP, SP, #0x20");



20__asm ("     ADR R0,Call_isr_routine_in_thread_mode");



21__asm ("     STR R0,[SP, #24]");



22__asm ("     MOV R0,#0x01000000");



23__asm ("     STR R0,[SP, #28]");



24__asm ("     MVNS R0,#0x6");



25__asm ("     MOV LR, R0");



26__asm ("     BX LR");



27__asm ("Call_isr_routine_in_thread_mode:");



28__asm ("     POP {R0, R1}");



29__asm ("     BLX R0");



30__asm ("     ISB");



31__asm ("     SVC #0");



32__asm ("Unknown_Execution:");



33__asm ("     B Unknown_Execution");



34



35/* SVC Interrupt service routine to restore the context: SVC_Handler*/



36



37__asm  ("    .sect \".text:SVC_Handler\"\n"



38        "    .clink\n"



39        "    .thumbfunc SVC_Handler\n"



40        "    .thumb\n"



41        "    .align 4\n"



42        "    .global SVC_Handler\n"



43        "SVC_Handler:");



44#if (defined(__FPU_PRESENT) && (__FPU_PRESENT == 1)) && (defined(__FPU_USED) && (__FPU_USED == 1))



45__asm ("     TST  LR, #0x10");



46__asm ("     IT EQ");



47__asm ("     VMOVEQ S0, S0");



48#endif



49__asm ("     TST LR, #0x4");



50__asm ("     ITE EQ");



51__asm ("     MRSEQ R0, MSP");



52__asm ("     MRSNE R0, PSP");



53__asm ("     LDR R1, [R0, #24]");



54__asm ("     LDRB.W R0, [R1, #-2]");



55__asm ("     CBZ R0, svc_service_0");



56__asm ("     B Unknown_SVC_Request");



57__asm ("svc_service_0:");



58#if (defined(__FPU_PRESENT) && (__FPU_PRESENT == 1)) && (defined(__FPU_USED) && (__FPU_USED == 1))



59__asm ("     TST LR, #0x10");



60__asm ("     ITE EQ");



61__asm ("     ADDEQ SP, SP, #104");



62__asm ("     ADDNE SP, SP, #32");



63#else



64__asm ("     ADD SP, SP, #32");



65#endif



66__asm ("     POP {R0, R1}");



67__asm ("     MSR APSR_nzcvq, R0");



68__asm ("     BX R1");



69__asm ("Unknown_SVC_Request:");



70__asm ("     B Unknown_SVC_Request");



71



72