| 1 | /* |
| 2 | * Academic License - for use in teaching, academic research, and meeting |
| 3 | * course requirements at degree granting institutions only. Not for |
| 4 | * government, commercial, or other organizational use. |
| 5 | * |
| 6 | * File: ert_main.c |
| 7 | * |
| 8 | * Code generated for Simulink model 'm3_core'. |
| 9 | * |
| 10 | * Model version : 1.91 |
| 11 | * Simulink Coder version : 8.11 (R2016b) 25-Aug-2016 |
| 12 | * C/C++ source code generated on : Thu Sep 27 00:27:58 2018 |
| 13 | * |
| 14 | * Target selection: ert.tlc |
| 15 | * Embedded hardware selection: ARM Compatible->ARM Cortex |
| 16 | * Code generation objectives: Unspecified |
| 17 | * Validation result: Not run |
| 18 | */ |
| 19 | |
| 20 | #include "m3_core.h" |
| 21 | #include "rtwtypes.h" |
| 22 | #include <ext_work.h> |
| 23 | #include <ext_svr.h> |
| 24 | #include <ext_share.h> |
| 25 | #include <updown.h> |
| 26 | |
| 27 | volatile int IsrOverrun = 0; |
| 28 | boolean_T isRateRunning[3] = { 0, 0, 0 }; |
| 29 | |
| 30 | boolean_T need2runFlags[3] = { 0, 0, 0 }; |
| 31 | |
| 32 | void rt_OneStep(void) |
| 33 | { |
| 34 | boolean_T eventFlags[3]; |
| 35 | int_T i; |
| 36 | |
| 37 | /* Check base rate for overrun */ |
| 38 | if (isRateRunning[0]++) { |
| 39 | IsrOverrun = 1; |
| 40 | isRateRunning[0]--; /* allow future iterations to succeed*/ |
| 41 | return; |
| 42 | } |
| 43 | |
| 44 | /* |
| 45 | * For a bare-board target (i.e., no operating system), the rates |
| 46 | * that execute this base step are buffered locally to allow for |
| 47 | * overlapping preemption. The generated code includes function |
| 48 | * writeCodeInfoFcn() which sets the rates |
| 49 | * that need to run this time step. The return values are 1 and 0 |
| 50 | * for true and false, respectively. |
| 51 | */ |
| 52 | m3_core_SetEventsForThisBaseStep(eventFlags); |
| 53 | IntMasterEnable(); |
| 54 | m3_core_step0(); |
| 55 | |
| 56 | /* Get model outputs here */ |
| 57 | IntMasterDisable(); |
| 58 | isRateRunning[0]--; |
| 59 | for (i = 1; i < 3; i++) { |
| 60 | if (eventFlags[i]) { |
| 61 | if (need2runFlags[i]++) { |
| 62 | IsrOverrun = 1; |
| 63 | need2runFlags[i]--; /* allow future iterations to succeed*/ |
| 64 | break; |
| 65 | } |
| 66 | } |
| 67 | } |
| 68 | |
| 69 | for (i = 1; i < 3; i++) { |
| 70 | if (isRateRunning[i]) { |
| 71 | /* Yield to higher priority*/ |
| 72 | return; |
| 73 | } |
| 74 | |
| 75 | if (need2runFlags[i]) { |
| 76 | isRateRunning[i]++; |
| 77 | IntMasterEnable(); |
| 78 | |
| 79 | /* Step the model for subrate "i" */ |
| 80 | switch (i) |
| 81 | { |
| 82 | case 1 : |
| 83 | m3_core_step1(); |
| 84 | |
| 85 | /* Get model outputs here */ |
| 86 | break; |
| 87 | |
| 88 | case 2 : |
| 89 | m3_core_step2(); |
| 90 | |
| 91 | /* Get model outputs here */ |
| 92 | break; |
| 93 | |
| 94 | default : |
| 95 | break; |
| 96 | } |
| 97 | |
| 98 | IntMasterDisable(); |
| 99 | need2runFlags[i]--; |
| 100 | isRateRunning[i]--; |
| 101 | } |
| 102 | } |
| 103 | |
| 104 | rtExtModeCheckEndTrigger(); |
| 105 | } |
| 106 | |
| 107 | int main(void) |
| 108 | { |
| 109 | volatile boolean_T runModel = 1; |
| 110 | float modelBaseRate = 0.05; |
| 111 | float systemClock = 75; |
| 112 | IntMasterDisable(); |
| 113 | concerto_init_board(); |
| 114 | rtmSetErrorStatus(m3_core_M, 0); |
| 115 | |
| 116 | /* initialize external mode */ |
| 117 | rtParseArgsForExtMode(0, NULL); |
| 118 | m3_core_initialize(); |
| 119 | IntMasterEnable(); |
| 120 | |
| 121 | /* External mode */ |
| 122 | rtSetTFinalForExtMode(&rtmGetTFinal(m3_core_M)); |
| 123 | rtExtModeCheckInit(3); |
| 124 | |
| 125 | { |
| 126 | boolean_T rtmStopReq = false; |
| 127 | rtExtModeWaitForStartPkt(m3_core_M->extModeInfo, 3, &rtmStopReq); |
| 128 | if (rtmStopReq) { |
| 129 | rtmSetStopRequested(m3_core_M, true); |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | rtERTExtModeStartMsg(); |
| 134 | SysCtlDelay(1000000); |
| 135 | IntMasterDisable(); |
| 136 | configureSysTick(modelBaseRate, systemClock); |
| 137 | runModel = |
| 138 | (rtmGetErrorStatus(m3_core_M) == (NULL)) && !rtmGetStopRequested(m3_core_M); |
| 139 | IntMasterEnable(); |
| 140 | IntMasterEnable(); |
| 141 | while (runModel) { |
| 142 | /* External mode */ |
| 143 | { |
| 144 | boolean_T rtmStopReq = false; |
| 145 | rtExtModeOneStep(m3_core_M->extModeInfo, 3, &rtmStopReq); |
| 146 | if (rtmStopReq) { |
| 147 | rtmSetStopRequested(m3_core_M, true); |
| 148 | } |
| 149 | } |
| 150 | |
| 151 | runModel = |
| 152 | (rtmGetErrorStatus(m3_core_M) == (NULL)) && !rtmGetStopRequested(m3_core_M); |
| 153 | } |
| 154 | |
| 155 | rtExtModeShutdown(3); |
| 156 | |
| 157 | /* Disable rt_OneStep() here */ |
| 158 | |
| 159 | /* Terminate model */ |
| 160 | m3_core_terminate(); |
| 161 | SysCtlDelay(1000000); |
| 162 | IntMasterDisable(); |
| 163 | return 0; |
| 164 | } |
| 165 | |
| 166 | /* |
| 167 | * File trailer for generated code. |
| 168 | * |
| 169 | * [EOF] |
| 170 | */ |
| 171 | |