#include"F28x_Project.h"

void main(void)
{
// Intiate system controls, GPIO pins, interrupt

    uint16_t r1 = 0x0000;

    InitSysCtrl();
    InitPieCtrl();
        IER = 0x0000;
        IFR = 0x0000;
    InitPieVectTable();
    InitGpio();

    EALLOW;

        GpioCtrlRegs.GPAGMUX1.bit.GPIO9     = 1;
        GpioCtrlRegs.GPAMUX1.bit.GPIO9      = 3; // set Gpio pin 9 as SPI clock pin
        GpioCtrlRegs.GPAPUD.bit.GPIO9       = 0; // Pull up enable
        GpioCtrlRegs.GPAQSEL1.bit.GPIO9     = 3; // Qualifier Selection

        GpioCtrlRegs.GPAGMUX1.bit.GPIO8     = 1;
        GpioCtrlRegs.GPAMUX1.bit.GPIO8      = 3; // set Gpio pin 8 as SPI SIMO pin
        GpioCtrlRegs.GPAPUD.bit.GPIO8       = 0; // Pull up enable
        GpioCtrlRegs.GPAQSEL1.bit.GPIO8     = 3; // Qualifier Selection

        GpioCtrlRegs.GPAGMUX1.bit.GPIO10    = 1;
        GpioCtrlRegs.GPAMUX1.bit.GPIO10     = 3; // set Gpio pin 10 as SPI SOMI pin
        GpioCtrlRegs.GPAPUD.bit.GPIO10      = 0; // Pull up enable
        GpioCtrlRegs.GPAQSEL1.bit.GPIO10    = 3; // Qualifier Selection

        GpioCtrlRegs.GPAGMUX1.bit.GPIO14    = 0;
        GpioCtrlRegs.GPAMUX1.bit.GPIO14     = 0; // set Gpio pin 14 as GPIO output pin (CS/)
        GpioCtrlRegs.GPADIR.bit.GPIO14      = 1; // set direction as output

        GpioCtrlRegs.GPAGMUX1.bit.GPIO15    = 0;
        GpioCtrlRegs.GPAMUX1.bit.GPIO15     = 0; // set Gpio pin 15 as GPIO output pin (START)
        GpioCtrlRegs.GPADIR.bit.GPIO15      = 1; // set direction as output

        GpioCtrlRegs.GPBGMUX1.bit.GPIO34    = 0;
        GpioCtrlRegs.GPBMUX1.bit.GPIO34     = 0; // set Gpio pin 34 as GPIO output pin (ADC_RST)
        GpioCtrlRegs.GPBDIR.bit.GPIO34      = 1; // set direction as output (ADC_RST)

        GpioCtrlRegs.GPAGMUX1.bit.GPIO6     = 0;
        GpioCtrlRegs.GPAMUX1.bit.GPIO6      = 0; // set Gpio pin 6 as GPIO input  pin (IRQ_3)

    EDIS;

        GpioDataRegs.GPASET.bit.GPIO14      = 1;
        GpioDataRegs.GPACLEAR.bit.GPIO15    = 1;
        GpioDataRegs.GPBCLEAR.bit.GPIO34    = 1;


        SpiaRegs.SPIFFTX.bit.SPIFFENA       = 0; // Disable FIFO mode

        SpiaRegs.SPICCR.bit.SPISWRESET      = 0; // clear software reset bit
        SpiaRegs.SPICTL.bit.MASTER_SLAVE    = 1; // master mode selected
        SpiaRegs.SPICTL.bit.CLK_PHASE       = 0; // clock phase selection
        SpiaRegs.SPICCR.bit.CLKPOLARITY     = 0; // clock polarity
        SpiaRegs.SPIBRR.bit.SPI_BIT_RATE    = 24; //(25MHz/25MHz = 1 MHz)
        SpiaRegs.SPICCR.bit.SPICHAR         = 15; // character per transfer
        SpiaRegs.SPISTS.bit.INT_FLAG        = 0; // clear interrupt flag
        SpiaRegs.SPISTS.bit.OVERRUN_FLAG    = 0; // clear over run flag

        SpiaRegs.SPIPRI.bit.FREE            = 1;

        SpiaRegs.SPICTL.bit.TALK            = 1; // slave talk enabled


        SpiaRegs.SPICCR.bit.SPISWRESET      = 1; // software reset disabled

        GpioDataRegs.GPACLEAR.bit.GPIO14    = 1; // Clear CS/ pin to low
        GpioDataRegs.GPBSET.bit.GPIO34      = 1; // ADC_RST disabled
        GpioDataRegs.GPASET.bit.GPIO15      = 1; // Enable the device by setting START pin high

        SpiaRegs.SPITXBUF                   = 0x0006; // Send the RESET command and wait for 0.6ms

        DELAY_US(600);

        SpiaRegs.SPITXBUF                   = 0x1640; // Send the SDATAC command and WREG Command 1st byte
        SpiaRegs.SPITXBUF                   = 0x000A; // WREG Command 2nd byte and MUX0 register value
        SpiaRegs.SPITXBUF                   = 0x2000; // RREG 1st and RREG 2nd byte
        SpiaRegs.SPITXBUF                   = 0xFFFF; // NOP command
        r1 = SpiaRegs.SPIRXBUF;

        GpioDataRegs.GPADAT.bit.GPIO14      = 1; // set CS/ pin to high


    for(;;)
      {

      }

}