MotorWare f2806x Driver API Documentation
cpu.h
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32 #ifndef __CPU_H__
33 #define __CPU_H__
34 
40 
41 
42 // **************************************************************************
43 // the includes
44 
45 #include "sw/modules/types/src/types.h"
46 
51 
52 
53 
54 #ifdef __cplusplus
55 extern "C" {
56 #endif
57 
58 
59 // **************************************************************************
60 // the defines
61 
62 
65 #define EINT asm(" clrc INTM")
66 
69 #define ENABLE_INTERRUPTS asm(" clrc INTM")
70 
73 #define DINT asm(" setc INTM")
74 
77 #define DISABLE_INTERRUPTS asm(" setc INTM")
78 
81 #define ERTM asm(" clrc DBGM")
82 
85 #define DRTM asm(" setc DBGM")
86 
89 #define EALLOW asm(" EALLOW")
90 
93 #define ENABLE_PROTECTED_REGISTER_WRITE_MODE asm(" EALLOW")
94 
97 #define EDIS asm(" EDIS")
98 
101 #define DISABLE_PROTECTED_REGISTER_WRITE_MODE asm(" EDIS")
102 
105 #define ESTOP0 asm(" ESTOP0")
106 
109 #define IDLE asm(" IDLE")
110 
113 #define CPU_IER_INT1_BITS (1 << 0)
114 
117 #define CPU_IER_INT2_BITS (1 << 1)
118 
121 #define CPU_IER_INT3_BITS (1 << 2)
122 
125 #define CPU_IER_INT4_BITS (1 << 3)
126 
129 #define CPU_IER_INT5_BITS (1 << 4)
130 
133 #define CPU_IER_INT6_BITS (1 << 5)
134 
137 #define CPU_IER_INT7_BITS (1 << 6)
138 
141 #define CPU_IER_INT8_BITS (1 << 7)
142 
145 #define CPU_IER_INT9_BITS (1 << 8)
146 
149 #define CPU_IER_INT10_BITS (1 << 9)
150 
153 #define CPU_IER_INT11_BITS (1 << 10)
154 
157 #define CPU_IER_INT12_BITS (1 << 11)
158 
161 #define CPU_IER_INT13_BITS (1 << 12)
162 
165 #define CPU_IER_INT14_BITS (1 << 13)
166 
169 #define CPU_IER_DLOGINT_BITS (1 << 14)
170 
173 #define CPU_IER_RTOSINT_BITS (1 << 15)
174 
175 
176 
179 #define CPU_IFR_INT1_BITS (1 << 0)
180 
183 #define CPU_IFR_INT2_BITS (1 << 1)
184 
187 #define CPU_IFR_INT3_BITS (1 << 2)
188 
191 #define CPU_IFR_INT4_BITS (1 << 3)
192 
195 #define CPU_IFR_INT5_BITS (1 << 4)
196 
199 #define CPU_IFR_INT6_BITS (1 << 5)
200 
203 #define CPU_IFR_INT7_BITS (1 << 6)
204 
207 #define CPU_IFR_INT8_BITS (1 << 7)
208 
211 #define CPU_IFR_INT9_BITS (1 << 8)
212 
215 #define CPU_IFR_INT10_BITS (1 << 9)
216 
219 #define CPU_IFR_INT11_BITS (1 << 10)
220 
223 #define CPU_IFR_INT12_BITS (1 << 11)
224 
227 #define CPU_IFR_INT13_BITS (1 << 12)
228 
231 #define CPU_IFR_INT14_BITS (1 << 13)
232 
235 #define CPU_IFR_DLOGINT_BITS (1 << 14)
236 
239 #define CPU_IFR_RTOSINT_BITS (1 << 15)
240 
241 
244 #define CPU_DBGIER_INT1_BITS (1 << 0)
245 
248 #define CPU_DBGIER_INT2_BITS (1 << 1)
249 
252 #define CPU_DBGIER_INT3_BITS (1 << 2)
253 
256 #define CPU_DBGIER_INT4_BITS (1 << 3)
257 
260 #define CPU_DBGIER_INT5_BITS (1 << 4)
261 
264 #define CPU_DBGIER_INT6_BITS (1 << 5)
265 
268 #define CPU_DBGIER_INT7_BITS (1 << 6)
269 
272 #define CPU_DBGIER_INT8_BITS (1 << 7)
273 
276 #define CPU_DBGIER_INT9_BITS (1 << 8)
277 
280 #define CPU_DBGIER_INT10_BITS (1 << 9)
281 
284 #define CPU_DBGIER_INT11_BITS (1 << 10)
285 
288 #define CPU_DBGIER_INT12_BITS (1 << 11)
289 
292 #define CPU_DBGIER_INT13_BITS (1 << 12)
293 
296 #define CPU_DBGIER_INT14_BITS (1 << 13)
297 
300 #define CPU_DBGIER_DLOGINT_BITS (1 << 14)
301 
304 #define CPU_DBGIER_RTOSINT_BITS (1 << 15)
305 
306 
307 
310 #define CPU_ST0_SXM_BITS (1 << 0)
311 
314 #define CPU_ST0_OVM_BITS (1 << 1)
315 
318 #define CPU_ST0_TC_BITS (1 << 2)
319 
322 #define CPU_ST0_C_BITS (1 << 3)
323 
326 #define CPU_ST0_Z_BITS (1 << 4)
327 
330 #define CPU_ST0_N_BITS (1 << 5)
331 
334 #define CPU_ST0_V_BITS (1 << 6)
335 
338 #define CPU_ST0_PW_BITS (7 << 7)
339 
342 #define CPU_ST0_OVCOVCU_BITS (63 << 10)
343 
344 
345 
348 #define CPU_ST1_INTM_BITS (1 << 0)
349 
352 #define CPU_ST1_DBGM_BITS (1 << 1)
353 
356 #define CPU_ST1_PAGE0_BITS (1 << 2)
357 
360 #define CPU_ST1_VMAP_BITS (1 << 3)
361 
364 #define CPU_ST1_SPA_BITS (1 << 4)
365 
368 #define CPU_ST1_LOOP_BITS (1 << 5)
369 
372 #define CPU_ST1_EALLOW_BITS (1 << 6)
373 
376 #define CPU_ST1_IDLESTAT_BITS (1 << 7)
377 
380 #define CPU_ST1_AMODE_BITS (1 << 8)
381 
384 #define CPU_ST1_OBJMODE_BITS (1 << 9)
385 
388 #define CPU_ST1_MOM1MAP_BITS (1 << 11)
389 
392 #define CPU_ST1_XF_BITS (1 << 12)
393 
396 #define CPU_ST1_ARP_BITS (7 << 13)
397 
398 
399 // **************************************************************************
400 // the typedefs
401 
404 typedef enum
405 {
410 
411 
414 typedef enum
415 {
416  CPU_IntNumber_1=(1 << 0),
417  CPU_IntNumber_2=(1 << 1),
418  CPU_IntNumber_3=(1 << 2),
419  CPU_IntNumber_4=(1 << 3),
420  CPU_IntNumber_5=(1 << 4),
421  CPU_IntNumber_6=(1 << 5),
422  CPU_IntNumber_7=(1 << 6),
423  CPU_IntNumber_8=(1 << 7),
424  CPU_IntNumber_9=(1 << 8),
425  CPU_IntNumber_10=(1 << 9),
426  CPU_IntNumber_11=(1 << 10),
427  CPU_IntNumber_12=(1 << 11),
428  CPU_IntNumber_13=(1 << 12),
429  CPU_IntNumber_14=(1 << 13)
431 
432 
435 typedef struct _CPU_Obj_
436 {
437  uint_least8_t tmp;
438 } CPU_Obj;
439 
440 
443 typedef struct _CPU_Obj_ *CPU_Handle;
444 
445 
446 // **************************************************************************
447 // the globals
448 
449 
452 extern CPU_Obj cpu;
453 
454 
457 extern cregister volatile unsigned int IFR;
458 
459 
462 extern cregister volatile unsigned int IER;
463 
464 
465 // **************************************************************************
466 // the function prototypes
467 
470 extern void CPU_clearIntFlags(CPU_Handle cpuHandle);
471 
472 
475 extern void CPU_disableDebugInt(CPU_Handle cpuHandle);
476 
477 
480 extern void CPU_disableGlobalInts(CPU_Handle cpuHandle);
481 
482 
486 extern void CPU_disableInt(CPU_Handle cpuHandle,const CPU_IntNumber_e intNumber);
487 
488 
491 extern void CPU_disableInts(CPU_Handle cpuHandle);
492 
493 
496 extern void CPU_disableProtectedRegisterWrite(CPU_Handle cpuHandle);
497 
498 
501 extern void CPU_enableDebugInt(CPU_Handle cpuHandle);
502 
503 
506 extern void CPU_enableGlobalInts(CPU_Handle cpuHandle);
507 
508 
512 extern void CPU_enableInt(CPU_Handle cpuHandle,const CPU_IntNumber_e intNumber);
513 
514 
517 extern void CPU_enableProtectedRegisterWrite(CPU_Handle cpuHandle);
518 
519 
524 extern CPU_Handle CPU_init(void *pMemory,const size_t numBytes);
525 
526 
527 #ifdef __cplusplus
528 }
529 #endif // extern "C"
530 
532 #endif // end of __CPU_H__ definition
533 
struct _CPU_Obj_ CPU_Obj
Defines the central processing unit (CPU) object.
void CPU_clearIntFlags(CPU_Handle cpuHandle)
Clears all interrupt flags.
Definition: cpu.c:58
Denotes interrupt number 6.
Definition: cpu.h:421
Denotes interrupt number 3.
Definition: cpu.h:418
Denotes interrupt number 13.
Definition: cpu.h:428
void CPU_enableGlobalInts(CPU_Handle cpuHandle)
Enables global interrupts.
Definition: cpu.c:128
uint_least8_t tmp
a filler value for the object
Definition: cpu.h:437
Defines the central processing unit (CPU) object.
Definition: cpu.h:435
CPU_Handle CPU_init(void *pMemory, const size_t numBytes)
Initializes the central processing unit (CPU) object handle.
Definition: cpu.c:158
void CPU_disableProtectedRegisterWrite(CPU_Handle cpuHandle)
Disables protected register writes.
Definition: cpu.c:108
CPU_Obj cpu
Defines the CPU object.
Definition: cpu.c:52
void CPU_enableDebugInt(CPU_Handle cpuHandle)
Enables the debug interrupt.
Definition: cpu.c:118
CPU_IntNumber_e
Enumeration to define the interrupt numbers.
Definition: cpu.h:414
void CPU_disableInt(CPU_Handle cpuHandle, const CPU_IntNumber_e intNumber)
Disables a specified interrupt number.
Definition: cpu.c:88
Denotes interrupt number 14.
Definition: cpu.h:429
Denotes interrupt number 1.
Definition: cpu.h:416
cregister volatile unsigned int IER
External reference to the interrupt enable register (IER) register.
Denotes interrupt number 2.
Definition: cpu.h:417
Denotes interrupt number 5.
Definition: cpu.h:420
cregister volatile unsigned int IFR
External reference to the interrupt flag register (IFR) register.
Denotes external interrupt number 1.
Definition: cpu.h:406
Denotes interrupt number 9.
Definition: cpu.h:424
void CPU_disableGlobalInts(CPU_Handle cpuHandle)
Disables global interrupts.
Definition: cpu.c:78
struct _CPU_Obj_ * CPU_Handle
Defines the central processing unit (CPU) handle.
Definition: cpu.h:443
Denotes interrupt number 8.
Definition: cpu.h:423
Denotes interrupt number 10.
Definition: cpu.h:425
Denotes external interrupt number 3.
Definition: cpu.h:408
void CPU_enableInt(CPU_Handle cpuHandle, const CPU_IntNumber_e intNumber)
Enables a specified interrupt number.
Definition: cpu.c:138
Denotes interrupt number 11.
Definition: cpu.h:426
CPU_ExtIntNumber_e
Enumeration to define the external interrupt numbers.
Definition: cpu.h:404
void CPU_enableProtectedRegisterWrite(CPU_Handle cpuHandle)
Enables protected register writes.
Definition: cpu.c:148
void CPU_disableInts(CPU_Handle cpuHandle)
Disables all interrupts.
Definition: cpu.c:98
Denotes external interrupt number 2.
Definition: cpu.h:407
Denotes interrupt number 12.
Definition: cpu.h:427
void CPU_disableDebugInt(CPU_Handle cpuHandle)
Disables the debug interrupt.
Definition: cpu.c:68
Denotes interrupt number 7.
Definition: cpu.h:422
Denotes interrupt number 4.
Definition: cpu.h:419