MotorWare f2806x Driver API Documentation
drv8301.c
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36 
37 
38 // **************************************************************************
39 // the includes
40 
41 #include <math.h>
42 
43 
44 // drivers
46 
47 
48 // modules
49 
50 
51 // platforms
52 
53 
54 
55 // **************************************************************************
56 // the defines
57 
58 
59 // **************************************************************************
60 // the globals
61 
62 
63 // **************************************************************************
64 // the function prototypes
65 
67 {
68  DRV8301_Obj *obj = (DRV8301_Obj *)handle;
69  static volatile uint16_t enableWaitTimeOut;
70  uint16_t n = 0;
71 
72  // Enable the drv8301
74 
75  enableWaitTimeOut = 0;
76 
77  // Make sure the Fault bit is not set during startup
78  while(((DRV8301_readSpi(handle,DRV8301_RegName_Status_1) & DRV8301_STATUS1_FAULT_BITS) != 0) && (enableWaitTimeOut < 1000))
79  {
80  if(++enableWaitTimeOut > 999)
81  {
82  obj->enableTimeOut = true;
83  }
84  }
85 
86  // Wait for the DRV8301 registers to update
87  for(n=0;n<0xffff;n++)
88  asm(" NOP");
89 
90  return;
91 }
92 
94 {
95  uint16_t data;
96 
97 
98  // read data
100 
101  // clear the bits
102  if(ampNumber == DRV8301_ShuntAmpNumber_1)
103  {
104  data &= (~DRV8301_CTRL2_DC_CAL_1_BITS);
105 
106  }
107  else if(ampNumber == DRV8301_ShuntAmpNumber_2)
108  {
109  data &= (~DRV8301_CTRL2_DC_CAL_2_BITS);
110  }
111 
112  return((DRV8301_DcCalMode_e)data);
113 } // end of DRV8301_getDcCalMode() function
114 
115 
117 {
118  DRV8301_Word_t readWord;
120 
121 
122  // read the data
123  readWord = DRV8301_readSpi(handle,DRV8301_RegName_Status_1);
124 
125  if(readWord & DRV8301_STATUS1_FAULT_BITS)
126  {
127  faultType = (DRV8301_FaultType_e)(readWord & DRV8301_FAULT_TYPE_MASK);
128 
129  if(faultType == DRV8301_FaultType_NoFault)
130  {
131  // read the data
132  readWord = DRV8301_readSpi(handle,DRV8301_RegName_Status_2);
133 
134  if(readWord & DRV8301_STATUS2_GVDD_OV_BITS)
135  {
136  faultType = DRV8301_FaultType_GVDD_OV;
137  }
138  }
139  }
140 
141  return(faultType);
142 } // end of DRV8301_getFaultType() function
143 
144 
146 {
147  uint16_t data;
148 
149 
150  // read data
152 
153  // mask bits
154  data &= DRV8301_STATUS2_ID_BITS;
155 
156  return(data);
157 } // end of DRV8301_getId() function
158 
159 
161 {
162  uint16_t data;
163 
164  // read data
166 
167  // clear the bits
169 
170  return((DRV8301_VdsLevel_e)data);
171 } // end of DRV8301_getOcLevel() function
172 
173 
175 {
176  uint16_t data;
177 
178 
179  // read data
181 
182  // clear the bits
183  data &= (~DRV8301_CTRL1_OC_MODE_BITS);
184 
185  return((DRV8301_OcMode_e)data);
186 } // end of DRV8301_getOcMode() function
187 
188 
190 {
191  uint16_t data;
192 
193 
194  // read data
196 
197  // clear the bits
198  data &= (~DRV8301_CTRL2_OC_TOFF_BITS);
199 
200  return((DRV8301_OcOffTimeMode_e)data);
201 } // end of DRV8301_getOcOffTimeMode() function
202 
203 
205 {
206  uint16_t data;
207 
208 
209  // read data
211 
212  // clear the bits
213  data &= (~DRV8301_CTRL2_OCTW_SET_BITS);
214 
215  return((DRV8301_OcTwMode_e)data);
216 } // end of DRV8301_getOcTwMode() function
217 
218 
220 {
221  uint16_t data;
222 
223 
224  // read data
226 
227  // clear the bits
229 
230  return((DRV8301_PeakCurrent_e)data);
231 } // end of DRV8301_getPeakCurrent() function
232 
233 
235 {
236  uint16_t data;
237 
238 
239  // read data
241 
242  // clear the bits
243  data &= (~DRV8301_CTRL1_PWM_MODE_BITS);
244 
245  return((DRV8301_PwmMode_e)data);
246 } // end of DRV8301_getPwmMode() function
247 
248 
250 {
251  uint16_t data;
252 
253 
254  // read data
256 
257  // clear the bits
258  data &= (~DRV8301_CTRL2_GAIN_BITS);
259 
260  return((DRV8301_ShuntAmpGain_e)data);
261 } // end of DRV8301_getShuntAmpGain() function
262 
263 
264 DRV8301_Handle DRV8301_init(void *pMemory,const size_t numBytes)
265 {
266  DRV8301_Handle handle;
267 
268 
269  if(numBytes < sizeof(DRV8301_Obj))
270  return((DRV8301_Handle)NULL);
271 
272 
273  // assign the handle
274  handle = (DRV8301_Handle)pMemory;
275 
276  DRV8301_resetRxTimeout(handle);
278 
279 
280  return(handle);
281 } // end of DRV8301_init() function
282 
283 
285 {
286  DRV8301_Obj *obj = (DRV8301_Obj *)handle;
287 
288  // initialize the gpio interface object
289  obj->gpioHandle = gpioHandle;
290 
291  return;
292 } // end of DRV8301_setGpioHandle() function
293 
294 
296 {
297  DRV8301_Obj *obj = (DRV8301_Obj *)handle;
298 
299  // initialize the gpio interface object
300  obj->gpioNumber = gpioNumber;
301 
302  return;
303 } // end of DRV8301_setGpioNumber() function
304 
305 
307 {
308  DRV8301_Obj *obj = (DRV8301_Obj *)handle;
309 
310  // initialize the serial peripheral interface object
311  obj->spiHandle = spiHandle;
312 
313  return;
314 } // end of DRV8301_setSpiHandle() function
315 
316 
318 {
319  DRV8301_Word_t readWord;
320  bool status=false;
321 
322 
323  // read the data
324  readWord = DRV8301_readSpi(handle,DRV8301_RegName_Status_1);
325 
326  if(readWord & DRV8301_STATUS1_FAULT_BITS)
327  {
328  status = true;
329  }
330 
331  return(status);
332 } // end of DRV8301_isFault() function
333 
334 
336 {
337  DRV8301_Word_t readWord;
338  bool status=false;
339 
340 
341  // read the data
342  readWord = DRV8301_readSpi(handle,DRV8301_RegName_Control_1);
343 
344  if(readWord & DRV8301_CTRL1_GATE_RESET_BITS)
345  {
346  status = true;
347  }
348 
349  return(status);
350 } // end of DRV8301_isReset() function
351 
352 
353 uint16_t DRV8301_readSpi(DRV8301_Handle handle,const DRV8301_RegName_e regName)
354 {
355  DRV8301_Obj *obj = (DRV8301_Obj *)handle;
356  uint16_t ctrlWord;
357  const uint16_t data = 0;
358  volatile uint16_t readWord;
359  static volatile uint16_t WaitTimeOut = 0;
360  volatile SPI_FifoStatus_e RxFifoCnt = SPI_FifoStatus_Empty;
361 
362 
363  // build the control word
364  ctrlWord = (uint16_t)DRV8301_buildCtrlWord(DRV8301_CtrlMode_Read,regName,data);
365 
366  // reset the Rx fifo pointer to zero
369 
370 
371  // write the command
372  SPI_write(obj->spiHandle,ctrlWord);
373  // dummy write to return the reply from the 8301
374  SPI_write(obj->spiHandle,0x0000);
375 
376  // wait for two words to populate the RX fifo, or a wait timeout will occur
377  while((RxFifoCnt < SPI_FifoStatus_2_Words) && (WaitTimeOut < 0xffff))
378  {
379  RxFifoCnt = SPI_getRxFifoStatus(obj->spiHandle);
380 
381  if(++WaitTimeOut > 0xfffe)
382  {
383  obj->RxTimeOut = true;
384  }
385  }
386 
387  // Read two words, the dummy word and the data
388  readWord = SPI_readEmu(obj->spiHandle);
389  readWord = SPI_readEmu(obj->spiHandle);
390 
391  return(readWord & DRV8301_DATA_MASK);
392 } // end of DRV8301_readSpi() function
393 
394 
396 {
397  uint16_t data;
398 
399 
400  // read data
402 
403  // set the bits
405 
406  // write the data
408 
409  return;
410 } // end of DRV8301_reset() function
411 
412 
414 {
415  uint16_t data;
416 
417 
418  // read data
420 
421  // clear the bits
422  if(ampNumber == DRV8301_ShuntAmpNumber_1)
423  {
424  data &= (~DRV8301_CTRL2_DC_CAL_1_BITS);
425 
426  }
427  else if(ampNumber == DRV8301_ShuntAmpNumber_2)
428  {
429  data &= (~DRV8301_CTRL2_DC_CAL_2_BITS);
430  }
431 
432  // set the bits
433  data |= mode;
434 
435  // write the data
437 
438  return;
439 } // end of DRV8301_setDcCalMode() function
440 
441 
443 {
444  uint16_t data;
445 
446 
447  // read data
449 
450  // clear the bits
452 
453  // set the bits
454  data |= VdsLevel;
455 
456  // write the data
458 
459  return;
460 } // end of DRV8301_setOcLevel() function
461 
462 
464 {
465  uint16_t data;
466 
467 
468  // read data
470 
471  // clear the bits
472  data &= (~DRV8301_CTRL1_OC_MODE_BITS);
473 
474  // set the bits
475  data |= mode;
476 
477  // write the data
479 
480  return;
481 } // end of DRV8301_setOcMode() function
482 
483 
485 {
486  uint16_t data;
487 
488 
489  // read data
491 
492  // clear the bits
493  data &= (~DRV8301_CTRL2_OC_TOFF_BITS);
494 
495  // set the bits
496  data |= mode;
497 
498  // write the data
500 
501  return;
502 } // end of DRV8301_setOcOffTimeMode() function
503 
504 
506 {
507  uint16_t data;
508 
509 
510  // read data
512 
513  // clear the bits
514  data &= (~DRV8301_CTRL2_OCTW_SET_BITS);
515 
516  // set the bits
517  data |= mode;
518 
519  // write the data
521 
522  return;
523 } // end of DRV8301_setOcTwMode() function
524 
525 
527 {
528  uint16_t data;
529 
530 
531  // read data
533 
534  // clear the bits
536 
537  // set the bits
538  data |= peakCurrent;
539 
540  // write the data
542 
543  return;
544 } // end of DRV8301_setPeakCurrent() function
545 
546 
548 {
549  uint16_t data;
550 
551 
552  // read data
554 
555  // clear the bits
556  data &= (~DRV8301_CTRL1_PWM_MODE_BITS);
557 
558  // set the bits
559  data |= mode;
560 
561  // write the data
563 
564  return;
565 } // end of DRV8301_setPwmMode() function
566 
567 
569 {
570  uint16_t data;
571 
572 
573  // read data
575 
576  // clear the bits
577  data &= (~DRV8301_CTRL2_GAIN_BITS);
578 
579  // set the bits
580  data |= gain;
581 
582  // write the data
584 
585  return;
586 } // end of DRV8301_setShuntAmpGain() function
587 
588 
589 void DRV8301_writeSpi(DRV8301_Handle handle, const DRV8301_RegName_e regName,const uint16_t data)
590 {
591  DRV8301_Obj *obj = (DRV8301_Obj *)handle;
592  uint16_t ctrlWord;
593 
594 
595  // build the command
596  ctrlWord = (uint16_t)DRV8301_buildCtrlWord(DRV8301_CtrlMode_Write,regName,data);
597 
598  // reset the Rx fifo pointer to zero
601 
602  // write the command (time N)
603  SPI_write(obj->spiHandle,ctrlWord);
604 
605 
606  return;
607 } // end of DRV8301_writeSpi() function
608 
609 
611 {
612  DRV8301_RegName_e drvRegName;
613  uint16_t drvDataNew;
614 
615 
616  if(Spi_8301_Vars->SndCmd)
617  {
618  // Update Control Register 1
619  drvRegName = DRV8301_RegName_Control_1;
620  drvDataNew = Spi_8301_Vars->Ctrl_Reg_1.DRV8301_CURRENT | \
621  Spi_8301_Vars->Ctrl_Reg_1.DRV8301_RESET | \
622  Spi_8301_Vars->Ctrl_Reg_1.PWM_MODE | \
623  Spi_8301_Vars->Ctrl_Reg_1.OC_MODE | \
624  Spi_8301_Vars->Ctrl_Reg_1.OC_ADJ_SET;
625  DRV8301_writeSpi(handle,drvRegName,drvDataNew);
626 
627  // Update Control Register 2
628  drvRegName = DRV8301_RegName_Control_2;
629  drvDataNew = Spi_8301_Vars->Ctrl_Reg_2.OCTW_SET | \
630  Spi_8301_Vars->Ctrl_Reg_2.GAIN | \
631  Spi_8301_Vars->Ctrl_Reg_2.DC_CAL_CH1p2 | \
632  Spi_8301_Vars->Ctrl_Reg_2.OC_TOFF;
633  DRV8301_writeSpi(handle,drvRegName,drvDataNew);
634 
635  Spi_8301_Vars->SndCmd = false;
636  }
637 
638  return;
639 } // end of DRV8301_writeData() function
640 
641 
643 {
644  DRV8301_RegName_e drvRegName;
645  uint16_t drvDataNew;
646 
647 
648  if(Spi_8301_Vars->RcvCmd)
649  {
650  // Update Status Register 1
651  drvRegName = DRV8301_RegName_Status_1;
652  drvDataNew = DRV8301_readSpi(handle,drvRegName);
653  Spi_8301_Vars->Stat_Reg_1.FAULT = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FAULT_BITS);
654  Spi_8301_Vars->Stat_Reg_1.GVDD_UV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_GVDD_UV_BITS);
655  Spi_8301_Vars->Stat_Reg_1.PVDD_UV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_PVDD_UV_BITS);
656  Spi_8301_Vars->Stat_Reg_1.OTSD = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_OTSD_BITS);
657  Spi_8301_Vars->Stat_Reg_1.OTW = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_OTW_BITS);
658  Spi_8301_Vars->Stat_Reg_1.FETHA_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHA_OC_BITS);
659  Spi_8301_Vars->Stat_Reg_1.FETLA_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLA_OC_BITS);
660  Spi_8301_Vars->Stat_Reg_1.FETHB_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHB_OC_BITS);
661  Spi_8301_Vars->Stat_Reg_1.FETLB_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLB_OC_BITS);
662  Spi_8301_Vars->Stat_Reg_1.FETHC_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHC_OC_BITS);
663  Spi_8301_Vars->Stat_Reg_1.FETLC_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLC_OC_BITS);
664 
665  // Update Status Register 2
666  drvRegName = DRV8301_RegName_Status_2;
667  drvDataNew = DRV8301_readSpi(handle,drvRegName);
668  Spi_8301_Vars->Stat_Reg_2.GVDD_OV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS2_GVDD_OV_BITS);
669  Spi_8301_Vars->Stat_Reg_2.DeviceID = (uint16_t)(drvDataNew & (uint16_t)DRV8301_STATUS2_ID_BITS);
670 
671  // Update Control Register 1
672  drvRegName = DRV8301_RegName_Control_1;
673  drvDataNew = DRV8301_readSpi(handle,drvRegName);
674  Spi_8301_Vars->Ctrl_Reg_1.DRV8301_CURRENT = (DRV8301_PeakCurrent_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_GATE_CURRENT_BITS);
675  Spi_8301_Vars->Ctrl_Reg_1.DRV8301_RESET = (DRV8301_Reset_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_GATE_RESET_BITS);
676  Spi_8301_Vars->Ctrl_Reg_1.PWM_MODE = (DRV8301_PwmMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_PWM_MODE_BITS);
677  Spi_8301_Vars->Ctrl_Reg_1.OC_MODE = (DRV8301_OcMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_OC_MODE_BITS);
678  Spi_8301_Vars->Ctrl_Reg_1.OC_ADJ_SET = (DRV8301_VdsLevel_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_OC_ADJ_SET_BITS);
679 
680  // Update Control Register 2
681  drvRegName = DRV8301_RegName_Control_2;
682  drvDataNew = DRV8301_readSpi(handle,drvRegName);
683  Spi_8301_Vars->Ctrl_Reg_2.OCTW_SET = (DRV8301_OcTwMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_OCTW_SET_BITS);
684  Spi_8301_Vars->Ctrl_Reg_2.GAIN = (DRV8301_ShuntAmpGain_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_GAIN_BITS);
686  Spi_8301_Vars->Ctrl_Reg_2.OC_TOFF = (DRV8301_OcOffTimeMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_OC_TOFF_BITS);
687 
688  Spi_8301_Vars->RcvCmd = false;
689  }
690 
691  return;
692 } // end of DRV8301_readData() function
693 
694 
696 {
697  DRV8301_RegName_e drvRegName;
698  uint16_t drvDataNew;
699  uint16_t n;
700 
701 
702  // Update Control Register 1
703  drvRegName = DRV8301_RegName_Control_1;
704  drvDataNew = (DRV8301_PeakCurrent_0p25_A | \
709  DRV8301_writeSpi(handle,drvRegName,drvDataNew);
710 
711  // Update Control Register 2
712  drvRegName = DRV8301_RegName_Control_2;
713  drvDataNew = (DRV8301_OcTwMode_Both | \
718  DRV8301_writeSpi(handle,drvRegName,drvDataNew);
719 
720 
721  Spi_8301_Vars->SndCmd = false;
722  Spi_8301_Vars->RcvCmd = false;
723 
724 
725  // Wait for the DRV8301 registers to update
726  for(n=0;n<100;n++)
727  asm(" NOP");
728 
729 
730  // Update Status Register 1
731  drvRegName = DRV8301_RegName_Status_1;
732  drvDataNew = DRV8301_readSpi(handle,drvRegName);
733  Spi_8301_Vars->Stat_Reg_1.FAULT = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FAULT_BITS);
734  Spi_8301_Vars->Stat_Reg_1.GVDD_UV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_GVDD_UV_BITS);
735  Spi_8301_Vars->Stat_Reg_1.PVDD_UV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_PVDD_UV_BITS);
736  Spi_8301_Vars->Stat_Reg_1.OTSD = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_OTSD_BITS);
737  Spi_8301_Vars->Stat_Reg_1.OTW = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_OTW_BITS);
738  Spi_8301_Vars->Stat_Reg_1.FETHA_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHA_OC_BITS);
739  Spi_8301_Vars->Stat_Reg_1.FETLA_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLA_OC_BITS);
740  Spi_8301_Vars->Stat_Reg_1.FETHB_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHB_OC_BITS);
741  Spi_8301_Vars->Stat_Reg_1.FETLB_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLB_OC_BITS);
742  Spi_8301_Vars->Stat_Reg_1.FETHC_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETHC_OC_BITS);
743  Spi_8301_Vars->Stat_Reg_1.FETLC_OC = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS1_FETLC_OC_BITS);
744 
745  // Update Status Register 2
746  drvRegName = DRV8301_RegName_Status_2;
747  drvDataNew = DRV8301_readSpi(handle,drvRegName);
748  Spi_8301_Vars->Stat_Reg_2.GVDD_OV = (bool)(drvDataNew & (uint16_t)DRV8301_STATUS2_GVDD_OV_BITS);
749  Spi_8301_Vars->Stat_Reg_2.DeviceID = (uint16_t)(drvDataNew & (uint16_t)DRV8301_STATUS2_ID_BITS);
750 
751  // Update Control Register 1
752  drvRegName = DRV8301_RegName_Control_1;
753  drvDataNew = DRV8301_readSpi(handle,drvRegName);
754  Spi_8301_Vars->Ctrl_Reg_1.DRV8301_CURRENT = (DRV8301_PeakCurrent_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_GATE_CURRENT_BITS);
755  Spi_8301_Vars->Ctrl_Reg_1.DRV8301_RESET = (DRV8301_Reset_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_GATE_RESET_BITS);
756  Spi_8301_Vars->Ctrl_Reg_1.PWM_MODE = (DRV8301_PwmMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_PWM_MODE_BITS);
757  Spi_8301_Vars->Ctrl_Reg_1.OC_MODE = (DRV8301_OcMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_OC_MODE_BITS);
758  Spi_8301_Vars->Ctrl_Reg_1.OC_ADJ_SET = (DRV8301_VdsLevel_e)(drvDataNew & (uint16_t)DRV8301_CTRL1_OC_ADJ_SET_BITS);
759 
760  // Update Control Register 2
761  drvRegName = DRV8301_RegName_Control_2;
762  drvDataNew = DRV8301_readSpi(handle,drvRegName);
763  Spi_8301_Vars->Ctrl_Reg_2.OCTW_SET = (DRV8301_OcTwMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_OCTW_SET_BITS);
764  Spi_8301_Vars->Ctrl_Reg_2.GAIN = (DRV8301_ShuntAmpGain_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_GAIN_BITS);
766  Spi_8301_Vars->Ctrl_Reg_2.OC_TOFF = (DRV8301_OcOffTimeMode_e)(drvDataNew & (uint16_t)DRV8301_CTRL2_OC_TOFF_BITS);
767 
768  return;
769 }
770 
771 
772 // end of file
Shunt amplifier number 1.
Definition: drv8301.h:313
DRV8301_OcOffTimeMode_e OC_TOFF
Definition: drv8301.h:401
DRV8301_FaultType_e DRV8301_getFaultType(DRV8301_Handle handle)
Gets the fault type.
Definition: drv8301.c:116
#define DRV8301_CTRL1_OC_ADJ_SET_BITS
Defines the location of the OC_ADJ bits in the Control 1 register.
Definition: drv8301.h:162
Defines the serial peripheral interface (SPI) object.
Definition: spi.h:346
#define DRV8301_STATUS1_FETHC_OC_BITS
Defines the location of the FETLC_OC (FET High side, Phase C Over Current) bits in the Status 1 regis...
Definition: drv8301.h:96
void DRV8301_setPwmMode(DRV8301_Handle handle, const DRV8301_PwmMode_e mode)
Sets the PWM mode.
Definition: drv8301.c:547
DRV8301_DcCalMode_e
Enumeration for the DC calibration modes.
Definition: drv8301.h:200
normal CBC operation
Definition: drv8301.h:243
#define DRV8301_CTRL2_DC_CAL_2_BITS
Defines the location of the DC_CAL_2 bits in the Control 2 register.
Definition: drv8301.h:179
bool enableTimeOut
the timeout flag for drv8301 enable
Definition: drv8301.h:424
static void DRV8301_resetEnableTimeout(DRV8301_Handle handle)
Resets the enable timeout flag.
Definition: drv8301.h:573
void DRV8301_readData(DRV8301_Handle handle, DRV_SPI_8301_Vars_t *Spi_8301_Vars)
Definition: drv8301.c:642
DRV8301_ShuntAmpNumber_e
Enumeration for the shunt amplifier number.
Definition: drv8301.h:311
#define DRV8301_STATUS1_FETLB_OC_BITS
Defines the location of the FETLC_OC (FET Low side, Phase B Over Current) bits in the Status 1 regist...
Definition: drv8301.h:100
DRV_SPI_8301_CTRL1_t_ Ctrl_Reg_1
Definition: drv8301.h:409
void DRV8301_setSpiHandle(DRV8301_Handle handle, SPI_Handle spiHandle)
Sets the SPI handle in the DRV8301.
Definition: drv8301.c:306
DRV8301_PeakCurrent_e DRV8301_getPeakCurrent(DRV8301_Handle handle)
Gets the peak current value.
Definition: drv8301.c:219
uint16_t DRV8301_Word_t
Defines the DRV8301 Word type.
Definition: drv8301.h:435
void DRV8301_setGpioNumber(DRV8301_Handle handle, GPIO_Number_e gpioNumber)
Sets the GPIO number in the DRV8301.
Definition: drv8301.c:295
void GPIO_setHigh(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Sets the specified general purpose I/O (GPIO) signal high.
Definition: gpio.c:215
Defines the DRV8301 object.
Definition: drv8301.h:418
DRV8301_DcCalMode_e DC_CAL_CH1p2
Definition: drv8301.h:400
Shunt amplifier 1 connected to load via input pins.
Definition: drv8301.h:202
DRV8301_VdsLevel_e OC_ADJ_SET
Definition: drv8301.h:392
void DRV8301_writeSpi(DRV8301_Handle handle, const DRV8301_RegName_e regName, const uint16_t data)
Writes data to the DRV8301 register.
Definition: drv8301.c:589
DRV8301_PwmMode_e
Enumeration for the PWM modes.
Definition: drv8301.h:270
DRV8301_Handle DRV8301_init(void *pMemory, const size_t numBytes)
Initializes the DRV8301 object.
Definition: drv8301.c:264
DRV8301_PwmMode_e PWM_MODE
Definition: drv8301.h:390
DRV8301_OcMode_e OC_MODE
Definition: drv8301.h:391
void DRV8301_setOcMode(DRV8301_Handle handle, const DRV8301_OcMode_e mode)
Sets the over current mode.
Definition: drv8301.c:463
void DRV8301_setDcCalMode(DRV8301_Handle handle, const DRV8301_ShuntAmpNumber_e ampNumber, const DRV8301_DcCalMode_e mode)
Sets the DC calibration mode.
Definition: drv8301.c:413
Contains public interface to various functions related to the DRV8301 object.
DRV8301_OcTwMode_e
Enumeration for the Over Current, Temperature Warning modes.
Definition: drv8301.h:250
void DRV8301_setPeakCurrent(DRV8301_Handle handle, const DRV8301_PeakCurrent_e peakCurrent)
Sets the peak current value.
Definition: drv8301.c:526
#define DRV8301_CTRL2_OC_TOFF_BITS
Defines the location of the OC_TOFF bits in the Control 2 register.
Definition: drv8301.h:183
DRV8301_ShuntAmpGain_e GAIN
Definition: drv8301.h:399
DRV8301_Reset_e
Enumeration for the shunt amplifier gains.
Definition: drv8301.h:291
#define DRV8301_CTRL1_OC_MODE_BITS
Defines the location of the OC_MODE bits in the Control 1 register.
Definition: drv8301.h:158
Shunt amplifier number 2.
Definition: drv8301.h:314
report both OT and OC at /OCTW pin
Definition: drv8301.h:252
DRV8301_OcTwMode_e DRV8301_getOcTwMode(DRV8301_Handle handle)
Gets the over current, temperature warning mode.
Definition: drv8301.c:204
static DRV8301_Word_t DRV8301_buildCtrlWord(const DRV8301_CtrlMode_e ctrlMode, const DRV8301_RegName_e regName, const uint16_t data)
Builds the control word.
Definition: drv8301.h:452
SPI_FifoStatus_e SPI_getRxFifoStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) receive FIFO status.
Definition: spi.c:307
DRV8301_ShuntAmpGain_e DRV8301_getShuntAmpGain(DRV8301_Handle handle)
Gets the shunt amplifier gain value.
Definition: drv8301.c:249
#define DRV8301_STATUS2_GVDD_OV_BITS
Defines the location of the GVDD_OV (DRV8301 Vdd, Over Voltage) bits in the Status 2 register...
Definition: drv8301.h:141
DRV8301_OcOffTimeMode_e
Enumeration for the Over Current Off Time modes.
Definition: drv8301.h:241
DRV8301_RegName_e
Enumeration for the register names.
Definition: drv8301.h:279
DRV8301_PwmMode_e DRV8301_getPwmMode(DRV8301_Handle handle)
Gets the PWM mode.
Definition: drv8301.c:234
#define DRV8301_CTRL2_OCTW_SET_BITS
Defines the location of the OCTW_SET bits in the Control 2 register.
Definition: drv8301.h:167
#define DRV8301_CTRL2_GAIN_BITS
Defines the location of the GAIN bits in the Control 2 register.
Definition: drv8301.h:171
#define DRV8301_CTRL1_GATE_CURRENT_BITS
Defines the location of the GATE_CURRENT bits in the Control 1 register.
Definition: drv8301.h:146
#define DRV8301_STATUS1_FETLC_OC_BITS
Defines the location of the FETLC_OC (FET Low side, Phase C Over Current) bits in the Status 1 regist...
Definition: drv8301.h:92
void DRV8301_enable(DRV8301_Handle handle)
Enables the DRV8301.
Definition: drv8301.c:66
#define DRV8301_STATUS1_FETHB_OC_BITS
Defines the location of the FETLC_OC (FET High side, Phase B Over Current) bits in the Status 1 regis...
Definition: drv8301.h:104
#define DRV8301_STATUS2_ID_BITS
Defines the location of the Device ID bits in the Status 2 register.
Definition: drv8301.h:137
DRV_SPI_8301_CTRL2_t_ Ctrl_Reg_2
Definition: drv8301.h:410
uint16_t DRV8301_readSpi(DRV8301_Handle handle, const DRV8301_RegName_e regName)
Reads data from the DRV8301 register.
Definition: drv8301.c:353
#define DRV8301_STATUS1_FETHA_OC_BITS
Defines the location of the FETLC_OC (FET High side, Phase A Over Current) bits in the Status 1 regis...
Definition: drv8301.h:112
void DRV8301_reset(DRV8301_Handle handle)
Resets the DRV8301.
Definition: drv8301.c:395
Control Register 2.
Definition: drv8301.h:284
#define DRV8301_STATUS1_FAULT_BITS
Defines the location of the FAULT bits in the Status 1 register.
Definition: drv8301.h:132
Defines the General Purpose I/O (GPIO) object.
Definition: gpio.h:423
GPIO_Handle gpioHandle
the gpio handle that is connected to the drv8301 enable pin
Definition: drv8301.h:421
current limit when OC detected
Definition: drv8301.h:232
#define DRV8301_CTRL1_PWM_MODE_BITS
Defines the location of the PWM_MODE bits in the Control 1 register.
Definition: drv8301.h:154
DRV8301_DcCalMode_e DRV8301_getDcCalMode(DRV8301_Handle handle, const DRV8301_ShuntAmpNumber_e ampNumber)
Gets the DC calibration mode.
Definition: drv8301.c:93
drv8301 driver peak current 0.25A
Definition: drv8301.h:264
DRV8301_ShuntAmpGain_e
Enumeration for the shunt amplifier gains.
Definition: drv8301.h:300
#define DRV8301_STATUS1_PVDD_UV_BITS
Defines the location of the PVDD_UV (Power supply Vdd, Under Voltage) bits in the Status 1 register...
Definition: drv8301.h:124
static uint16_t SPI_readEmu(SPI_Handle spiHandle)
Reads data from the serial peripheral interface (SPI) during emulation.
Definition: spi.h:532
#define DRV8301_STATUS1_GVDD_UV_BITS
Defines the location of the GVDD_UV (DRV8301 Vdd, Under Voltage) bits in the Status 1 register...
Definition: drv8301.h:128
DRV8301_VdsLevel_e DRV8301_getOcLevel(DRV8301_Handle handle)
Gets the over current level.
Definition: drv8301.c:160
DRV_SPI_8301_Stat2_t_ Stat_Reg_2
Definition: drv8301.h:408
DRV8301_PeakCurrent_e DRV8301_CURRENT
Definition: drv8301.h:388
void DRV8301_setGpioHandle(DRV8301_Handle handle, GPIO_Handle gpioHandle)
Sets the GPIO handle in the DRV8301.
Definition: drv8301.c:284
void DRV8301_setupSpi(DRV8301_Handle handle, DRV_SPI_8301_Vars_t *Spi_8301_Vars)
Initialize the interface to all 8301 SPI variables.
Definition: drv8301.c:695
Denotes the fifo contains 2 words.
Definition: spi.h:282
void SPI_enableRxFifo(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) receive FIFO.
Definition: spi.c:235
Read Mode.
Definition: drv8301.h:193
DRV8301_OcMode_e DRV8301_getOcMode(DRV8301_Handle handle)
Gets the over current mode.
Definition: drv8301.c:174
SPI_Handle spiHandle
the handle for the serial peripheral interface
Definition: drv8301.h:420
void DRV8301_setOcOffTimeMode(DRV8301_Handle handle, const DRV8301_OcOffTimeMode_e mode)
Sets the over current off time mode.
Definition: drv8301.c:484
Status Register 2.
Definition: drv8301.h:282
static void SPI_write(SPI_Handle spiHandle, const uint16_t data)
Writes data to the serial peripheral interface (SPI)
Definition: spi.h:639
GPIO_Number_e gpioNumber
the gpio number that is connected to the drv8301 enable pin
Definition: drv8301.h:422
DRV8301_VdsLevel_e
Enumeration for the Vds level for th over current adjustment.
Definition: drv8301.h:320
DRV8301 Vdd Over Voltage fault.
Definition: drv8301.h:224
Status Register 1.
Definition: drv8301.h:281
DRV8301_PeakCurrent_e
Enumeration for the drv8301 peak current levels.
Definition: drv8301.h:260
void DRV8301_setOcTwMode(DRV8301_Handle handle, const DRV8301_OcTwMode_e mode)
Sets the over current, temperature warning mode.
Definition: drv8301.c:505
void DRV8301_writeData(DRV8301_Handle handle, DRV_SPI_8301_Vars_t *Spi_8301_Vars)
Interface to all 8301 SPI variables.
Definition: drv8301.c:610
DRV8301_OcTwMode_e OCTW_SET
Definition: drv8301.h:398
Write Mode.
Definition: drv8301.h:194
void DRV8301_setOcLevel(DRV8301_Handle handle, const DRV8301_VdsLevel_e VdsLevel)
Sets the over current level in terms of Vds.
Definition: drv8301.c:442
struct _DRV8301_Obj_ * DRV8301_Handle
Defines the DRV8301 handle.
Definition: drv8301.h:430
#define DRV8301_STATUS1_OTW_BITS
Defines the location of the OTW (Over Temperature Warning) bits in the Status 1 register.
Definition: drv8301.h:116
static void DRV8301_resetRxTimeout(DRV8301_Handle handle)
Resets the RX fifo timeout flag.
Definition: drv8301.h:585
Shunt amplifier 2 connected to load via input pins.
Definition: drv8301.h:204
SPI_FifoStatus_e
Enumeration to define the serial peripheral interface (SPI) FIFO status.
Definition: spi.h:278
six independent inputs
Definition: drv8301.h:272
void DRV8301_setShuntAmpGain(DRV8301_Handle handle, const DRV8301_ShuntAmpGain_e gain)
Sets the shunt amplifier gain value.
Definition: drv8301.c:568
DRV_SPI_8301_Stat1_t_ Stat_Reg_1
Definition: drv8301.h:407
DRV8301_Reset_e DRV8301_RESET
Definition: drv8301.h:389
#define DRV8301_FAULT_TYPE_MASK
Defines the R/W mask.
Definition: drv8301.h:87
DRV8301_FaultType_e
Enumeration for the fault types.
Definition: drv8301.h:211
bool DRV8301_isReset(DRV8301_Handle handle)
Determines if DRV8301 is in reset.
Definition: drv8301.c:335
#define DRV8301_CTRL2_DC_CAL_1_BITS
Defines the location of the DC_CAL_1 bits in the Control 2 register.
Definition: drv8301.h:175
bool DRV8301_isFault(DRV8301_Handle handle)
Determines if DRV8301 fault has occurred.
Definition: drv8301.c:317
bool RxTimeOut
the timeout flag for the RX fifo
Definition: drv8301.h:423
void SPI_resetRxFifo(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) receive FIFO.
Definition: spi.c:394
#define DRV8301_DATA_MASK
Defines the data mask.
Definition: drv8301.h:77
#define DRV8301_STATUS1_FETLA_OC_BITS
Defines the location of the FETLC_OC (FET Low side, Phase A Over Current) bits in the Status 1 regist...
Definition: drv8301.h:108
#define DRV8301_STATUS1_OTSD_BITS
Defines the location of the OTSD (Over Temperature Shut Down) bits in the Status 1 register...
Definition: drv8301.h:120
#define DRV8301_CTRL1_GATE_RESET_BITS
Defines the location of the GATE_RESET bits in the Control 1 register.
Definition: drv8301.h:150
GPIO_Number_e
Enumeration to define the general purpose I/O (GPIO) numbers.
Definition: gpio.h:361
uint16_t DRV8301_getId(DRV8301_Handle handle)
Gets the device ID.
Definition: drv8301.c:145
DRV8301_OcOffTimeMode_e DRV8301_getOcOffTimeMode(DRV8301_Handle handle)
Gets the over current off time mode.
Definition: drv8301.c:189
Control Register 1.
Definition: drv8301.h:283
DRV8301_OcMode_e
Enumeration for the Over Current modes.
Definition: drv8301.h:230
Denotes the fifo is empty.
Definition: spi.h:280
Vds = 0.730 V.
Definition: drv8301.h:343