MotorWare f2806x Driver API Documentation
pwr.c
Go to the documentation of this file.
1 /* --COPYRIGHT--,BSD
2  * Copyright (c) 2015, Texas Instruments Incorporated
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  *
9  * * Redistributions of source code must retain the above copyright
10  * notice, this list of conditions and the following disclaimer.
11  *
12  * * Redistributions in binary form must reproduce the above copyright
13  * notice, this list of conditions and the following disclaimer in the
14  * documentation and/or other materials provided with the distribution.
15  *
16  * * Neither the name of Texas Instruments Incorporated nor the names of
17  * its contributors may be used to endorse or promote products derived
18  * from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  * --/COPYRIGHT--*/
37 
38 
39 // **************************************************************************
40 // the includes
41 
43 
44 
45 // **************************************************************************
46 // the defines
47 
48 
49 // **************************************************************************
50 // the globals
51 
52 
53 // **************************************************************************
54 // the functions
55 
56 
58 {
59  PWR_Obj *pwr = (PWR_Obj *)pwrHandle;
60 
61 
62  // set the bits
64 
65  return;
66 } // end of PWR_disableBrownOutReset() function
67 
68 
70 {
71  PWR_Obj *pwr = (PWR_Obj *)pwrHandle;
72 
73 
75 
76  // clear the bits
77  pwr->LPMCR0 &= (~PWR_LPMCR0_WDINTE_BITS);
78 
80 
81  return;
82 } // end of PWR_disableWatchDogInt() function
83 
84 
86 {
87  PWR_Obj *pwr = (PWR_Obj *)pwrHandle;
88 
89 
90  // clear the bits
91  pwr->BORCFG &= (~PWR_BORCFG_BORENZ_BITS);
92 
93  return;
94 } // end of PWR_enableBrownOutReset() function
95 
96 
98 {
99  PWR_Obj *pwr = (PWR_Obj *)pwrHandle;
100 
101 
103 
104  // set the bits
105  pwr->LPMCR0 |= (uint16_t)(PWR_LPMCR0_WDINTE_BITS);
106 
108 
109  return;
110 } // end of PWR_enableWatchDogInt() function
111 
112 
113 PWR_Handle PWR_init(void *pMemory, const size_t numBytes)
114 {
115  PWR_Handle pwrHandle;
116 
117 
118  if(numBytes < sizeof(PWR_Obj))
119  return((PWR_Handle)NULL);
120 
121  // assign the handle
122  pwrHandle = (PWR_Handle)pMemory;
123 
124  return(pwrHandle);
125 } // end of PWR_init() function
126 
127 
128 void PWR_setLowPowerMode(PWR_Handle pwrHandle, const PWR_LowPowerMode_e lowPowerMode)
129 {
130  PWR_Obj *pwr = (PWR_Obj *)pwrHandle;
131 
132 
134 
135  // set the bits
136  // clear the bits
137  pwr->LPMCR0 &= (~PWR_LPMCR0_LPM_BITS);
138 
139  // set the bits
140  pwr->LPMCR0 |= lowPowerMode;
141 
143 
144  return;
145 } // end of PWR_enableBrownOutReset() function
146 
147 
148 void PWR_setNumStandByClocks(PWR_Handle pwrHandle, const PWR_NumStandByClocks_e numClkCycles)
149 {
150  PWR_Obj *pwr = (PWR_Obj *)pwrHandle;
151 
152 
154 
155  // clear the bits
157 
158  // set the bits
159  pwr->LPMCR0 |= numClkCycles;
160 
162 
163  return;
164 } // end of PWR_setNumStandByClocks() function
165 
166 
167 // end of file
#define DISABLE_PROTECTED_REGISTER_WRITE_MODE
Define to disable protected register writes.
Definition: cpu.h:101
volatile uint16_t BORCFG
BOR (Brown Out Reset) Configuration Register.
Definition: pwr.h:177
void PWR_disableWatchDogInt(PWR_Handle pwrHandle)
Disables the watchdog interrupt.
Definition: pwr.c:69
Defines the power (PWR) object.
Definition: pwr.h:175
#define PWR_LPMCR0_QUALSTDBY_BITS
Defines the location of the QUALSTDBY bits in the LPMCR0 register.
Definition: pwr.h:82
#define PWR_LPMCR0_LPM_BITS
Defines the location of the LPM bits in the LPMCR0 register.
Definition: pwr.h:78
PWR_Handle PWR_init(void *pMemory, const size_t numBytes)
Initializes the power (PWR) object handle.
Definition: pwr.c:113
PWR_LowPowerMode_e
Enumeration to define the power (PWR) low power modes.
Definition: pwr.h:94
void PWR_setLowPowerMode(PWR_Handle pwrHandle, const PWR_LowPowerMode_e lowPowerMode)
Sets the low power mode.
Definition: pwr.c:128
volatile uint16_t LPMCR0
Definition: pwr.h:179
#define ENABLE_PROTECTED_REGISTER_WRITE_MODE
Define to allow protected register writes.
Definition: cpu.h:93
void PWR_setNumStandByClocks(PWR_Handle pwrHandle, const PWR_NumStandByClocks_e numClkCycles)
Sets the number of standby clock cycles.
Definition: pwr.c:148
#define PWR_BORCFG_BORENZ_BITS
Defines the location of the BORENZ bits in the BORCFG register.
Definition: pwr.h:73
PWR_NumStandByClocks_e
Enumeration to define the power (PWR) number of standby clock cycles.
Definition: pwr.h:104
#define PWR_LPMCR0_WDINTE_BITS
Defines the location of the WDINTE bits in the LPMCR0 register.
Definition: pwr.h:86
struct _PWR_Obj_ * PWR_Handle
Defines the power (PWR) handle.
Definition: pwr.h:185
void PWR_enableWatchDogInt(PWR_Handle pwrHandle)
Enables the watchdog interrupt.
Definition: pwr.c:97
void PWR_disableBrownOutReset(PWR_Handle pwrHandle)
Disables the brownout reset functions.
Definition: pwr.c:57
Contains public interface to various functions related to the power (PWR) object. ...
void PWR_enableBrownOutReset(PWR_Handle pwrHandle)
Enables the brownout reset functions.
Definition: pwr.c:85