MotorWare f2806x Driver API Documentation
spi.h
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32 #ifndef _SPI_H_
33 #define _SPI_H_
34 
40 
41 
42 // **************************************************************************
43 // the includes
44 
45 // drivers
47 
48 
49 // modules
50 #include "sw/modules/types/src/types.h"
51 
52 
57 
58 
59 
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63 
64 
65 // **************************************************************************
66 // the defines
67 
68 
71 #define SPIA_BASE_ADDR (0x00007040)
72 
75 #define SPIB_BASE_ADDR (0x00007740)
76 
79 #define SPI_SPICCR_CHAR_LENGTH_BITS (15 << 0)
80 
83 #define SPI_SPICCR_SPILBK_BITS ( 1 << 4)
84 
87 #define SPI_SPICCR_CLKPOL_BITS ( 1 << 6)
88 
91 #define SPI_SPICCR_RESET_BITS ( 1 << 7)
92 
95 #define SPI_SPIST_INTFLAG_BITS ( 1 << 6)
96 
99 #define SPI_SPIST_TXBUF_BITS (1 << 5)
100 
103 #define SPI_SPICTL_INT_ENA_BITS (1 << 0)
104 
107 #define SPI_SPICTL_TALK_BITS (1 << 1)
108 
111 #define SPI_SPICTL_MODE_BITS (1 << 2)
112 
115 #define SPI_SPICTL_CLK_PHASE_BITS (1 << 3)
116 
119 #define SPI_SPICTL_OVRRUN_INT_ENA_BITS (1 << 4)
120 
121 
124 #define SPI_SPIFFRX_IL_BITS (31 << 0)
125 
128 #define SPI_SPIFFRX_IENA_BITS ( 1 << 5)
129 
132 #define SPI_SPIFFRX_INTCLR_BITS ( 1 << 6)
133 
136 #define SPI_SPIFFRX_INT_BITS ( 1 << 7)
137 
140 #define SPI_SPIFFRX_FIFO_ST_BITS (31 << 8)
141 
144 #define SPI_SPIFFRX_FIFO_RESET_BITS ( 1 << 13)
145 
148 #define SPI_SPIFFRX_FIFO_OVFCLR_BITS ( 1 << 14)
149 
152 #define SPI_SPIFFRX_FIFO_OVF_BITS ( 1 << 15)
153 
154 
157 #define SPI_SPIFFTX_IL_BITS (31 << 0)
158 
161 #define SPI_SPIFFTX_IENA_BITS ( 1 << 5)
162 
165 #define SPI_SPIFFTX_INTCLR_BITS ( 1 << 6)
166 
169 #define SPI_SPIFFTX_INT_BITS ( 1 << 7)
170 
173 #define SPI_SPIFFTX_FIFO_ST_BITS (31 << 8)
174 
177 #define SPI_SPIFFTX_FIFO_RESET_BITS ( 1 << 13)
178 
181 #define SPI_SPIFFTX_FIFO_ENA_BITS ( 1 << 14)
182 
185 #define SPI_SPIFFTX_CHAN_RESET_BITS ( 1 << 15)
186 
187 
190 #define SPI_SPIPRI_SUSP_BITS ( 3 << 4)
191 
194 #define SPI_SPIPRI_STE_INV_BITS ( 1 << 1)
195 
198 #define SPI_SPIPRI_TRIWIRE ( 1 << 0)
199 
200 
201 // **************************************************************************
202 // the typedefs
203 
206 typedef enum
207 {
211 
212 
215 typedef enum
216 {
234 
235 
238 typedef enum
239 {
243 
244 
247 typedef enum
248 {
252 
253 
254 
257 typedef enum
258 {
259  SPI_Mode_Slave=(0<<2),
261 } SPI_Mode_e;
262 
263 
266 typedef enum
267 {
274 
275 
278 typedef enum
279 {
286 
287 
290 typedef enum
291 {
296 
297 
300 typedef enum
301 {
305 
306 
309 typedef enum
310 {
313 } SPI_SteInv_e;
314 
315 
318 typedef enum
319 {
322 } SPI_TriWire_e;
323 
324 
327 typedef enum
328 {
332 
333 
336 typedef enum
337 {
338  SPI_TxSuspend_00=(0x0<<4),
339  SPI_TxSuspend_10=(0x2<<4),
342 
343 
346 typedef struct _SPI_Obj_
347 {
348  volatile uint16_t SPICCR;
349  volatile uint16_t SPICTL;
350  volatile uint16_t SPIST;
351  volatile uint16_t rsvd_1;
352  volatile uint16_t SPIBRR;
353  volatile uint16_t rsvd_2;
354  volatile uint16_t SPIEMU;
355  volatile uint16_t SPIRXBUF;
356  volatile uint16_t SPITXBUF;
357  volatile uint16_t SPIDAT;
358  volatile uint16_t SPIFFTX;
359  volatile uint16_t SPIFFRX;
360  volatile uint16_t SPIFFCT;
361  volatile uint16_t rsvd_3[2];
362  volatile uint16_t SPIPRI;
363 } SPI_Obj;
364 
365 
368 typedef struct _SPI_Obj_ *SPI_Handle;
369 
370 
371 // **************************************************************************
372 // the globals
373 
374 
375 // **************************************************************************
376 // the function prototypes
377 
380 extern void SPI_clearRxFifoOvf(SPI_Handle spiHandle);
381 
382 
385 extern void SPI_clearRxFifoInt(SPI_Handle spiHandle);
386 
387 
390 extern void SPI_clearTxFifoInt(SPI_Handle spiHandle);
391 
392 
395 extern void SPI_disableInt(SPI_Handle spiHandle);
396 
397 
400 extern void SPI_disableLoopBack(SPI_Handle spiHandle);
401 
402 
405 extern void SPI_disableOverRunInt(SPI_Handle spiHandle);
406 
407 
410 extern void SPI_disableRxFifoInt(SPI_Handle spiHandle);
411 
412 
415 extern void SPI_disableTx(SPI_Handle spiHandle);
416 
417 
420 extern void SPI_disableTxFifoEnh(SPI_Handle spiHandle);
421 
422 
425 extern void SPI_disableTxFifoInt(SPI_Handle spiHandle);
426 
427 
430 extern void SPI_enable(SPI_Handle spiHandle);
431 
432 
435 extern void SPI_enableChannels(SPI_Handle spiHandle);
436 
437 
440 extern void SPI_enableInt(SPI_Handle spiHandle);
441 
442 
445 extern void SPI_enableLoopBack(SPI_Handle spiHandle);
446 
447 
450 extern void SPI_enableOverRunInt(SPI_Handle spiHandle);
451 
452 
455 extern void SPI_enableRxFifo(SPI_Handle spiHandle);
456 
457 
460 extern void SPI_enableRxFifoInt(SPI_Handle spiHandle);
461 
462 
465 extern void SPI_enableTx(SPI_Handle spiHandle);
466 
467 
470 extern void SPI_enableTxFifo(SPI_Handle spiHandle);
471 
472 
475 extern void SPI_enableTxFifoEnh(SPI_Handle spiHandle);
476 
477 
480 extern void SPI_enableTxFifoInt(SPI_Handle spiHandle);
481 
482 
486 extern SPI_FifoStatus_e SPI_getRxFifoStatus(SPI_Handle spiHandle);
487 
488 
492 extern SPI_FifoStatus_e SPI_getTxFifoStatus(SPI_Handle spiHandle);
493 
494 
498 extern SPI_IntFlagStatus_e SPI_getIntFlagStatus(SPI_Handle spiHandle);
499 
500 
504 extern SPI_TxBufferStatus_e SPI_getTxBufferStatus(SPI_Handle spiHandle);
505 
506 
511 extern SPI_Handle SPI_init(void *pMemory,const size_t numBytes);
512 
513 
517 static inline uint16_t SPI_read(SPI_Handle spiHandle)
518 {
519  SPI_Obj *spi = (SPI_Obj *)spiHandle;
520 
521 
522  // read the data
523  uint16_t data = spi->SPIRXBUF;
524 
525  return(data);
526 } // end of SPI_read() function
527 
528 
532 static inline uint16_t SPI_readEmu(SPI_Handle spiHandle)
533 {
534  SPI_Obj *spi = (SPI_Obj *)spiHandle;
535 
536 
537  // read the data
538  uint16_t data = spi->SPIEMU;
539 
540  return(data);
541 } // end of SPI_readEmu() function
542 
543 
546 extern void SPI_reset(SPI_Handle spiHandle);
547 
548 
551 extern void SPI_resetChannels(SPI_Handle spiHandle);
552 
553 
556 extern void SPI_resetRxFifo(SPI_Handle spiHandle);
557 
558 
561 extern void SPI_resetTxFifo(SPI_Handle spiHandle);
562 
563 
567 extern void SPI_setBaudRate(SPI_Handle spiHandle,const SPI_BaudRate_e baudRate);
568 
569 
573 extern void SPI_setCharLength(SPI_Handle spiHandle,const SPI_CharLength_e length);
574 
575 
579 extern void SPI_setClkPhase(SPI_Handle spiHandle,const SPI_ClkPhase_e clkPhase);
580 
581 
585 extern void SPI_setClkPolarity(SPI_Handle spiHandle,const SPI_ClkPolarity_e polarity);
586 
587 
591 extern void SPI_setMode(SPI_Handle spiHandle,const SPI_Mode_e mode);
592 
593 
597 extern void SPI_setRxFifoIntLevel(SPI_Handle spiHandle,const SPI_FifoLevel_e fifoLevel);
598 
599 
603 extern void SPI_setPriority(SPI_Handle spiHandle,const SPI_Priority_e priority);
604 
605 
609 extern void SPI_setSteInv(SPI_Handle spiHandle,const SPI_SteInv_e steinv);
610 
611 
615 extern void SPI_setSuspend(SPI_Handle spiHandle,const SPI_EmulationSuspend_e emuSuspend);
616 
617 
621 extern void SPI_setTriWire(SPI_Handle spiHandle,const SPI_TriWire_e triwire);
622 
623 
627 extern void SPI_setTxDelay(SPI_Handle spiHandle,const uint_least8_t delay);
628 
629 
633 extern void SPI_setTxFifoIntLevel(SPI_Handle spiHandle,const SPI_FifoLevel_e fifoLevel);
634 
635 
639 static inline void SPI_write(SPI_Handle spiHandle,const uint16_t data)
640 {
641  SPI_Obj *spi = (SPI_Obj *)spiHandle;
642 
643 
644  // set the bits
645  spi->SPITXBUF = data;
646 
647  return;
648 } // end of SPI_write() function
649 
650 
654 static inline void SPI_write8(SPI_Handle spiHandle,const uint16_t data)
655 {
656  SPI_Obj *spi = (SPI_Obj *)spiHandle;
657 
658 
659  // set the bits
660  spi->SPITXBUF = (data & 0xFF) << 8;
661 
662  return;
663 } // end of SPI_write() function
664 
665 #ifdef __cplusplus
666 }
667 #endif // extern "C"
668 
670 #endif // end of _SPI_H_ definition
671 
void SPI_setBaudRate(SPI_Handle spiHandle, const SPI_BaudRate_e baudRate)
Sets the serial peripheral interface (SPI) baud rate.
Definition: spi.c:418
void SPI_disableInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) interrupt.
Definition: spi.c:92
Defines the serial peripheral interface (SPI) object.
Definition: spi.h:346
Denotes transmission or reception completed.
Definition: spi.h:303
void SPI_clearTxFifoInt(SPI_Handle spiHandle)
Clears the Tx FIFO interrupt flag.
Definition: spi.c:80
SPI_TxBufferStatus_e
Enumeration to define the serial peripheral interface (SPI) Tx Buffer Status.
Definition: spi.h:327
void SPI_enableRxFifoInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) receive FIFO interrupt.
Definition: spi.c:247
void SPI_enableTxFifoEnh(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) transmit FIFO enhancements.
Definition: spi.c:283
void SPI_enableChannels(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) transmit and receive channels.
Definition: spi.c:187
Denotes 3 wire SPI mode.
Definition: spi.h:321
Denotes the fifo contains 4 words.
Definition: spi.h:272
static uint16_t SPI_read(SPI_Handle spiHandle)
Reads data from the serial peripheral interface (SPI)
Definition: spi.h:517
Emulation Free run.
Definition: spi.h:340
Emulation Suspend option 2.
Definition: spi.h:339
Denotes a character length of 16 bits.
Definition: spi.h:232
Denotes transmission or reception in progress.
Definition: spi.h:302
void SPI_resetChannels(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) transmit and receive channels.
Definition: spi.c:382
Denotes 1 MBaud.
Definition: spi.h:209
void SPI_disableTxFifoInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) transmit FIFO interrupt.
Definition: spi.c:163
Denotes a character length of 13 bits.
Definition: spi.h:229
Denotes the fifo contains 3 words.
Definition: spi.h:283
void SPI_disableRxFifoInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) receive FIFO interrupt.
Definition: spi.c:127
SPI_TriWire_e
Enumeration to define the tri-wire status.
Definition: spi.h:318
Denotes that the SPICLK signal is delayed by one half-cycle.
Definition: spi.h:241
void SPI_clearRxFifoOvf(SPI_Handle spiHandle)
Clears the Rx FIFO overflow flag.
Definition: spi.c:56
SPI_CharLength_e
Enumeration to define the serial peripheral interface (SPI) character lengths.
Definition: spi.h:215
Denotes the fifo contains 1 word.
Definition: spi.h:269
void SPI_enableInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) interrupt.
Definition: spi.c:199
volatile uint16_t SPITXBUF
SPI Serial Output Buffer Register.
Definition: spi.h:356
Denotes the fifo contains 2 words.
Definition: spi.h:270
SPI_FifoStatus_e SPI_getRxFifoStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) receive FIFO status.
Definition: spi.c:307
volatile uint16_t SPICTL
SPI Operation Control Register.
Definition: spi.h:349
Denotes slave mode.
Definition: spi.h:259
volatile uint16_t rsvd_3[2]
Reserved.
Definition: spi.h:361
void SPI_setClkPolarity(SPI_Handle spiHandle, const SPI_ClkPolarity_e polarity)
Sets the serial peripheral interface (SPI) clock polarity.
Definition: spi.c:455
volatile uint16_t SPIDAT
SPI Serial Data Register.
Definition: spi.h:357
SPI_FifoStatus_e SPI_getTxFifoStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) transmit FIFO status.
Definition: spi.c:319
volatile uint16_t SPIRXBUF
SPI Serial Input Buffer Register.
Definition: spi.h:355
SPI_Mode_e
Enumeration to define the serial peripheral interface (SPI) network mode control. ...
Definition: spi.h:257
void SPI_disableLoopBack(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) loop back mode.
Definition: spi.c:104
Denotes active low STE pin.
Definition: spi.h:311
Stops immediately after EMU halt.
Definition: spi.h:292
Denotes a character length of 6 bits.
Definition: spi.h:222
Denotes a character length of 14 bits.
Definition: spi.h:230
void SPI_enableTxFifo(SPI_Handle spiHandle)
Re-enables the serial peripheral interface (SPI) transmit FIFO.
Definition: spi.c:271
void SPI_enableLoopBack(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) loop back mode.
Definition: spi.c:211
Denotes a character length of 1 bit.
Definition: spi.h:217
Doesn't stop after EMU halt.
Definition: spi.h:293
volatile uint16_t SPIST
SPI Status Register.
Definition: spi.h:350
Denotes a character length of 10 bits.
Definition: spi.h:226
void SPI_setSuspend(SPI_Handle spiHandle, const SPI_EmulationSuspend_e emuSuspend)
Sets the serial peripheral interface (SPI) emulation suspend bits.
Definition: spi.c:524
Denotes the fifo contains 4 words.
Definition: spi.h:284
Denotes a character length of 15 bits.
Definition: spi.h:231
Denotes that the tx data is output on the falling edge, the rx data is latched on the rising edge...
Definition: spi.h:250
void SPI_enableTxFifoInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) transmit FIFO interrupt.
Definition: spi.c:295
Denotes a character length of 7 bits.
Definition: spi.h:223
struct _SPI_Obj_ SPI_Obj
Defines the serial peripheral interface (SPI) object.
SPI_EmulationSuspend_e
Enumeration to define the serial peripheral interface (SPI) Enumeration suspend bits.
Definition: spi.h:336
void SPI_setTriWire(SPI_Handle spiHandle, const SPI_TriWire_e triwire)
Sets SPI port operating mode.
Definition: spi.c:538
void SPI_disableOverRunInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) over-run interrupt.
Definition: spi.c:116
Stops after EMU halt and next rx/rx sequence.
Definition: spi.h:294
Denotes a character length of 9 bits.
Definition: spi.h:225
Denotes 4 wire SPI mode.
Definition: spi.h:320
void SPI_setRxFifoIntLevel(SPI_Handle spiHandle, const SPI_FifoLevel_e fifoLevel)
Sets the serial peripheral interface (SPI) receive FIFO level for generating an interrupt.
Definition: spi.c:496
volatile uint16_t SPIEMU
SPI Emulation Buffer Register.
Definition: spi.h:354
void SPI_resetTxFifo(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) transmit FIFO.
Definition: spi.c:406
SPI_Handle SPI_init(void *pMemory, const size_t numBytes)
Initializes the serial peripheral interface (SPI) object handle.
Definition: spi.c:355
Denotes that the Tx buffer is empty.
Definition: spi.h:329
Emulation Suspend option 1.
Definition: spi.h:338
void SPI_reset(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI)
Definition: spi.c:370
Denotes the fifo contains 1 word.
Definition: spi.h:281
Denotes a character length of 8 bits.
Definition: spi.h:224
Denotes that the tx data is output on the rising edge, the rx data is latched on the falling edge...
Definition: spi.h:249
static uint16_t SPI_readEmu(SPI_Handle spiHandle)
Reads data from the serial peripheral interface (SPI) during emulation.
Definition: spi.h:532
void SPI_disableTxFifoEnh(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) transmit FIFO enhancements.
Definition: spi.c:151
SPI_IntFlagStatus_e
Enumeration to define the serial peripheral interface (SPI) Interrupt Flag Status.
Definition: spi.h:300
struct _SPI_Obj_ * SPI_Handle
Defines the serial peripheral interface (SPI) handle.
Definition: spi.h:368
Contains public interface to various functions related to the central processing unit (CPU) object...
void SPI_enable(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI)
Definition: spi.c:175
SPI_FifoLevel_e
Enumeration to define the serial peripheral interface (SPI) FIFO level.
Definition: spi.h:266
volatile uint16_t SPIFFRX
SPI FIFO Receive Register.
Definition: spi.h:359
Denotes the fifo contains 2 words.
Definition: spi.h:282
Denotes master mode.
Definition: spi.h:260
void SPI_enableRxFifo(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) receive FIFO.
Definition: spi.c:235
Denotes a character length of 5 bits.
Definition: spi.h:221
volatile uint16_t rsvd_1
Reserved.
Definition: spi.h:351
Denotes a character length of 11 bits.
Definition: spi.h:227
volatile uint16_t SPICCR
SPI Configuration Control Register.
Definition: spi.h:348
volatile uint16_t rsvd_2
Reserved.
Definition: spi.h:353
static void SPI_write(SPI_Handle spiHandle, const uint16_t data)
Writes data to the serial peripheral interface (SPI)
Definition: spi.h:639
void SPI_setTxDelay(SPI_Handle spiHandle, const uint_least8_t delay)
Sets the serial peripheral interface (SPI) transmit delay.
Definition: spi.c:551
SPI_SteInv_e
Enumeration to define the the serial peripheral interface (SPI) STE pin status.
Definition: spi.h:309
void SPI_clearRxFifoInt(SPI_Handle spiHandle)
Clears the Rx FIFO interrupt flag.
Definition: spi.c:68
void SPI_enableOverRunInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) over-run interrupt.
Definition: spi.c:223
void SPI_disableTx(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) master/slave transmit mode.
Definition: spi.c:139
SPI_ClkPolarity_e
Enumeration to define the serial peripheral interface (SPI) clock polarity for the input and output d...
Definition: spi.h:247
void SPI_enableTx(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) masater/slave transmit mode.
Definition: spi.c:259
Denotes that the Tx buffer is full.
Definition: spi.h:330
void SPI_setSteInv(SPI_Handle spiHandle, const SPI_SteInv_e steinv)
Controls pin inversion of STE pin.
Definition: spi.c:511
SPI_FifoStatus_e
Enumeration to define the serial peripheral interface (SPI) FIFO status.
Definition: spi.h:278
volatile uint16_t SPIBRR
SPI Baud Rate Register.
Definition: spi.h:352
Denotes a normal clock scheme.
Definition: spi.h:240
SPI_BaudRate_e
Enumeration to define the serial peripheral interface (SPI) baud rates.
Definition: spi.h:206
Denotes a character length of 3 bits.
Definition: spi.h:219
SPI_ClkPhase_e
Enumeration to define the serial peripheral interface (SPI) clock phase.
Definition: spi.h:238
volatile uint16_t SPIPRI
SPI Priority Register.
Definition: spi.h:362
void SPI_setClkPhase(SPI_Handle spiHandle, const SPI_ClkPhase_e clkPhase)
Sets the serial peripheral interface (SPI) clock phase.
Definition: spi.c:443
SPI_Priority_e
Enumeration to define the the serial peripheral interface (SPI) priority.
Definition: spi.h:290
Denotes the fifo contains 3 words.
Definition: spi.h:271
Denotes active high STE pin.
Definition: spi.h:312
volatile uint16_t SPIFFCT
SPI FIFO Control Register.
Definition: spi.h:360
void SPI_resetRxFifo(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) receive FIFO.
Definition: spi.c:394
Denotes the fifo is empty.
Definition: spi.h:268
static void SPI_write8(SPI_Handle spiHandle, const uint16_t data)
Writes a byte of data to the serial peripheral interface (SPI)
Definition: spi.h:654
void SPI_setCharLength(SPI_Handle spiHandle, const SPI_CharLength_e length)
Sets the serial peripheral interface (SPI) character length.
Definition: spi.c:428
Denotes a character length of 4 bits.
Definition: spi.h:220
void SPI_setMode(SPI_Handle spiHandle, const SPI_Mode_e mode)
Sets the serial peripheral interface (SPI) network mode.
Definition: spi.c:470
volatile uint16_t SPIFFTX
SPI FIFO Transmit Register.
Definition: spi.h:358
Denotes a character length of 12 bits.
Definition: spi.h:228
Denotes a character length of 2 bits.
Definition: spi.h:218
SPI_TxBufferStatus_e SPI_getTxBufferStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) Tx Buffer status.
Definition: spi.c:343
void SPI_setPriority(SPI_Handle spiHandle, const SPI_Priority_e priority)
Sets the priority of the SPI port vis-a-vis the EMU.
Definition: spi.c:482
Denotes the fifo is empty.
Definition: spi.h:280
SPI_IntFlagStatus_e SPI_getIntFlagStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) Interrupt Flag status.
Definition: spi.c:331
void SPI_setTxFifoIntLevel(SPI_Handle spiHandle, const SPI_FifoLevel_e fifoLevel)
Sets the serial peripheral interface (SPI) transmit FIFO level for generating an interrupt.
Definition: spi.c:563