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spi.c
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37
38
39 // **************************************************************************
40 // the includes
41
42 #include "sw/drivers/spi/src/32b/f28x/f2806x/spi.h"
43
44
45 // **************************************************************************
46 // the defines
47
48
49 // **************************************************************************
50 // the globals
51
52
53 // **************************************************************************
54 // the functions
55
56 void SPI_clearRxFifoOvf(SPI_Handle spiHandle)
57 {
58 SPI_Obj *spi = (SPI_Obj *)spiHandle;
59
60
61 // set the bits
62 spi->SPIFFRX |= SPI_SPIFFRX_FIFO_OVFCLR_BITS;
63
64 return;
65 } // end of SPI_clearRxFifoOvf() function
66
67
68 void SPI_clearRxFifoInt(SPI_Handle spiHandle)
69 {
70 SPI_Obj *spi = (SPI_Obj *)spiHandle;
71
72
73 // set the bits
74 spi->SPIFFRX |= SPI_SPIFFRX_INTCLR_BITS;
75
76 return;
77 } // end of SPI_clearRxFifoInt() function
78
79
80 void SPI_clearTxFifoInt(SPI_Handle spiHandle)
81 {
82 SPI_Obj *spi = (SPI_Obj *)spiHandle;
83
84
85 // set the bits
86 spi->SPIFFTX |= SPI_SPIFFTX_INTCLR_BITS;
87
88 return;
89 } // end of SPI_clearTxFifoInt() function
90
91
92 void SPI_disableInt(SPI_Handle spiHandle)
93 {
94 SPI_Obj *spi = (SPI_Obj *)spiHandle;
95
96
97 // clear the bits
98 spi->SPICTL &= (~SPI_SPICTL_INT_ENA_BITS);
99
100 return;
101 } // end of SPI_disableInt() function
102
103
104 void SPI_disableLoopBack(SPI_Handle spiHandle)
105 {
106 SPI_Obj *spi = (SPI_Obj *)spiHandle;
107
108
109 // clear the bits
110 spi->SPICCR &= (~SPI_SPICCR_SPILBK_BITS);
111
112 return;
113 } // end of SPI_disableLoopBack() function
114
115
116 void SPI_disableOverRunInt(SPI_Handle spiHandle)
117 {
118 SPI_Obj *spi = (SPI_Obj *)spiHandle;
119
120 // clear the bits
121 spi->SPICTL &= (~SPI_SPICTL_OVRRUN_INT_ENA_BITS);
122
123 return;
124 } // end of SPI_disableOverRunInt() function
125
126
127 void SPI_disableRxFifoInt(SPI_Handle spiHandle)
128 {
129 SPI_Obj *spi = (SPI_Obj *)spiHandle;
130
131
132 // clear the bits
133 spi->SPIFFRX &= (~SPI_SPIFFRX_IENA_BITS);
134
135 return;
136 } // end of SPI_disableRxFifoInt() function
137
138
139 void SPI_disableTx(SPI_Handle spiHandle)
140 {
141 SPI_Obj *spi = (SPI_Obj *)spiHandle;
142
143
144 // clear the bits
145 spi->SPICTL &= (~SPI_SPICTL_TALK_BITS);
146
147 return;
148 } // end of SPI_disableTx() function
149
150
151 void SPI_disableTxFifoEnh(SPI_Handle spiHandle)
152 {
153 SPI_Obj *spi = (SPI_Obj *)spiHandle;
154
155
156 // clear the bits
157 spi->SPIFFTX &= (~SPI_SPIFFTX_FIFO_ENA_BITS);
158
159 return;
160 } // end of SPI_disableTxFifo() function
161
162
163 void SPI_disableTxFifoInt(SPI_Handle spiHandle)
164 {
165 SPI_Obj *spi = (SPI_Obj *)spiHandle;
166
167
168 // clear the bits
169 spi->SPIFFTX &= (~SPI_SPIFFTX_IENA_BITS);
170
171 return;
172 } // end of SPI_disableTxFifoInt() function
173
174
175 void SPI_enable(SPI_Handle spiHandle)
176 {
177 SPI_Obj *spi = (SPI_Obj *)spiHandle;
178
179
180 // set the bits
181 spi->SPICCR |= SPI_SPICCR_RESET_BITS;
182
183 return;
184 } // end of SPI_enable() function
185
186
187 void SPI_enableChannels(SPI_Handle spiHandle)
188 {
189 SPI_Obj *spi = (SPI_Obj *)spiHandle;
190
191
192 // set the bits
193 spi->SPIFFTX |= (uint16_t)SPI_SPIFFTX_CHAN_RESET_BITS;
194
195 return;
196 } // SPI_enableChannels() function
197
198
199 void SPI_enableInt(SPI_Handle spiHandle)
200 {
201 SPI_Obj *spi = (SPI_Obj *)spiHandle;
202
203
204 // set the bits
205 spi->SPICTL |= SPI_SPICTL_INT_ENA_BITS;
206
207 return;
208 } // end of SPI_enableInt() function
209
210
211 void SPI_enableLoopBack(SPI_Handle spiHandle)
212 {
213 SPI_Obj *spi = (SPI_Obj *)spiHandle;
214
215
216 // set the bits
217 spi->SPICCR |= SPI_SPICCR_SPILBK_BITS;
218
219 return;
220 } // end of SPI_enableLoopBack() function
221
222
223 void SPI_enableOverRunInt(SPI_Handle spiHandle)
224 {
225 SPI_Obj *spi = (SPI_Obj *)spiHandle;
226
227
228 // set the bits
229 spi->SPICTL |= SPI_SPICTL_OVRRUN_INT_ENA_BITS;
230
231 return;
232 } // end of SPI_enableOverRunInt() function
233
234
235 void SPI_enableRxFifo(SPI_Handle spiHandle)
236 {
237 SPI_Obj *spi = (SPI_Obj *)spiHandle;
238
239
240 // set the bits
241 spi->SPIFFRX |= SPI_SPIFFRX_FIFO_RESET_BITS;
242
243 return;
244 } // end of SPI_enableRxFifo() function
245
246
247 void SPI_enableRxFifoInt(SPI_Handle spiHandle)
248 {
249 SPI_Obj *spi = (SPI_Obj *)spiHandle;
250
251
252 // set the bits
253 spi->SPIFFRX |= SPI_SPIFFRX_IENA_BITS;
254
255 return;
256 } // end of SPI_enableRxFifoInt() function
257
258
259 void SPI_enableTx(SPI_Handle spiHandle)
260 {
261 SPI_Obj *spi = (SPI_Obj *)spiHandle;
262
263
264 // set the bits
265 spi->SPICTL |= SPI_SPICTL_TALK_BITS;
266
267 return;
268 } // end of SPI_enableTx() function
269
270
271 void SPI_enableTxFifo(SPI_Handle spiHandle)
272 {
273 SPI_Obj *spi = (SPI_Obj *)spiHandle;
274
275
276 // set the bits
277 spi->SPIFFTX |= SPI_SPIFFTX_FIFO_RESET_BITS;
278
279 return;
280 } // end of SPI_enableTxFifo() function
281
282
283 void SPI_enableTxFifoEnh(SPI_Handle spiHandle)
284 {
285 SPI_Obj *spi = (SPI_Obj *)spiHandle;
286
287
288 // set the bits
289 spi->SPIFFTX |= SPI_SPIFFTX_FIFO_ENA_BITS;
290
291 return;
292 } // end of SPI_enableTxFifo() function
293
294
295 void SPI_enableTxFifoInt(SPI_Handle spiHandle)
296 {
297 SPI_Obj *spi = (SPI_Obj *)spiHandle;
298
299
300 // set the bits
301 spi->SPIFFTX |= SPI_SPIFFTX_IENA_BITS;
302
303 return;
304 } // end of SPI_enableTxFifoInt() function
305
306
307 SPI_FifoStatus_e SPI_getRxFifoStatus(SPI_Handle spiHandle)
308 {
309 SPI_Obj *spi = (SPI_Obj *)spiHandle;
310
311
312 // get the status
313 SPI_FifoStatus_e status = (SPI_FifoStatus_e)((spi->SPIFFRX) & SPI_SPIFFRX_FIFO_ST_BITS);
314
315 return(status);
316 } // SPI_getRxFifoStatus() function
317
318
319 SPI_FifoStatus_e SPI_getTxFifoStatus(SPI_Handle spiHandle)
320 {
321 SPI_Obj *spi = (SPI_Obj *)spiHandle;
322
323
324 // get the status
325 SPI_FifoStatus_e status = (SPI_FifoStatus_e)(spi->SPIFFTX & SPI_SPIFFTX_FIFO_ST_BITS);
326
327 return(status);
328 } // SPI_getTxFifoStatus() function
329
330
331 SPI_IntFlagStatus_e SPI_getIntFlagStatus(SPI_Handle spiHandle)
332 {
333 SPI_Obj *spi = (SPI_Obj *)spiHandle;
334
335
336 // get the status
337 SPI_IntFlagStatus_e status = (SPI_IntFlagStatus_e)(spi->SPIST & SPI_SPIST_INTFLAG_BITS);
338
339 return(status);
340 } // SPI_getIntFlagStatus() function
341
342
343 SPI_TxBufferStatus_e SPI_getTxBufferStatus(SPI_Handle spiHandle)
344 {
345 SPI_Obj *spi = (SPI_Obj *)spiHandle;
346
347
348 // get the status
349 SPI_TxBufferStatus_e status = (SPI_TxBufferStatus_e)(spi->SPIST & SPI_SPIST_TXBUF_BITS);
350
351 return(status);
352 } // SPI_getTxBufferStatus() function
353
354
355 SPI_Handle SPI_init(void *pMemory,const size_t numBytes)
356 {
357 SPI_Handle spiHandle;
358
359
360 if(numBytes < sizeof(SPI_Obj))
361 return((SPI_Handle)NULL);
362
363 // assign the handle
364 spiHandle = (SPI_Handle)pMemory;
365
366 return(spiHandle);
367 } // end of SPI_init() function
368
369
370 void SPI_reset(SPI_Handle spiHandle)
371 {
372 SPI_Obj *spi = (SPI_Obj *)spiHandle;
373
374
375 // clear the bits
376 spi->SPICCR &= (~SPI_SPICCR_RESET_BITS);
377
378 return;
379 } // end of SPI_reset() function
380
381
382 void SPI_resetChannels(SPI_Handle spiHandle)
383 {
384 SPI_Obj *spi = (SPI_Obj *)spiHandle;
385
386
387 // clear the bits
388 spi->SPIFFTX &= (~SPI_SPIFFTX_CHAN_RESET_BITS);
389
390 return;
391 } // SPI_resetChannels() function
392
393
394 void SPI_resetRxFifo(SPI_Handle spiHandle)
395 {
396 SPI_Obj *spi = (SPI_Obj *)spiHandle;
397
398
399 // clear the bits
400 spi->SPIFFRX &= (~SPI_SPIFFRX_FIFO_RESET_BITS);
401
402 return;
403 } // end of SPI_resetRxFifo() function
404
405
406 void SPI_resetTxFifo(SPI_Handle spiHandle)
407 {
408 SPI_Obj *spi = (SPI_Obj *)spiHandle;
409
410
411 // clear the bits
412 spi->SPIFFTX &= (~SPI_SPIFFTX_FIFO_RESET_BITS);
413
414 return;
415 } // end of SPI_resetTxFifo() function
416
417
418 void SPI_setBaudRate(SPI_Handle spiHandle,const SPI_BaudRate_e baudRate)
419 {
420 SPI_Obj *spi = (SPI_Obj *)spiHandle;
421
422 // set the bits
423 spi->SPIBRR = baudRate;
424 return;
425 } // end of SPI_setBaudRate() function
426
427
428 void SPI_setCharLength(SPI_Handle spiHandle,const SPI_CharLength_e length)
429 {
430 SPI_Obj *spi = (SPI_Obj *)spiHandle;
431
432
433 // clear the bits
434 spi->SPICCR &= (~SPI_SPICCR_CHAR_LENGTH_BITS);
435
436 // set the bits
437 spi->SPICCR |= length;
438
439 return;
440 } // end of SPI_setCharLength() function
441
442
443 void SPI_setClkPhase(SPI_Handle spiHandle,const SPI_ClkPhase_e clkPhase)
444 {
445 SPI_Obj *spi = (SPI_Obj *)spiHandle;
446
447
448 // set the value
449 spi->SPICTL |= clkPhase;
450
451 return;
452 } // end of SPI_setClkPhase() function
453
454
455 void SPI_setClkPolarity(SPI_Handle spiHandle,const SPI_ClkPolarity_e polarity)
456 {
457 SPI_Obj *spi = (SPI_Obj *)spiHandle;
458
459
460 // clear the bits
461 spi->SPICCR &= (~SPI_SPICCR_CLKPOL_BITS);
462
463 // set the bits
464 spi->SPICCR |= polarity;
465
466 return;
467 } // end of SPI_setClkPolarity() function
468
469
470 void SPI_setMode(SPI_Handle spiHandle,const SPI_Mode_e mode)
471 {
472 SPI_Obj *spi = (SPI_Obj *)spiHandle;
473
474
475 // set the bits
476 spi->SPICTL |= mode;
477
478 return;
479 } // end of SPI_setMode() function
480
481
482 void SPI_setPriority(SPI_Handle spiHandle,const SPI_Priority_e priority)
483 {
484 SPI_Obj *spi = (SPI_Obj *)spiHandle;
485
486
487 // clear the field
488 spi->SPIPRI &= (~SPI_SPIPRI_SUSP_BITS);
489 // set the bits
490 spi->SPIPRI |= priority;
491
492 return;
493 } // SPI_setPriority() function
494
495
496 void SPI_setRxFifoIntLevel(SPI_Handle spiHandle,const SPI_FifoLevel_e fifoLevel)
497 {
498 SPI_Obj *spi = (SPI_Obj *)spiHandle;
499
500
501 // clear the value
502 spi->SPIFFRX &= (~SPI_SPIFFRX_IL_BITS);
503
504 // set the bits
505 spi->SPIFFRX |= fifoLevel;
506
507 return;
508 } // end of SPI_setRxFifoIntLevel() function
509
510
511 void SPI_setSteInv(SPI_Handle spiHandle,const SPI_SteInv_e steinv)
512 {
513 SPI_Obj *spi = (SPI_Obj *)spiHandle;
514
515 // clear the field
516 spi->SPIPRI &= (~SPI_SPIPRI_STE_INV_BITS);
517 // set the bits
518 spi->SPIPRI |= steinv;
519
520 return;
521 } // SPI_setSteInv() function
522
523
524 void SPI_setSuspend(SPI_Handle spiHandle,const SPI_EmulationSuspend_e emuSuspend)
525 {
526 SPI_Obj *spi = (SPI_Obj *)spiHandle;
527
528 // clear the field
529 spi->SPIPRI &= (~SPI_SPIPRI_SUSP_BITS);
530
531 // set the bits
532 spi->SPIPRI |= emuSuspend;
533
534 return;
535 } // SPI_setSuspend() function
536
537
538 void SPI_setTriWire(SPI_Handle spiHandle,const SPI_TriWire_e triwire)
539 {
540 SPI_Obj *spi = (SPI_Obj *)spiHandle;
541
542 // clear the field
543 spi->SPIPRI &= (~SPI_SPIPRI_TRIWIRE);
544 // set the bits
545 spi->SPIPRI |= triwire;
546
547 return;
548 } // SPI_setTriWire() function
549
550
551 void SPI_setTxDelay(SPI_Handle spiHandle,const uint_least8_t delay)
552 {
553 SPI_Obj *spi = (SPI_Obj *)spiHandle;
554
555
556 // set the bits
557 spi->SPIFFCT = delay;
558
559 return;
560 } // end of SPI_setTxDelay() function
561
562
563 void SPI_setTxFifoIntLevel(SPI_Handle spiHandle,const SPI_FifoLevel_e fifoLevel)
564 {
565 SPI_Obj *spi = (SPI_Obj *)spiHandle;
566
567
568 // clear the value
569 spi->SPIFFTX &= (~SPI_SPIFFTX_IL_BITS);
570
571 // set the bits
572 spi->SPIFFTX |= fifoLevel;
573
574 return;
575 } // end of SPI_setTxFifoIntLevel() function
576
577
578 // end of file
SPI_setBaudRate
void SPI_setBaudRate(SPI_Handle spiHandle, const SPI_BaudRate_e baudRate)
Sets the serial peripheral interface (SPI) baud rate.
Definition: spi.c:418
SPI_disableInt
void SPI_disableInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) interrupt.
Definition: spi.c:92
_SPI_Obj_
Defines the serial peripheral interface (SPI) object.
Definition: spi.h:346
SPI_clearTxFifoInt
void SPI_clearTxFifoInt(SPI_Handle spiHandle)
Clears the Tx FIFO interrupt flag.
Definition: spi.c:80
SPI_SPICTL_OVRRUN_INT_ENA_BITS
#define SPI_SPICTL_OVRRUN_INT_ENA_BITS
Defines the location of the OVERRUN INT ENA bits in the SPICTL register.
Definition: spi.h:119
SPI_TxBufferStatus_e
SPI_TxBufferStatus_e
Enumeration to define the serial peripheral interface (SPI) Tx Buffer Status.
Definition: spi.h:327
SPI_enableRxFifoInt
void SPI_enableRxFifoInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) receive FIFO interrupt.
Definition: spi.c:247
SPI_SPIFFRX_FIFO_ST_BITS
#define SPI_SPIFFRX_FIFO_ST_BITS
Defines the location of the RXFFST4-0 bits in the SPIFFRX register.
Definition: spi.h:140
SPI_enableTxFifoEnh
void SPI_enableTxFifoEnh(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) transmit FIFO enhancements.
Definition: spi.c:283
SPI_SPIFFTX_CHAN_RESET_BITS
#define SPI_SPIFFTX_CHAN_RESET_BITS
Defines the location of the SPIRST bits in the SPIFFTX register.
Definition: spi.h:185
SPI_enableChannels
void SPI_enableChannels(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) transmit and receive channels.
Definition: spi.c:187
SPI_SPIFFTX_FIFO_RESET_BITS
#define SPI_SPIFFTX_FIFO_RESET_BITS
Defines the location of the TXFIFO Reset bits in the SPIFFTX register.
Definition: spi.h:177
SPI_SPICTL_INT_ENA_BITS
#define SPI_SPICTL_INT_ENA_BITS
Defines the location of the SPI INT ENA bits in the SPICTL register.
Definition: spi.h:103
SPI_SPICTL_TALK_BITS
#define SPI_SPICTL_TALK_BITS
Defines the location of the TALK bits in the SPICTL register.
Definition: spi.h:107
SPI_SPIPRI_STE_INV_BITS
#define SPI_SPIPRI_STE_INV_BITS
Defines the location of the STE_INV bits in the SPIPRI register.
Definition: spi.h:194
SPI_SPIST_TXBUF_BITS
#define SPI_SPIST_TXBUF_BITS
Defines the location of the TX BUF FULL FLAG in the SPIST register.
Definition: spi.h:99
SPI_resetChannels
void SPI_resetChannels(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) transmit and receive channels.
Definition: spi.c:382
SPI_SPIFFTX_IL_BITS
#define SPI_SPIFFTX_IL_BITS
Defines the location of the TXFFIL4-0 bits in the SPIFFTX register.
Definition: spi.h:157
SPI_disableTxFifoInt
void SPI_disableTxFifoInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) transmit FIFO interrupt.
Definition: spi.c:163
SPI_SPICCR_CHAR_LENGTH_BITS
#define SPI_SPICCR_CHAR_LENGTH_BITS
Defines the location of the SPICHAR3-0 bits in the SPICCR register.
Definition: spi.h:79
SPI_disableRxFifoInt
void SPI_disableRxFifoInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) receive FIFO interrupt.
Definition: spi.c:127
SPI_TriWire_e
SPI_TriWire_e
Enumeration to define the tri-wire status.
Definition: spi.h:318
SPI_clearRxFifoOvf
void SPI_clearRxFifoOvf(SPI_Handle spiHandle)
Clears the Rx FIFO overflow flag.
Definition: spi.c:56
SPI_CharLength_e
SPI_CharLength_e
Enumeration to define the serial peripheral interface (SPI) character lengths.
Definition: spi.h:215
SPI_SPIFFRX_INTCLR_BITS
#define SPI_SPIFFRX_INTCLR_BITS
Defines the location of the RXFFINT CLR bits in the SPIFFRX register.
Definition: spi.h:132
SPI_enableInt
void SPI_enableInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) interrupt.
Definition: spi.c:199
SPI_getRxFifoStatus
SPI_FifoStatus_e SPI_getRxFifoStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) receive FIFO status.
Definition: spi.c:307
_SPI_Obj_::SPICTL
volatile uint16_t SPICTL
SPI Operation Control Register.
Definition: spi.h:349
SPI_setClkPolarity
void SPI_setClkPolarity(SPI_Handle spiHandle, const SPI_ClkPolarity_e polarity)
Sets the serial peripheral interface (SPI) clock polarity.
Definition: spi.c:455
SPI_SPIFFTX_INTCLR_BITS
#define SPI_SPIFFTX_INTCLR_BITS
Defines the location of the TXFFINT CLR bits in the SPIFFTX register.
Definition: spi.h:165
SPI_getTxFifoStatus
SPI_FifoStatus_e SPI_getTxFifoStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) transmit FIFO status.
Definition: spi.c:319
SPI_Mode_e
SPI_Mode_e
Enumeration to define the serial peripheral interface (SPI) network mode control. ...
Definition: spi.h:257
SPI_disableLoopBack
void SPI_disableLoopBack(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) loop back mode.
Definition: spi.c:104
SPI_enableTxFifo
void SPI_enableTxFifo(SPI_Handle spiHandle)
Re-enables the serial peripheral interface (SPI) transmit FIFO.
Definition: spi.c:271
SPI_enableLoopBack
void SPI_enableLoopBack(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) loop back mode.
Definition: spi.c:211
spi.h
Contains public interface to various functions related to the serial peripheral interface (SPI) objec...
_SPI_Obj_::SPIST
volatile uint16_t SPIST
SPI Status Register.
Definition: spi.h:350
SPI_setSuspend
void SPI_setSuspend(SPI_Handle spiHandle, const SPI_EmulationSuspend_e emuSuspend)
Sets the serial peripheral interface (SPI) emulation suspend bits.
Definition: spi.c:524
SPI_enableTxFifoInt
void SPI_enableTxFifoInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) transmit FIFO interrupt.
Definition: spi.c:295
SPI_EmulationSuspend_e
SPI_EmulationSuspend_e
Enumeration to define the serial peripheral interface (SPI) Enumeration suspend bits.
Definition: spi.h:336
SPI_setTriWire
void SPI_setTriWire(SPI_Handle spiHandle, const SPI_TriWire_e triwire)
Sets SPI port operating mode.
Definition: spi.c:538
SPI_disableOverRunInt
void SPI_disableOverRunInt(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) over-run interrupt.
Definition: spi.c:116
SPI_SPIFFTX_IENA_BITS
#define SPI_SPIFFTX_IENA_BITS
Defines the location of the TXFFIENA bits in the SPIFFTX register.
Definition: spi.h:161
SPI_setRxFifoIntLevel
void SPI_setRxFifoIntLevel(SPI_Handle spiHandle, const SPI_FifoLevel_e fifoLevel)
Sets the serial peripheral interface (SPI) receive FIFO level for generating an interrupt.
Definition: spi.c:496
SPI_resetTxFifo
void SPI_resetTxFifo(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) transmit FIFO.
Definition: spi.c:406
SPI_init
SPI_Handle SPI_init(void *pMemory, const size_t numBytes)
Initializes the serial peripheral interface (SPI) object handle.
Definition: spi.c:355
SPI_SPIPRI_SUSP_BITS
#define SPI_SPIPRI_SUSP_BITS
Defines the location of the SUSP bits in the SPIPRI register.
Definition: spi.h:190
SPI_reset
void SPI_reset(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI)
Definition: spi.c:370
SPI_SPIFFRX_IL_BITS
#define SPI_SPIFFRX_IL_BITS
Defines the location of the RXFFIL4-0 bits in the SPIFFRX register.
Definition: spi.h:124
SPI_SPIFFRX_FIFO_OVFCLR_BITS
#define SPI_SPIFFRX_FIFO_OVFCLR_BITS
Defines the location of the RXFFOVF CLR bits in the SPIFFRX register.
Definition: spi.h:148
SPI_SPIPRI_TRIWIRE
#define SPI_SPIPRI_TRIWIRE
Defines the location of the TRIWIRE bits in the SPIPRI register.
Definition: spi.h:198
SPI_SPICCR_CLKPOL_BITS
#define SPI_SPICCR_CLKPOL_BITS
Defines the location of the CLOCK POLARITY bits in the SPICCR register.
Definition: spi.h:87
SPI_disableTxFifoEnh
void SPI_disableTxFifoEnh(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) transmit FIFO enhancements.
Definition: spi.c:151
SPI_IntFlagStatus_e
SPI_IntFlagStatus_e
Enumeration to define the serial peripheral interface (SPI) Interrupt Flag Status.
Definition: spi.h:300
SPI_Handle
struct _SPI_Obj_ * SPI_Handle
Defines the serial peripheral interface (SPI) handle.
Definition: spi.h:368
SPI_enable
void SPI_enable(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI)
Definition: spi.c:175
SPI_FifoLevel_e
SPI_FifoLevel_e
Enumeration to define the serial peripheral interface (SPI) FIFO level.
Definition: spi.h:266
_SPI_Obj_::SPIFFRX
volatile uint16_t SPIFFRX
SPI FIFO Receive Register.
Definition: spi.h:359
SPI_enableRxFifo
void SPI_enableRxFifo(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) receive FIFO.
Definition: spi.c:235
_SPI_Obj_::SPICCR
volatile uint16_t SPICCR
SPI Configuration Control Register.
Definition: spi.h:348
SPI_setTxDelay
void SPI_setTxDelay(SPI_Handle spiHandle, const uint_least8_t delay)
Sets the serial peripheral interface (SPI) transmit delay.
Definition: spi.c:551
SPI_SteInv_e
SPI_SteInv_e
Enumeration to define the the serial peripheral interface (SPI) STE pin status.
Definition: spi.h:309
SPI_SPIFFRX_FIFO_RESET_BITS
#define SPI_SPIFFRX_FIFO_RESET_BITS
Defines the location of the RXFIFO Reset bits in the SPIFFRX register.
Definition: spi.h:144
SPI_clearRxFifoInt
void SPI_clearRxFifoInt(SPI_Handle spiHandle)
Clears the Rx FIFO interrupt flag.
Definition: spi.c:68
SPI_SPICCR_RESET_BITS
#define SPI_SPICCR_RESET_BITS
Defines the location of the SPI SW Reset bits in the SPICCR register.
Definition: spi.h:91
SPI_enableOverRunInt
void SPI_enableOverRunInt(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) over-run interrupt.
Definition: spi.c:223
SPI_disableTx
void SPI_disableTx(SPI_Handle spiHandle)
Disables the serial peripheral interface (SPI) master/slave transmit mode.
Definition: spi.c:139
SPI_ClkPolarity_e
SPI_ClkPolarity_e
Enumeration to define the serial peripheral interface (SPI) clock polarity for the input and output d...
Definition: spi.h:247
SPI_SPIST_INTFLAG_BITS
#define SPI_SPIST_INTFLAG_BITS
Defines the location of the SPI INT Flag in the SPIST register.
Definition: spi.h:95
SPI_SPIFFTX_FIFO_ENA_BITS
#define SPI_SPIFFTX_FIFO_ENA_BITS
Defines the location of the SPIFFENA bits in the SPIFFTX register.
Definition: spi.h:181
SPI_enableTx
void SPI_enableTx(SPI_Handle spiHandle)
Enables the serial peripheral interface (SPI) masater/slave transmit mode.
Definition: spi.c:259
SPI_setSteInv
void SPI_setSteInv(SPI_Handle spiHandle, const SPI_SteInv_e steinv)
Controls pin inversion of STE pin.
Definition: spi.c:511
SPI_FifoStatus_e
SPI_FifoStatus_e
Enumeration to define the serial peripheral interface (SPI) FIFO status.
Definition: spi.h:278
_SPI_Obj_::SPIBRR
volatile uint16_t SPIBRR
SPI Baud Rate Register.
Definition: spi.h:352
SPI_BaudRate_e
SPI_BaudRate_e
Enumeration to define the serial peripheral interface (SPI) baud rates.
Definition: spi.h:206
SPI_ClkPhase_e
SPI_ClkPhase_e
Enumeration to define the serial peripheral interface (SPI) clock phase.
Definition: spi.h:238
_SPI_Obj_::SPIPRI
volatile uint16_t SPIPRI
SPI Priority Register.
Definition: spi.h:362
SPI_setClkPhase
void SPI_setClkPhase(SPI_Handle spiHandle, const SPI_ClkPhase_e clkPhase)
Sets the serial peripheral interface (SPI) clock phase.
Definition: spi.c:443
SPI_Priority_e
SPI_Priority_e
Enumeration to define the the serial peripheral interface (SPI) priority.
Definition: spi.h:290
SPI_SPIFFRX_IENA_BITS
#define SPI_SPIFFRX_IENA_BITS
Defines the location of the RXFFIENA bits in the SPIFFRX register.
Definition: spi.h:128
_SPI_Obj_::SPIFFCT
volatile uint16_t SPIFFCT
SPI FIFO Control Register.
Definition: spi.h:360
SPI_resetRxFifo
void SPI_resetRxFifo(SPI_Handle spiHandle)
Resets the serial peripheral interface (SPI) receive FIFO.
Definition: spi.c:394
SPI_setCharLength
void SPI_setCharLength(SPI_Handle spiHandle, const SPI_CharLength_e length)
Sets the serial peripheral interface (SPI) character length.
Definition: spi.c:428
SPI_SPIFFTX_FIFO_ST_BITS
#define SPI_SPIFFTX_FIFO_ST_BITS
Defines the location of the TXFFST4-0 bits in the SPIFFTX register.
Definition: spi.h:173
SPI_setMode
void SPI_setMode(SPI_Handle spiHandle, const SPI_Mode_e mode)
Sets the serial peripheral interface (SPI) network mode.
Definition: spi.c:470
_SPI_Obj_::SPIFFTX
volatile uint16_t SPIFFTX
SPI FIFO Transmit Register.
Definition: spi.h:358
SPI_SPICCR_SPILBK_BITS
#define SPI_SPICCR_SPILBK_BITS
Defines the location of the SPILBK bits in the SPICCR register.
Definition: spi.h:83
SPI_getTxBufferStatus
SPI_TxBufferStatus_e SPI_getTxBufferStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) Tx Buffer status.
Definition: spi.c:343
SPI_setPriority
void SPI_setPriority(SPI_Handle spiHandle, const SPI_Priority_e priority)
Sets the priority of the SPI port vis-a-vis the EMU.
Definition: spi.c:482
SPI_getIntFlagStatus
SPI_IntFlagStatus_e SPI_getIntFlagStatus(SPI_Handle spiHandle)
Gets the serial peripheral interface (SPI) Interrupt Flag status.
Definition: spi.c:331
SPI_setTxFifoIntLevel
void SPI_setTxFifoIntLevel(SPI_Handle spiHandle, const SPI_FifoLevel_e fifoLevel)
Sets the serial peripheral interface (SPI) transmit FIFO level for generating an interrupt.
Definition: spi.c:563