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adc.h
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1 /* --COPYRIGHT--,BSD
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
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14 * documentation and/or other materials provided with the distribution.
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32 #ifndef _ADC_H_
33 #define _ADC_H_
34
40
41
42 // **************************************************************************
43 // the includes
44
45 // drivers
46 #include "sw/drivers/cpu/src/32b/f28x/f2806x/cpu.h"
47
48
49 // modules
50 #include "sw/modules/types/src/types.h"
51
52
57
58
59
60 #ifdef __cplusplus
61 extern "C" {
62 #endif
63
64
65 // **************************************************************************
66 // the defines
67
68
71 #define ADC_BASE_ADDR (0x00000B00)
72
73
76 #define ADC_DELAY_usec 10000L
77
80 #define ADC_numBits 12
81
84 #define ADC_dataBias (1 << (ADC_numBits - 1))
85
86
89 #define ADC_ADCCTL1_TEMPCONV_BITS (1 << 0)
90
93 #define ADC_ADCCTL1_VREFLOCONV_BITS (1 << 1)
94
97 #define ADC_ADCCTL1_INTPULSEPOS_BITS (1 << 2)
98
101 #define ADC_ADCCTL1_ADCREFSEL_BITS (1 << 3)
102
105 #define ADC_ADCCTL1_ADCREFPWD_BITS (1 << 5)
106
109 #define ADC_ADCCTL1_ADCBGPWD_BITS (1 << 6)
110
113 #define ADC_ADCCTL1_ADCPWDN_BITS (1 << 7)
114
117 #define ADC_ADCCTL1_ADCBSYCHAN_BITS (31 << 8)
118
121 #define ADC_ADCCTL1_ADCBSY_BITS (1 << 13)
122
125 #define ADC_ADCCTL1_ADCENABLE_BITS (1 << 14)
126
129 #define ADC_ADCCTL1_RESET_BITS (1 << 15)
130
133 #define ADC_ADCCTL2_CLKDIV2EN_BITS (1 << 0)
134
137 #define ADC_ADCCTL2_CLKDIV4EN_BITS (1 << 2)
138
141 #define ADC_ADCCTL2_ADCNONOVERLAP_BITS (1 << 1)
142
145 #define ADC_INTSELxNy_NUMBITS_PER_REG 8
146
149 #define ADC_INTSELxNy_LOG2_NUMBITS_PER_REG 3
150
153 #define ADC_INTSELxNy_INTSEL_BITS (31 << 0)
154
157 #define ADC_INTSELxNy_INTE_BITS (1 << 5)
158
161 #define ADC_INTSELxNy_INTCONT_BITS (1 << 6)
162
165 #define ADC_ADCSOCxCTL_ACQPS_BITS (63 << 0)
166
169 #define ADC_ADCSOCxCTL_CHSEL_BITS (15 << 6)
170
173 #define ADC_ADCSOCxCTL_TRIGSEL_BITS (31 << 11)
174
177 #define ADC_ADCINTSOCSELx_SOCx_BITS 3
178
181 #define ADC_ADCSAMPLEMODE_SIMULEN0_BITS (1 << 0)
182
185 #define ADC_ADCSAMPLEMODE_SIMULEN2_BITS (1 << 1)
186
189 #define ADC_ADCSAMPLEMODE_SIMULEN4_BITS (1 << 2)
190
193 #define ADC_ADCSAMPLEMODE_SIMULEN6_BITS (1 << 3)
194
197 #define ADC_ADCSAMPLEMODE_SIMULEN8_BITS (1 << 4)
198
201 #define ADC_ADCSAMPLEMODE_SIMULEN10_BITS (1 << 5)
202
205 #define ADC_ADCSAMPLEMODE_SIMULEN12_BITS (1 << 6)
206
209 #define ADC_ADCSAMPLEMODE_SIMULEN14_BITS (1 << 7)
210
211
214 #define ADC_ADCSAMPLEMODE_SEPARATE_FLAG 0x100
215
216
217
218 // **************************************************************************
219 // the typedefs
220
223 typedef enum
224 {
225 ADC_DivideSelect_ClkIn_by_1=0,
226 ADC_DivideSelect_ClkIn_by_2=1,
227 ADC_DivideSelect_ClkIn_by_4=5
228 } ADC_DivideSelect_e;
229
232 typedef enum
233 {
234 ADC_IntNumber_1=0,
235 ADC_IntNumber_2,
236 ADC_IntNumber_3,
237 ADC_IntNumber_4,
238 ADC_IntNumber_5,
239 ADC_IntNumber_6,
240 ADC_IntNumber_7,
241 ADC_IntNumber_8,
242 ADC_IntNumber_9,
243 ADC_IntNumber_1HP,
244 ADC_IntNumber_2HP,
245 ADC_IntNumber_9HP=0xE
246 } ADC_IntNumber_e;
247
248
251 typedef enum
252 {
253 ADC_IntMode_ClearFlag=(0 << 6),
254 ADC_IntMode_EOC=(1 << 6)
255 } ADC_IntMode_e;
256
257
260 typedef enum
261 {
262 ADC_ADCCTL2_Overlap=0,
263 ADC_ADCCTL2_NoOverlap
264 } ADC_ADCCTL2_ADCNONOVERLAP_e;
265
266
269 typedef enum
270 {
271 ADC_NoIntTriggersSOC=0,
272 ADC_Int1TriggersSOC,
273 ADC_Int2TriggersSOC
274 } ADC_IntTriggerSOC_e;
275
276
279 typedef enum
280 {
281 ADC_IntPulseGenMode_During=(0 << 2),
282 ADC_IntPulseGenMode_Prior=(1 << 2)
283 } ADC_IntPulseGenMode_e;
284
285
288 typedef enum
289 {
290 ADC_IntSrc_EOC0=(0 << 0),
291 ADC_IntSrc_EOC1=(1 << 0),
292 ADC_IntSrc_EOC2=(2 << 0),
293 ADC_IntSrc_EOC3=(3 << 0),
294 ADC_IntSrc_EOC4=(4 << 0),
295 ADC_IntSrc_EOC5=(5 << 0),
296 ADC_IntSrc_EOC6=(6 << 0),
297 ADC_IntSrc_EOC7=(7 << 0),
298 ADC_IntSrc_EOC8=(8 << 0),
299 ADC_IntSrc_EOC9=(9 << 0),
300 ADC_IntSrc_EOC10=(10 << 0),
301 ADC_IntSrc_EOC11=(11 << 0),
302 ADC_IntSrc_EOC12=(12 << 0),
303 ADC_IntSrc_EOC13=(13 << 0),
304 ADC_IntSrc_EOC14=(14 << 0),
305 ADC_IntSrc_EOC15=(15 << 0)
306 } ADC_IntSrc_e;
307
308
311 typedef enum
312 {
313 ADC_ResultNumber_0=0,
314 ADC_ResultNumber_1,
315 ADC_ResultNumber_2,
316 ADC_ResultNumber_3,
317 ADC_ResultNumber_4,
318 ADC_ResultNumber_5,
319 ADC_ResultNumber_6,
320 ADC_ResultNumber_7,
321 ADC_ResultNumber_8,
322 ADC_ResultNumber_9,
323 ADC_ResultNumber_10,
324 ADC_ResultNumber_11,
325 ADC_ResultNumber_12,
326 ADC_ResultNumber_13,
327 ADC_ResultNumber_14,
328 ADC_ResultNumber_15
329 } ADC_ResultNumber_e;
330
331
334 typedef enum
335 {
336 ADC_SampleMode_SOC0_and_SOC1_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 0),
337 ADC_SampleMode_SOC2_and_SOC3_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 1),
338 ADC_SampleMode_SOC4_and_SOC5_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 2),
339 ADC_SampleMode_SOC6_and_SOC7_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 3),
340 ADC_SampleMode_SOC8_and_SOC9_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 4),
341 ADC_SampleMode_SOC10_and_SOC11_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 5),
342 ADC_SampleMode_SOC12_and_SOC13_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 6),
343 ADC_SampleMode_SOC14_and_SOC15_Separate=ADC_ADCSAMPLEMODE_SEPARATE_FLAG + (1 << 7),
344 ADC_SampleMode_SOC0_and_SOC1_Together=(1 << 0),
345 ADC_SampleMode_SOC2_and_SOC3_Together=(1 << 1),
346 ADC_SampleMode_SOC4_and_SOC5_Together=(1 << 2),
347 ADC_SampleMode_SOC6_and_SOC7_Together=(1 << 3),
348 ADC_SampleMode_SOC8_and_SOC9_Together=(1 << 4),
349 ADC_SampleMode_SOC10_and_SOC11_Together=(1 << 5),
350 ADC_SampleMode_SOC12_and_SOC13_Together=(1 << 6),
351 ADC_SampleMode_SOC14_and_SOC15_Together=(1 << 7)
352 } ADC_SampleMode_e;
353
354
357 typedef enum
358 {
359 ADC_SocChanNumber_A0=(0 << 6),
360 ADC_SocChanNumber_A1=(1 << 6),
361 ADC_SocChanNumber_A2=(2 << 6),
362 ADC_SocChanNumber_A3=(3 << 6),
363 ADC_SocChanNumber_A4=(4 << 6),
364 ADC_SocChanNumber_A5=(5 << 6),
365 ADC_SocChanNumber_A6=(6 << 6),
366 ADC_SocChanNumber_A7=(7 << 6),
367 ADC_SocChanNumber_B0=(8 << 6),
368 ADC_SocChanNumber_B1=(9 << 6),
369 ADC_SocChanNumber_B2=(10 << 6),
370 ADC_SocChanNumber_B3=(11 << 6),
371 ADC_SocChanNumber_B4=(12 << 6),
372 ADC_SocChanNumber_B5=(13 << 6),
373 ADC_SocChanNumber_B6=(14 << 6),
374 ADC_SocChanNumber_B7=(15 << 6),
375 ADC_SocChanNumber_A0_and_B0_Together=(0 << 6),
376 ADC_SocChanNumber_A1_and_B1_Together=(1 << 6),
377 ADC_SocChanNumber_A2_and_B2_Together=(2 << 6),
378 ADC_SocChanNumber_A3_and_B3_Together=(3 << 6),
379 ADC_SocChanNumber_A4_and_B4_Together=(4 << 6),
380 ADC_SocChanNumber_A5_and_B5_Together=(5 << 6),
381 ADC_SocChanNumber_A6_and_B6_Together=(6 << 6),
382 ADC_SocChanNumber_A7_and_B7_Together=(7 << 6)
383 } ADC_SocChanNumber_e;
384
385
388 typedef enum
389 {
390 ADC_SocNumber_0=0,
391 ADC_SocNumber_1,
392 ADC_SocNumber_2,
393 ADC_SocNumber_3,
394 ADC_SocNumber_4,
395 ADC_SocNumber_5,
396 ADC_SocNumber_6,
397 ADC_SocNumber_7,
398 ADC_SocNumber_8,
399 ADC_SocNumber_9,
400 ADC_SocNumber_10,
401 ADC_SocNumber_11,
402 ADC_SocNumber_12,
403 ADC_SocNumber_13,
404 ADC_SocNumber_14,
405 ADC_SocNumber_15
406 } ADC_SocNumber_e;
407
408
411 typedef enum
412 {
413 ADC_SocSampleDelay_7_cycles=6,
414 ADC_SocSampleDelay_8_cycles=7,
415 ADC_SocSampleDelay_9_cycles=8,
416 ADC_SocSampleDelay_10_cycles=9,
417 ADC_SocSampleDelay_11_cycles=10,
418 ADC_SocSampleDelay_12_cycles=11,
419 ADC_SocSampleDelay_13_cycles=12,
420 ADC_SocSampleDelay_14_cycles=13,
421 ADC_SocSampleDelay_15_cycles=14,
422 ADC_SocSampleDelay_16_cycles=15,
423 ADC_SocSampleDelay_22_cycles=21,
424 ADC_SocSampleDelay_23_cycles=22,
425 ADC_SocSampleDelay_24_cycles=23,
426 ADC_SocSampleDelay_25_cycles=24,
427 ADC_SocSampleDelay_26_cycles=25,
428 ADC_SocSampleDelay_27_cycles=26,
429 ADC_SocSampleDelay_28_cycles=27,
430 ADC_SocSampleDelay_29_cycles=28,
431 ADC_SocSampleDelay_35_cycles=34,
432 ADC_SocSampleDelay_36_cycles=35,
433 ADC_SocSampleDelay_37_cycles=36,
434 ADC_SocSampleDelay_38_cycles=37,
435 ADC_SocSampleDelay_39_cycles=38,
436 ADC_SocSampleDelay_40_cycles=39,
437 ADC_SocSampleDelay_41_cycles=40,
438 ADC_SocSampleDelay_42_cycles=41,
439 ADC_SocSampleDelay_48_cycles=47,
440 ADC_SocSampleDelay_49_cycles=48,
441 ADC_SocSampleDelay_50_cycles=49,
442 ADC_SocSampleDelay_51_cycles=50,
443 ADC_SocSampleDelay_52_cycles=51,
444 ADC_SocSampleDelay_53_cycles=52,
445 ADC_SocSampleDelay_54_cycles=53,
446 ADC_SocSampleDelay_55_cycles=54,
447 ADC_SocSampleDelay_61_cycles=60,
448 ADC_SocSampleDelay_62_cycles=61,
449 ADC_SocSampleDelay_63_cycles=62,
450 ADC_SocSampleDelay_64_cycles=63
451 } ADC_SocSampleDelay_e;
452
453
456 typedef enum
457 {
458 ADC_SocTrigSrc_Sw=(0 << 11),
459 ADC_SocTrigSrc_CpuTimer_0=(1 << 11),
460 ADC_SocTrigSrc_CpuTimer_1=(2 << 11),
461 ADC_SocTrigSrc_CpuTimer_2=(3 << 11),
462 ADC_SocTrigSrc_XINT2_XINT2SOC=(4 << 11),
463 ADC_SocTrigSrc_EPWM1_ADCSOCA=(5 << 11),
464 ADC_SocTrigSrc_EPWM1_ADCSOCB=(6 << 11),
465 ADC_SocTrigSrc_EPWM2_ADCSOCA=(7 << 11),
466 ADC_SocTrigSrc_EPWM2_ADCSOCB=(8 << 11),
467 ADC_SocTrigSrc_EPWM3_ADCSOCA=(9 << 11),
468 ADC_SocTrigSrc_EPWM3_ADCSOCB=(10 << 11),
469 ADC_SocTrigSrc_EPWM4_ADCSOCA=(11 << 11),
470 ADC_SocTrigSrc_EPWM4_ADCSOCB=(12 << 11),
471 ADC_SocTrigSrc_EPWM5_ADCSOCA=(13 << 11),
472 ADC_SocTrigSrc_EPWM5_ADCSOCB=(14 << 11),
473 ADC_SocTrigSrc_EPWM6_ADCSOCA=(15 << 11),
474 ADC_SocTrigSrc_EPWM6_ADCSOCB=(16 << 11),
475 ADC_SocTrigSrc_EPWM7_ADCSOCA=(17 << 11),
476 ADC_SocTrigSrc_EPWM7_ADCSOCB=(18 << 11),
477 ADC_SocTrigSrc_EPWM8_ADCSOCA=(19 << 11),
478 ADC_SocTrigSrc_EPWM8_ADCSOCB=(20 << 11)
479 } ADC_SocTrigSrc_e;
480
481
484 typedef enum
485 {
486 ADC_TempSensorSrc_Ext=0,
487 ADC_TempSensorSrc_Int
488 } ADC_TempSensorSrc_e;
489
490
493 typedef enum
494 {
495 ADC_VoltageRefSrc_Int=(0 << 3),
496 ADC_VoltageRefSrc_Ext=(1 << 3)
497 } ADC_VoltageRefSrc_e;
498
499
502 typedef enum
503 {
504 ADC_SocFrc_0=0,
505 ADC_SocFrc_1,
506 ADC_SocFrc_2,
507 ADC_SocFrc_3,
508 ADC_SocFrc_4,
509 ADC_SocFrc_5,
510 ADC_SocFrc_6,
511 ADC_SocFrc_7,
512 ADC_SocFrc_8,
513 ADC_SocFrc_9,
514 ADC_SocFrc_10,
515 ADC_SocFrc_11,
516 ADC_SocFrc_12,
517 ADC_SocFrc_13,
518 ADC_SocFrc_14,
519 ADC_SocFrc_15
520 } ADC_SocFrc_e;
521
522
525 typedef struct _ADC_Obj_
526 {
527 volatile uint16_t ADCRESULT[16];
528 volatile uint16_t resvd_1[26096];
529 volatile uint16_t ADCCTL1;
530 volatile uint16_t ADCCTL2;
531 volatile uint16_t rsvd_2[2];
532 volatile uint16_t ADCINTFLG;
533 volatile uint16_t ADCINTFLGCLR;
534 volatile uint16_t ADCINTOVF;
535 volatile uint16_t ADCINTOVFCLR;
536 volatile uint16_t INTSELxNy[5];
537 volatile uint16_t rsvd_3[3];
538 volatile uint16_t SOCPRICTRL;
539 volatile uint16_t rsvd_4;
540 volatile uint16_t ADCSAMPLEMODE;
541 volatile uint16_t rsvd_5;
542 volatile uint16_t ADCINTSOCSEL1;
543 volatile uint16_t ADCINTSOCSEL2;
544 volatile uint16_t rsvd_6[2];
545 volatile uint16_t ADCSOCFLG1;
546 volatile uint16_t rsvd_7;
547 volatile uint16_t ADCSOCFRC1;
548 volatile uint16_t rsvd_8;
549 volatile uint16_t ADCSOCOVF1;
550 volatile uint16_t rsvd_9;
551 volatile uint16_t ADCSOCOVFCLR1;
552 volatile uint16_t rsvd_10;
553 volatile uint16_t ADCSOCxCTL[16];
554 volatile uint16_t rsvd_11[16];
555 volatile uint16_t ADCREFTRIM;
556 volatile uint16_t ADCOFFTRIM;
557 volatile uint16_t resvd_12[13];
558 volatile uint16_t ADCREV;
559 } ADC_Obj;
560
561
564 typedef struct _ADC_Obj_ *ADC_Handle;
565
566
567 // **************************************************************************
568 // the globals
569
570
571 // **************************************************************************
572 // the function prototypes
573
574
578 static inline void ADC_clearIntFlag(ADC_Handle adcHandle,const ADC_IntNumber_e intNumber)
579 {
580 ADC_Obj *adc = (ADC_Obj *)adcHandle;
581
582
583 // clear the bit
584 adc->ADCINTFLGCLR = 1 << intNumber;
585
586 return;
587 } // end of ADC_clearIntFlag() function
588
589
594 static inline bool ADC_getIntFlag(ADC_Handle adcHandle,const ADC_IntNumber_e intNumber)
595 {
596 ADC_Obj *adc = (ADC_Obj *)adcHandle;
597 bool status;
598
599
600 // check the status of the bit
601 status = (bool)(adc->ADCINTFLG & (1 << intNumber) >> intNumber);
602
603 return(status);
604 } // end of ADC_getIntFlag() function
605
606
609 extern void ADC_disable(ADC_Handle adcHandle);
610
611
614 extern void ADC_disableBandGap(ADC_Handle adcHandle);
615
616
620 extern void ADC_disableInt(ADC_Handle adcHandle,const ADC_IntNumber_e intNumber);
621
622
625 extern void ADC_disableRefBuffers(ADC_Handle adcHandle);
626
627
630 extern void ADC_enable(ADC_Handle adcHandle);
631
632
635 extern void ADC_enableBandGap(ADC_Handle adcHandle);
636
637
641 extern void ADC_enableInt(ADC_Handle adcHandle,const ADC_IntNumber_e intNumber);
642
643
646 extern void ADC_enableRefBuffers(ADC_Handle adcHandle);
647
648
652 extern ADC_DivideSelect_e ADC_getDivideSelect(ADC_Handle adcHandle);
653
654
659 static inline ADC_SocSampleDelay_e ADC_getSocSampleDelay(ADC_Handle adcHandle,const ADC_SocNumber_e socNumber)
660 {
661 ADC_Obj *adc = (ADC_Obj *)adcHandle;
662 ADC_SocSampleDelay_e sampleDelay;
663
664
665 // get the bits
666 sampleDelay = (ADC_SocSampleDelay_e)(adc->ADCSOCxCTL[socNumber] & ADC_ADCSOCxCTL_ACQPS_BITS);
667
668 return(sampleDelay);
669 } // end of ADC_getSocSampleDelay() function
670
671
676 extern ADC_Handle ADC_init(void *pMemory,const size_t numBytes);
677
678
681 extern void ADC_powerDown(ADC_Handle adcHandle);
682
683
686 extern void ADC_powerUp(ADC_Handle adcHandle);
687
688
693 static inline uint_least16_t ADC_readResult(ADC_Handle adcHandle,const ADC_ResultNumber_e resultNumber)
694 {
695 ADC_Obj *adc = (ADC_Obj *)adcHandle;
696
697 return(adc->ADCRESULT[resultNumber]);
698 } // end of ADC_read() function
699
700
703 extern void ADC_reset(ADC_Handle adcHandle);
704
705
709 extern void ADC_setDivideSelect(ADC_Handle adcHandle,const ADC_DivideSelect_e divSelect);
710
711
716 extern void ADC_setIntMode(ADC_Handle adcHandle,const ADC_IntNumber_e intNumber,const ADC_IntMode_e intMode);
717
718
722 extern void ADC_setIntPulseGenMode(ADC_Handle adcHandle,const ADC_IntPulseGenMode_e pulseMode);
723
724
729 extern void ADC_setIntSrc(ADC_Handle adcHandle,const ADC_IntNumber_e intNumber,const ADC_IntSrc_e intSrc);
730
731
735 extern void ADC_setSampleMode(ADC_Handle adcHandle,const ADC_SampleMode_e sampleMode);
736
737
742 extern void ADC_setSocChanNumber(ADC_Handle adcHandle,const ADC_SocNumber_e socNumber,const ADC_SocChanNumber_e chanNumber);
743
744
749 extern void ADC_setSocSampleDelay(ADC_Handle adcHandle,const ADC_SocNumber_e socNumber,const ADC_SocSampleDelay_e sampleDelay);
750
751
756 extern void ADC_setSocTrigSrc(ADC_Handle adcHandle,const ADC_SocNumber_e socNumber,const ADC_SocTrigSrc_e trigSrc);
757
758
762 extern void ADC_setSocFrc(ADC_Handle adcHandle,const ADC_SocFrc_e socFrc);
763
764
768 extern void ADC_setTempSensorSrc(ADC_Handle adcHandle,const ADC_TempSensorSrc_e sensorSrc);
769
770
774 extern void ADC_setVoltRefSrc(ADC_Handle adcHandle,const ADC_VoltageRefSrc_e voltRef);
775
776
780 extern void ADC_setOffTrim(ADC_Handle adcHandle, const uint16_t offtrim);
781
782
785 extern void ADC_enableVoltRefLoConv(ADC_Handle adcHandle);
786
787
790 extern void ADC_disableVoltRefLoConv(ADC_Handle adcHandle);
791
792
797 extern void ADC_setupSocTrigSrc(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_IntTriggerSOC_e intTrigSrc);
798
799
803 extern void ADC_setSocFrcWord(ADC_Handle adcHandle,const uint16_t socFrc);
804
805
808 extern void ADC_enableNoOverlapMode(ADC_Handle adcHandle);
809
810
813 extern void ADC_disableNoOverlapMode(ADC_Handle adcHandle);
814
815
816 #ifdef __cplusplus
817 }
818 #endif // extern "C"
819
821 #endif // end of _ADC_H_ definition
822
ADC_Handle
struct _ADC_Obj_ * ADC_Handle
Defines the analog-to-digital converter (ADC) handle.
Definition: adc.h:564
ADC_SocChanNumber_A3
Denotes SOC channel number A3.
Definition: adc.h:362
_ADC_Obj_::ADCSOCOVFCLR1
volatile uint16_t ADCSOCOVFCLR1
ADC SOC Overflow Clear 1 Register.
Definition: adc_obj.h:75
_ADC_Obj_::ADCINTSOCSEL2
volatile uint16_t ADCINTSOCSEL2
ADC Interrupt Trigger SOC Select 2 Register.
Definition: adc_obj.h:67
ADC_SocTrigSrc_e
ADC_SocTrigSrc_e
Enumeration to define the start of conversion (SOC) trigger source.
Definition: adc.h:456
ADC_setSocTrigSrc
void ADC_setSocTrigSrc(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocTrigSrc_e trigSrc)
Sets the start-of-conversion (SOC) trigger source.
Definition: adc.c:408
ADC_SocChanNumber_B4
Denotes SOC channel number B4.
Definition: adc.h:371
_ADC_Obj_::rsvd_8
volatile uint16_t rsvd_8
Reserved.
Definition: adc_obj.h:72
ADC_SocChanNumber_A6
Denotes SOC channel number A6.
Definition: adc.h:365
ADC_SocNumber_9
Denotes SOC9.
Definition: adc.h:399
ADC_SocSampleDelay_29_cycles
Denotes an SOC sample delay of 29 cycles.
Definition: adc.h:430
ADC_SocSampleDelay_53_cycles
Denotes an SOC sample delay of 53 cycles.
Definition: adc.h:444
ADC_SocTrigSrc_EPWM1_ADCSOCA
Denotes a EPWM1, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:463
ADC_IntPulseGenMode_e
ADC_IntPulseGenMode_e
Enumeration to define the analog-to-digital converter (ADC) interrupt pulse generation mode...
Definition: adc.h:279
ADC_SocTrigSrc_EPWM4_ADCSOCA
Denotes a EPWM4, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:469
ADC_enableBandGap
void ADC_enableBandGap(ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC) band gap circuit.
Definition: adc.c:141
ADC_setOffTrim
void ADC_setOffTrim(ADC_Handle adcHandle, const uint16_t offtrim)
Sets the offset trim register.
Definition: adc.c:605
ADC_SampleMode_SOC8_and_SOC9_Separate
Denotes SOC8 and SOC9 are sampled separately.
Definition: adc.h:340
ADC_IntSrc_EOC11
Denotes that interrupt source is the end of conversion for SOC11.
Definition: adc.h:301
ADC_SampleMode_e
ADC_SampleMode_e
Enumeration to define the analog-to-digital converter (ADC) sample modes.
Definition: adc.h:334
ADC_SocFrc_12
Denotes soc 12 forced conversion.
Definition: adc.h:516
ADC_SocSampleDelay_7_cycles
Denotes an SOC sample delay of 7 cycles.
Definition: adc.h:413
ADC_SocChanNumber_B6
Denotes SOC channel number B6.
Definition: adc.h:373
_ADC_Obj_::ADCINTFLGCLR
volatile uint16_t ADCINTFLGCLR
ADC Interrupt Flag Clear Register.
Definition: adc_obj.h:57
ADC_SocNumber_e
ADC_SocNumber_e
Enumeration to define the start of conversion (SOC) numbers.
Definition: adc.h:388
ADC_IntSrc_e
ADC_IntSrc_e
Enumeration to define the analog-to-digital converter (ADC) interrupt source.
Definition: adc.h:288
_ADC_Obj_::ADCINTFLG
volatile uint16_t ADCINTFLG
ADC Interrupt Flag Register.
Definition: adc_obj.h:56
ADC_setSocFrcWord
void ADC_setSocFrcWord(ADC_Handle adcHandle, const uint16_t socFrc)
Sets the entire start of conversion (SOC) force register.
Definition: adc.c:444
_ADC_Obj_::ADCINTOVF
volatile uint16_t ADCINTOVF
ADC Interrupt Overflow Register.
Definition: adc_obj.h:58
ADC_IntSrc_EOC4
Denotes that interrupt source is the end of conversion for SOC4.
Definition: adc.h:294
ADC_setupSocTrigSrc
void ADC_setupSocTrigSrc(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_IntTriggerSOC_e intTrigSrc)
Sets the start of conversion (SOC) trigger source.
Definition: adc.c:566
ADC_TempSensorSrc_e
ADC_TempSensorSrc_e
Enumeration to define the temperature sensor source.
Definition: adc.h:484
ADC_SocSampleDelay_15_cycles
Denotes an SOC sample delay of 15 cycles.
Definition: adc.h:421
ADC_SocChanNumber_B3
Denotes SOC channel number B3.
Definition: adc.h:370
_ADC_Obj_::ADCSOCFRC1
volatile uint16_t ADCSOCFRC1
ADC SOC Force 1 Register.
Definition: adc_obj.h:71
ADC_ResultNumber_12
Denotes ADCRESULT12.
Definition: adc.h:325
ADC_SampleMode_SOC14_and_SOC15_Together
Denotes SOC14 and SOC15 are sampled together.
Definition: adc.h:351
ADC_SocTrigSrc_XINT2_XINT2SOC
Denotes a XINT2, XINT2SOC trigger source for the SOC flag.
Definition: adc.h:462
ADC_SocSampleDelay_26_cycles
Denotes an SOC sample delay of 26 cycles.
Definition: adc.h:427
ADC_SocFrc_e
ADC_SocFrc_e
Enumeration to define the soc force values.
Definition: adc.h:502
ADC_SocTrigSrc_EPWM4_ADCSOCB
Denotes a EPWM4, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:470
ADC_ResultNumber_1
Denotes ADCRESULT1.
Definition: adc.h:314
ADC_reset
void ADC_reset(ADC_Handle adcHandle)
Resets the analog-to-digital converter (ADC)
Definition: adc.c:241
ADC_setIntPulseGenMode
void ADC_setIntPulseGenMode(ADC_Handle adcHandle, const ADC_IntPulseGenMode_e pulseMode)
Sets the interrupt pulse generation mode.
Definition: adc.c:300
ADC_SocFrc_15
Denotes soc 15 forced conversion.
Definition: adc.h:519
ADC_SocFrc_13
Denotes soc 13 forced conversion.
Definition: adc.h:517
ADC_SampleMode_SOC12_and_SOC13_Together
Denotes SOC12 and SOC13 are sampled together.
Definition: adc.h:350
ADC_SocSampleDelay_61_cycles
Denotes an SOC sample delay of 61 cycles.
Definition: adc.h:447
ADC_IntSrc_EOC14
Denotes that interrupt source is the end of conversion for SOC14.
Definition: adc.h:304
ADC_SocNumber_4
Denotes SOC4.
Definition: adc.h:394
ADC_disableVoltRefLoConv
void ADC_disableVoltRefLoConv(ADC_Handle adcHandle)
Disables conversion of the voltage reference low signal for calibration.
Definition: adc.c:635
ADC_ADCSOCxCTL_ACQPS_BITS
#define ADC_ADCSOCxCTL_ACQPS_BITS
Defines the location of the ACQPS bits in the ADCSOCxCTL register.
Definition: adc.h:165
ADC_SocSampleDelay_27_cycles
Denotes an SOC sample delay of 27 cycles.
Definition: adc.h:428
ADC_SocTrigSrc_EPWM8_ADCSOCB
Denotes a EPWM8, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:478
ADC_SocChanNumber_A5_and_B5_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:380
ADC_SocSampleDelay_9_cycles
Denotes an SOC sample delay of 9 cycles.
Definition: adc.h:415
_ADC_Obj_::ADCSAMPLEMODE
volatile uint16_t ADCSAMPLEMODE
ADC Sample Mode Register.
Definition: adc_obj.h:64
ADC_getSocSampleDelay
static ADC_SocSampleDelay_e ADC_getSocSampleDelay(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber)
Gets the analog-to-digital converter (ADC) start-of-conversion (SOC) sample delay value...
Definition: adc.h:659
ADC_SocNumber_1
Denotes SOC1.
Definition: adc.h:391
ADC_SocTrigSrc_EPWM8_ADCSOCA
Denotes a EPWM8, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:477
ADC_enableVoltRefLoConv
void ADC_enableVoltRefLoConv(ADC_Handle adcHandle)
Enables conversion of the voltage reference low signal for calibration.
Definition: adc.c:620
ADC_SocChanNumber_A1
Denotes SOC channel number A1.
Definition: adc.h:360
ADC_SocFrc_8
Denotes soc 8 forced conversion.
Definition: adc.h:512
ADC_SocNumber_5
Denotes SOC5.
Definition: adc.h:395
ADC_SocChanNumber_A5
Denotes SOC channel number A5.
Definition: adc.h:364
ADC_SocSampleDelay_50_cycles
Denotes an SOC sample delay of 50 cycles.
Definition: adc.h:441
ADC_IntNumber_9HP
Denotes ADCINT9 High Priority for use with PIE_enableAdcInt() only.
Definition: adc.h:245
ADC_SampleMode_SOC2_and_SOC3_Separate
Denotes SOC2 and SOC3 are sampled separately.
Definition: adc.h:337
ADC_DivideSelect_ClkIn_by_4
Denotes Main Clock Prescaling of 4.
Definition: adc.h:227
_ADC_Obj_::rsvd_10
volatile uint16_t rsvd_10
Reserved.
Definition: adc_obj.h:76
ADC_SocTrigSrc_EPWM5_ADCSOCA
Denotes a EPWM5, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:471
ADC_SocNumber_11
Denotes SOC11.
Definition: adc.h:401
ADC_IntPulseGenMode_During
Denotes that interrupt pulse generation occurs when the ADC begins conversion.
Definition: adc.h:281
ADC_SocTrigSrc_EPWM6_ADCSOCA
Denotes a EPWM6, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:473
_ADC_Obj_::rsvd_2
volatile uint16_t rsvd_2[3]
Reserved.
Definition: adc_obj.h:55
ADC_IntNumber_9
Denotes ADCINT9.
Definition: adc.h:242
ADC_SocTrigSrc_CpuTimer_1
Denotes a CPUTIMER1 trigger source for the SOC flag.
Definition: adc.h:460
ADC_SocChanNumber_A4
Denotes SOC channel number A4.
Definition: adc.h:363
ADC_enableNoOverlapMode
void ADC_enableNoOverlapMode(ADC_Handle adcHandle)
Enables no overlap mode.
Definition: adc.c:534
ADC_setIntMode
void ADC_setIntMode(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber, const ADC_IntMode_e intMode)
Sets the interrupt mode.
Definition: adc.c:276
ADC_SocSampleDelay_62_cycles
Denotes an SOC sample delay of 62 cycles.
Definition: adc.h:448
ADC_getDivideSelect
ADC_DivideSelect_e ADC_getDivideSelect(ADC_Handle adcHandle)
Gets the analog-to-digital converter (ADC) divide select value.
Definition: adc.c:500
_ADC_Obj_::resvd_1
volatile uint16_t resvd_1[26096]
Reserved.
Definition: adc_obj.h:53
ADC_SocNumber_7
Denotes SOC7.
Definition: adc.h:397
ADC_IntNumber_3
Denotes ADCINT3.
Definition: adc.h:236
ADC_SampleMode_SOC0_and_SOC1_Together
Denotes SOC0 and SOC1 are sampled together.
Definition: adc.h:344
_ADC_Obj_::rsvd_6
volatile uint16_t rsvd_6[2]
Reserved.
Definition: adc_obj.h:68
ADC_SampleMode_SOC2_and_SOC3_Together
Denotes SOC2 and SOC3 are sampled together.
Definition: adc.h:345
ADC_ResultNumber_10
Denotes ADCRESULT10.
Definition: adc.h:323
ADC_SocChanNumber_B2
Denotes SOC channel number B2.
Definition: adc.h:369
ADC_SocFrc_10
Denotes soc 10 forced conversion.
Definition: adc.h:514
ADC_disableRefBuffers
void ADC_disableRefBuffers(ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC) reference buffers circuit.
Definition: adc.c:109
ADC_IntSrc_EOC15
Denotes that interrupt source is the end of conversion for SOC15.
Definition: adc.h:305
ADC_ResultNumber_15
Denotes ADCRESULT15.
Definition: adc.h:328
ADC_enable
void ADC_enable(ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC)
Definition: adc.c:125
_ADC_Obj_::ADCCTL2
volatile uint16_t ADCCTL2
ADC Control Register 2.
Definition: adc.h:530
_ADC_Obj_::rsvd_3
volatile uint16_t rsvd_3[3]
Reserved.
Definition: adc_obj.h:61
ADC_SocSampleDelay_38_cycles
Denotes an SOC sample delay of 38 cycles.
Definition: adc.h:434
_ADC_Obj_::ADCSOCxCTL
volatile uint16_t ADCSOCxCTL[16]
ADC SOCx Control Registers.
Definition: adc_obj.h:77
_ADC_Obj_::ADCCTL1
volatile uint16_t ADCCTL1
ADC Control Register 1.
Definition: adc_obj.h:54
ADC_SocTrigSrc_EPWM2_ADCSOCB
Denotes a EPWM2, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:466
ADC_DivideSelect_e
ADC_DivideSelect_e
Enumeration to define the start of conversion (SOC) numbers.
Definition: adc.h:223
_ADC_Obj_::ADCINTOVFCLR
volatile uint16_t ADCINTOVFCLR
ADC Interrupt Overflow Clear Register.
Definition: adc_obj.h:59
ADC_IntTriggerSOC_e
ADC_IntTriggerSOC_e
Enumeration to define the analog-to-digital converter (ADC) input trigger SOC Select 1 Register group...
Definition: adc.h:269
ADC_SocSampleDelay_24_cycles
Denotes an SOC sample delay of 24 cycles.
Definition: adc.h:425
ADC_SocSampleDelay_11_cycles
Denotes an SOC sample delay of 11 cycles.
Definition: adc.h:417
ADC_ResultNumber_2
Denotes ADCRESULT2.
Definition: adc.h:315
ADC_SocSampleDelay_52_cycles
Denotes an SOC sample delay of 52 cycles.
Definition: adc.h:443
ADC_SocTrigSrc_EPWM1_ADCSOCB
Denotes a EPWM1, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:464
ADC_ResultNumber_e
ADC_ResultNumber_e
Enumeration to define the analog-to-digital converter (ADC) result number.
Definition: adc.h:311
ADC_IntSrc_EOC0
Denotes that interrupt source is the end of conversion for SOC0.
Definition: adc.h:290
ADC_SocSampleDelay_28_cycles
Denotes an SOC sample delay of 28 cycles.
Definition: adc.h:429
ADC_SampleMode_SOC6_and_SOC7_Separate
Denotes SOC6 and SOC7 are sampled separately.
Definition: adc.h:339
_ADC_Obj_::resvd_12
volatile uint16_t resvd_12[13]
Reserved.
Definition: adc_obj.h:81
ADC_IntMode_ClearFlag
Denotes that a new interrupt with not be generated until the interrupt flag is cleared.
Definition: adc.h:253
ADC_VoltageRefSrc_Ext
Denotes an internal voltage reference source.
Definition: adc.h:496
_ADC_Obj_::ADCINTSOCSEL1
volatile uint16_t ADCINTSOCSEL1
ADC Interrupt Trigger SOC Select 1 Register.
Definition: adc_obj.h:66
ADC_setSampleMode
void ADC_setSampleMode(ADC_Handle adcHandle, const ADC_SampleMode_e sampleMode)
Sets the sample mode.
Definition: adc.c:346
ADC_SocTrigSrc_EPWM5_ADCSOCB
Denotes a EPWM5, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:472
ADC_SocSampleDelay_55_cycles
Denotes an SOC sample delay of 55 cycles.
Definition: adc.h:446
ADC_disableNoOverlapMode
void ADC_disableNoOverlapMode(ADC_Handle adcHandle)
Disables no overlap mode.
Definition: adc.c:550
ADC_SocSampleDelay_63_cycles
Denotes an SOC sample delay of 63 cycles.
Definition: adc.h:449
ADC_SocNumber_6
Denotes SOC6.
Definition: adc.h:396
ADC_SocChanNumber_A0_and_B0_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:375
ADC_ResultNumber_11
Denotes ADCRESULT11.
Definition: adc.h:324
ADC_SocSampleDelay_39_cycles
Denotes an SOC sample delay of 39 cycles.
Definition: adc.h:435
_ADC_Obj_
Defines the analog-to-digital converter (ADC) object.
Definition: adc_obj.h:50
ADC_SampleMode_SOC10_and_SOC11_Together
Denotes SOC10 and SOC11 are sampled together.
Definition: adc.h:349
ADC_init
ADC_Handle ADC_init(void *pMemory, const size_t numBytes)
Initializes the analog-to-digital converter (ADC) object handle.
Definition: adc.c:193
ADC_ResultNumber_14
Denotes ADCRESULT14.
Definition: adc.h:327
ADC_getIntFlag
static bool ADC_getIntFlag(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Gets the analog-to-digital converter (ADC) interrupt flag.
Definition: adc.h:594
ADC_SocSampleDelay_14_cycles
Denotes an SOC sample delay of 14 cycles.
Definition: adc.h:420
ADC_disableBandGap
void ADC_disableBandGap(ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC) band gap circuit.
Definition: adc.c:74
ADC_SocSampleDelay_37_cycles
Denotes an SOC sample delay of 37 cycles.
Definition: adc.h:433
ADC_IntNumber_e
ADC_IntNumber_e
Enumeration to define the analog-to-digital converter (ADC) interrupt number.
Definition: adc.h:232
ADC_ResultNumber_13
Denotes ADCRESULT13.
Definition: adc.h:326
ADC_SocChanNumber_B7
Denotes SOC channel number B7.
Definition: adc.h:374
ADC_setVoltRefSrc
void ADC_setVoltRefSrc(ADC_Handle adcHandle, const ADC_VoltageRefSrc_e voltRef)
Sets the voltage reference source.
Definition: adc.c:480
ADC_SocSampleDelay_22_cycles
Denotes an SOC sample delay of 22 cycles.
Definition: adc.h:423
ADC_IntSrc_EOC3
Denotes that interrupt source is the end of conversion for SOC3.
Definition: adc.h:293
ADC_VoltageRefSrc_e
ADC_VoltageRefSrc_e
Enumeration to define the voltage reference source.
Definition: adc.h:493
ADC_enableInt
void ADC_enableInt(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Enables the analog-to-digital converter (ADC) interrupt.
Definition: adc.c:157
ADC_IntSrc_EOC13
Denotes that interrupt source is the end of conversion for SOC13.
Definition: adc.h:303
ADC_SocTrigSrc_CpuTimer_0
Denotes a CPUTIMER0 trigger source for the SOC flag.
Definition: adc.h:459
ADC_ADCCTL2_NoOverlap
Denotes that sample and conversion overlap is not allowed.
Definition: adc.h:263
ADC_IntNumber_1
Denotes ADCINT1.
Definition: adc.h:234
ADC_SocNumber_0
Denotes SOC0.
Definition: adc.h:390
ADC_IntNumber_2
Denotes ADCINT2.
Definition: adc.h:235
ADC_IntNumber_6
Denotes ADCINT6.
Definition: adc.h:239
ADC_SocChanNumber_B0
Denotes SOC channel number B0.
Definition: adc.h:367
ADC_IntPulseGenMode_Prior
Denotes that interrupt pulse generation occurs 1 cycle prior to the ADC result latching.
Definition: adc.h:282
ADC_SocSampleDelay_35_cycles
Denotes an SOC sample delay of 35 cycles.
Definition: adc.h:431
ADC_SocSampleDelay_48_cycles
Denotes an SOC sample delay of 48 cycles.
Definition: adc.h:439
_ADC_Obj_::SOCPRICTRL
volatile uint16_t SOCPRICTRL
ADC Start Of Conversion Priority Control Register.
Definition: adc_obj.h:62
ADC_SocFrc_4
Denotes soc 4 forced conversion.
Definition: adc.h:508
ADC_IntSrc_EOC2
Denotes that interrupt source is the end of conversion for SOC2.
Definition: adc.h:292
ADC_SocChanNumber_A7
Denotes SOC channel number A7.
Definition: adc.h:366
ADC_SocChanNumber_A2_and_B2_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:377
ADC_SocSampleDelay_12_cycles
Denotes an SOC sample delay of 12 cycles.
Definition: adc.h:418
ADC_Obj
struct _ADC_Obj_ ADC_Obj
Defines the analog-to-digital converter (ADC) object.
ADC_SocFrc_1
Denotes soc 1 forced conversion.
Definition: adc.h:505
ADC_IntMode_EOC
Denotes that a new interrupt with be generated on the next end of conversion (EOC) ...
Definition: adc.h:254
ADC_IntNumber_1HP
Denotes ADCINT1 High Priority for use with PIE_enableAdcInt() only.
Definition: adc.h:243
ADC_SocSampleDelay_42_cycles
Denotes an SOC sample delay of 42 cycles.
Definition: adc.h:438
ADC_IntSrc_EOC1
Denotes that interrupt source is the end of conversion for SOC1.
Definition: adc.h:291
ADC_SocNumber_3
Denotes SOC3.
Definition: adc.h:393
ADC_SocSampleDelay_54_cycles
Denotes an SOC sample delay of 54 cycles.
Definition: adc.h:445
ADC_SampleMode_SOC4_and_SOC5_Separate
Denotes SOC4 and SOC5 are sampled separately.
Definition: adc.h:338
ADC_SocNumber_13
Denotes SOC13.
Definition: adc.h:403
ADC_SocNumber_14
Denotes SOC14.
Definition: adc.h:404
ADC_SampleMode_SOC4_and_SOC5_Together
Denotes SOC4 and SOC5 are sampled together.
Definition: adc.h:346
_ADC_Obj_::ADCREFTRIM
volatile uint16_t ADCREFTRIM
ADC Reference/Gain Trim Register.
Definition: adc_obj.h:79
ADC_IntSrc_EOC9
Denotes that interrupt source is the end of conversion for SOC9.
Definition: adc.h:299
ADC_ResultNumber_0
Denotes ADCRESULT0.
Definition: adc.h:313
ADC_ResultNumber_3
Denotes ADCRESULT3.
Definition: adc.h:316
ADC_SocFrc_9
Denotes soc 9 forced conversion.
Definition: adc.h:513
_ADC_Obj_::INTSELxNy
volatile uint16_t INTSELxNy[5]
ADC Interrupt Select x and y Register.
Definition: adc_obj.h:60
ADC_DivideSelect_ClkIn_by_1
Denotes Main Clock Prescaling of 0.
Definition: adc.h:225
ADC_SocChanNumber_B5
Denotes SOC channel number B5.
Definition: adc.h:372
ADC_SocSampleDelay_25_cycles
Denotes an SOC sample delay of 25 cycles.
Definition: adc.h:426
ADC_readResult
static uint_least16_t ADC_readResult(ADC_Handle adcHandle, const ADC_ResultNumber_e resultNumber)
Reads the specified ADC result (i.e. value)
Definition: adc.h:693
ADC_ResultNumber_4
Denotes ADCRESULT4.
Definition: adc.h:317
ADC_SampleMode_SOC10_and_SOC11_Separate
Denotes SOC10 and SOC11 are sampled separately.
Definition: adc.h:341
ADC_SocSampleDelay_8_cycles
Denotes an SOC sample delay of 8 cycles.
Definition: adc.h:414
ADC_SampleMode_SOC14_and_SOC15_Separate
Denotes SOC14 and SOC15 are sampled separately.
Definition: adc.h:343
ADC_IntNumber_5
Denotes ADCINT5.
Definition: adc.h:238
ADC_SocFrc_7
Denotes soc 7 forced conversion.
Definition: adc.h:511
ADC_SampleMode_SOC0_and_SOC1_Separate
Denotes SOC0 and SOC1 are sampled separately.
Definition: adc.h:336
cpu.h
Contains public interface to various functions related to the central processing unit (CPU) object...
ADC_SocNumber_15
Denotes SOC15.
Definition: adc.h:405
_ADC_Obj_::ADCREV
volatile uint16_t ADCREV
ADC Revision Register.
Definition: adc_obj.h:82
ADC_ADCSAMPLEMODE_SEPARATE_FLAG
#define ADC_ADCSAMPLEMODE_SEPARATE_FLAG
Define for the channel separate flag.
Definition: adc.h:214
_ADC_Obj_::rsvd_11
volatile uint16_t rsvd_11[16]
Reserved.
Definition: adc_obj.h:78
_ADC_Obj_::rsvd_9
volatile uint16_t rsvd_9
Reserved.
Definition: adc_obj.h:74
ADC_SampleMode_SOC12_and_SOC13_Separate
Denotes SOC12 and SOC13 are sampled separately.
Definition: adc.h:342
ADC_ResultNumber_6
Denotes ADCRESULT6.
Definition: adc.h:319
ADC_SocSampleDelay_51_cycles
Denotes an SOC sample delay of 51 cycles.
Definition: adc.h:442
ADC_SocFrc_3
Denotes soc 3 forced conversion.
Definition: adc.h:507
ADC_SocChanNumber_A6_and_B6_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:381
ADC_SocTrigSrc_EPWM7_ADCSOCB
Denotes a EPWM7, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:476
ADC_SocFrc_11
Denotes soc 11 forced conversion.
Definition: adc.h:515
ADC_IntSrc_EOC7
Denotes that interrupt source is the end of conversion for SOC7.
Definition: adc.h:297
ADC_TempSensorSrc_Int
Denotes an internal temperature source.
Definition: adc.h:487
ADC_clearIntFlag
static void ADC_clearIntFlag(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Clears the analog-to-digital converter (ADC) interrupt flag.
Definition: adc.h:578
_ADC_Obj_::ADCSOCFLG1
volatile uint16_t ADCSOCFLG1
ADC SOC Flag 1 Register.
Definition: adc_obj.h:69
ADC_Int2TriggersSOC
Denotes that ADCINT2 will trigger SOCx. TRIGSEL field is ignored.
Definition: adc.h:273
ADC_IntSrc_EOC12
Denotes that interrupt source is the end of conversion for SOC12.
Definition: adc.h:302
ADC_SocSampleDelay_e
ADC_SocSampleDelay_e
Enumeration to define the start of conversion (SOC) sample delays.
Definition: adc.h:411
ADC_IntSrc_EOC10
Denotes that interrupt source is the end of conversion for SOC10.
Definition: adc.h:300
ADC_SocTrigSrc_EPWM3_ADCSOCB
Denotes a EPWM3, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:468
ADC_SocFrc_14
Denotes soc 14 forced conversion.
Definition: adc.h:518
ADC_setSocChanNumber
void ADC_setSocChanNumber(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocChanNumber_e chanNumber)
Sets the start-of-conversion (SOC) channel number.
Definition: adc.c:368
ADC_ResultNumber_7
Denotes ADCRESULT7.
Definition: adc.h:320
ADC_SocSampleDelay_13_cycles
Denotes an SOC sample delay of 13 cycles.
Definition: adc.h:419
ADC_ResultNumber_5
Denotes ADCRESULT5.
Definition: adc.h:318
ADC_enableRefBuffers
void ADC_enableRefBuffers(ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC) reference buffers circuit.
Definition: adc.c:176
ADC_ADCCTL2_Overlap
Denotes that sample and conversion overlap is allowed.
Definition: adc.h:262
ADC_SampleMode_SOC6_and_SOC7_Together
Denotes SOC6 and SOC7 are sampled together.
Definition: adc.h:347
ADC_SocSampleDelay_64_cycles
Denotes an SOC sample delay of 64 cycles.
Definition: adc.h:450
ADC_SocSampleDelay_40_cycles
Denotes an SOC sample delay of 40 cycles.
Definition: adc.h:436
ADC_SocSampleDelay_41_cycles
Denotes an SOC sample delay of 41 cycles.
Definition: adc.h:437
ADC_SocTrigSrc_EPWM7_ADCSOCA
Denotes a EPWM7, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:475
ADC_SocFrc_6
Denotes soc 6 forced conversion.
Definition: adc.h:510
ADC_SocFrc_2
Denotes soc 2 forced conversion.
Definition: adc.h:506
ADC_SocNumber_12
Denotes SOC12.
Definition: adc.h:402
ADC_SocChanNumber_A7_and_B7_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:382
ADC_IntSrc_EOC5
Denotes that interrupt source is the end of conversion for SOC5.
Definition: adc.h:295
ADC_SocSampleDelay_16_cycles
Denotes an SOC sample delay of 16 cycles.
Definition: adc.h:422
ADC_powerDown
void ADC_powerDown(ADC_Handle adcHandle)
Powers down the analog-to-digital converter (ADC)
Definition: adc.c:209
ADC_setIntSrc
void ADC_setIntSrc(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber, const ADC_IntSrc_e intSrc)
Sets the interrupt source.
Definition: adc.c:320
ADC_IntNumber_7
Denotes ADCINT7.
Definition: adc.h:240
ADC_SocChanNumber_A4_and_B4_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:379
ADC_IntMode_e
ADC_IntMode_e
Enumeration to define the analog-to-digital converter (ADC) interrupt mode.
Definition: adc.h:251
_ADC_Obj_::rsvd_5
volatile uint16_t rsvd_5
Reserved.
Definition: adc_obj.h:65
ADC_SocChanNumber_e
ADC_SocChanNumber_e
Enumeration to define the start of conversion (SOC) channel numbers.
Definition: adc.h:357
ADC_SocSampleDelay_36_cycles
Denotes an SOC sample delay of 36 cycles.
Definition: adc.h:432
ADC_setTempSensorSrc
void ADC_setTempSensorSrc(ADC_Handle adcHandle, const ADC_TempSensorSrc_e sensorSrc)
Sets the temperature sensor source.
Definition: adc.c:460
ADC_setSocFrc
void ADC_setSocFrc(ADC_Handle adcHandle, const ADC_SocFrc_e socFrc)
Sets the start-of-conversion (SOC) force register.
Definition: adc.c:428
ADC_ResultNumber_9
Denotes ADCRESULT9.
Definition: adc.h:322
ADC_SocSampleDelay_23_cycles
Denotes an SOC sample delay of 23 cycles.
Definition: adc.h:424
_ADC_Obj_::rsvd_4
volatile uint16_t rsvd_4
Reserved.
Definition: adc_obj.h:63
ADC_SocNumber_8
Denotes SOC8.
Definition: adc.h:398
ADC_SocChanNumber_A1_and_B1_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:376
ADC_SocFrc_5
Denotes soc 5 forced conversion.
Definition: adc.h:509
ADC_SampleMode_SOC8_and_SOC9_Together
Denotes SOC8 and SOC9 are sampled together.
Definition: adc.h:348
_ADC_Obj_::ADCOFFTRIM
volatile uint16_t ADCOFFTRIM
ADC Offset Trim Register.
Definition: adc_obj.h:80
ADC_SocTrigSrc_EPWM6_ADCSOCB
Denotes a EPWM7, ADCSOCB trigger source for the SOC flag.
Definition: adc.h:474
ADC_SocSampleDelay_49_cycles
Denotes an SOC sample delay of 49 cycles.
Definition: adc.h:440
ADC_IntSrc_EOC6
Denotes that interrupt source is the end of conversion for SOC6.
Definition: adc.h:296
ADC_SocTrigSrc_EPWM3_ADCSOCA
Denotes a EPWM3, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:467
ADC_ADCCTL2_ADCNONOVERLAP_e
ADC_ADCCTL2_ADCNONOVERLAP_e
Enumeration to define the analog-to-digital converter (ADC) sample and conversion overlap setting...
Definition: adc.h:260
ADC_powerUp
void ADC_powerUp(ADC_Handle adcHandle)
Powers up the analog-to-digital converter (ADC)
Definition: adc.c:225
ADC_VoltageRefSrc_Int
Denotes an internal voltage reference source.
Definition: adc.h:495
ADC_SocNumber_2
Denotes SOC2.
Definition: adc.h:392
ADC_SocTrigSrc_CpuTimer_2
Denotes a CPUTIMER2 trigger source for the SOC flag.
Definition: adc.h:461
ADC_disableInt
void ADC_disableInt(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Disables the analog-to-digital converter (ADC) interrupt.
Definition: adc.c:90
ADC_SocSampleDelay_10_cycles
Denotes an SOC sample delay of 10 cycles.
Definition: adc.h:416
ADC_SocChanNumber_A2
Denotes SOC channel number A2.
Definition: adc.h:361
ADC_SocFrc_0
Denotes soc 0 forced conversion.
Definition: adc.h:504
ADC_Int1TriggersSOC
Denotes that ADCINT1 will trigger SOCx. TRIGSEL field is ignored.
Definition: adc.h:272
ADC_SocNumber_10
Denotes SOC10.
Definition: adc.h:400
_ADC_Obj_::ADCSOCOVF1
volatile uint16_t ADCSOCOVF1
ADC SOC Overflow 1 Register.
Definition: adc_obj.h:73
ADC_TempSensorSrc_Ext
Denotes an external temperature source.
Definition: adc.h:486
ADC_SocTrigSrc_Sw
Denotes a software trigger source for the SOC flag.
Definition: adc.h:458
_ADC_Obj_::rsvd_7
volatile uint16_t rsvd_7
Reserved.
Definition: adc_obj.h:70
ADC_SocChanNumber_A3_and_B3_Together
Denotes SOC channel number A0 and B0 together.
Definition: adc.h:378
ADC_DivideSelect_ClkIn_by_2
Denotes Main Clock Prescaling of 2.
Definition: adc.h:226
ADC_NoIntTriggersSOC
Denotes that no ADCINT will trigger SOCx. TRIGSEL field determines SOCx trigger.
Definition: adc.h:271
ADC_SocTrigSrc_EPWM2_ADCSOCA
Denotes a EPWM2, ADCSOCA trigger source for the SOC flag.
Definition: adc.h:465
ADC_IntNumber_8
Denotes ADCINT8.
Definition: adc.h:241
ADC_setSocSampleDelay
void ADC_setSocSampleDelay(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocSampleDelay_e sampleDelay)
Sets the start-of-conversion (SOC) sample delay.
Definition: adc.c:388
ADC_ResultNumber_8
Denotes ADCRESULT8.
Definition: adc.h:321
ADC_IntNumber_4
Denotes ADCINT4.
Definition: adc.h:237
ADC_IntNumber_2HP
Denotes ADCINT2 High Priority for use with PIE_enableAdcInt() only.
Definition: adc.h:244
ADC_SocChanNumber_A0
Denotes SOC channel number A0.
Definition: adc.h:359
ADC_disable
void ADC_disable(ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC)
Definition: adc.c:59
ADC_SocChanNumber_B1
Denotes SOC channel number B1.
Definition: adc.h:368
ADC_IntSrc_EOC8
Denotes that interrupt source is the end of conversion for SOC8.
Definition: adc.h:298
_ADC_Obj_::ADCRESULT
volatile uint16_t ADCRESULT[16]
ADC result registers.
Definition: adc_obj.h:52
ADC_setDivideSelect
void ADC_setDivideSelect(ADC_Handle adcHandle, const ADC_DivideSelect_e divSelect)
Sets the analog-to-digital converter (ADC) divide select value.
Definition: adc.c:514