MotorWare f2806x Driver API Documentation

- Main Page
- Modules
- Data Structures
- Files

- File List
- Globals

gpio.c
Go to the documentation of this file.
1 /* --COPYRIGHT--,BSD
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
27 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * --/COPYRIGHT--*/
37
38
39 // **************************************************************************
40 // the includes
41
42
43 #include "sw/drivers/gpio/src/32b/f28x/f2806x/gpio.h"
44
45
46 // **************************************************************************
47 // the defines
48
49
50 // **************************************************************************
51 // the globals
52
53
54 // **************************************************************************
55 // the functions
56
57 bool GPIO_getData(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
58 {
59 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
60
61
62 if(gpioNumber < GPIO_Number_32)
63 {
64 return (bool)((gpio->GPADAT >> gpioNumber) & 0x0001);
65 }
66 else
67 {
68 return (bool)((gpio->GPBDAT >> (gpioNumber - GPIO_Number_32)) & 0x0001);
69 }
70
71 } // end of GPIO_getData() function
72
73
74 uint16_t GPIO_getPortData(GPIO_Handle gpioHandle, const GPIO_Port_e gpioPort)
75 {
76 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
77
78 if(gpioPort == GPIO_Port_A)
79 {
80 return (gpio->GPADAT);
81 }
82 else if(gpioPort == GPIO_Port_B)
83 {
84 return (gpio->GPBDAT);
85 }
86
87 return (NULL);
88
89 } // end of GPIO_getPortData() function
90
91
92 GPIO_Handle GPIO_init(void *pMemory,const size_t numBytes)
93 {
94 GPIO_Handle gpioHandle;
95
96
97 if(numBytes < sizeof(GPIO_Obj))
98 {
99 return((GPIO_Handle)NULL);
100 }
101
102 // assign the handle
103 gpioHandle = (GPIO_Handle)pMemory;
104
105 return(gpioHandle);
106 } // end of GPIO_init() function
107
108
109 void GPIO_setPullup(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber,const GPIO_Pullup_e pullup)
110 {
111 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
112
113
114 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
115
116 if(gpioNumber < GPIO_Number_32)
117 {
118 // clear the bit
119 gpio->GPAPUD &= (~((uint32_t)1 << gpioNumber));
120
121 // set the bit
122 gpio->GPAPUD |= (uint32_t)pullup << gpioNumber;
123 }
124 else
125 {
126 // clear the bit
127 gpio->GPBPUD &= (~((uint32_t)1 << (gpioNumber - GPIO_Number_32)));
128
129 // set the bit
130 gpio->GPBPUD |= (uint32_t)pullup << (gpioNumber - GPIO_Number_32);
131 }
132
133 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
134
135 return;
136 } // end of GPIO_setPullup() function
137
138
139 void GPIO_setDirection(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber,const GPIO_Direction_e direction)
140 {
141 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
142
143
144 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
145
146 if(gpioNumber < GPIO_Number_32)
147 {
148 // clear the bit
149 gpio->GPADIR &= (~((uint32_t)1 << gpioNumber));
150
151 // set the bit
152 gpio->GPADIR |= (uint32_t)direction << gpioNumber;
153 }
154 else
155 {
156 // clear the bit
157 gpio->GPBDIR &= (~((uint32_t)1 << (gpioNumber - GPIO_Number_32)));
158
159 // set the bit
160 gpio->GPBDIR |= (uint32_t)direction << (gpioNumber - GPIO_Number_32);
161 }
162
163 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
164
165 return;
166 } // end of GPIO_setDirection() function
167
168
169 void GPIO_setExtInt(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber,const CPU_ExtIntNumber_e intNumber)
170 {
171 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
172
173
174 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
175
176 // associate the interrupt with the GPIO pin
177 gpio->GPIOXINTnSEL[intNumber] = gpioNumber;
178
179 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
180
181 return;
182 } // end of GPIO_setExtInt() function
183
184
185 bool GPIO_read(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber)
186 {
187 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
188 bool gpio_status = 0;
189 uint32_t gpio_read = 0;
190
191
192 if(gpioNumber < GPIO_Number_32)
193 {
194 gpio_read = (gpio->GPADAT) & ((uint32_t)1 << gpioNumber);
195 }
196 else
197 {
198 gpio_read = (gpio->GPBDAT) & ((uint32_t)1 << (gpioNumber - GPIO_Number_32));
199 }
200
201 if(gpio_read == 0)
202 {
203 gpio_status = LOW;
204 }
205 else
206 {
207 gpio_status = HIGH;
208 }
209
210
211 return(gpio_status);
212 } // end of GPIO_read() function
213
214
215 void GPIO_setHigh(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber)
216 {
217 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
218
219
220 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
221
222 if(gpioNumber < GPIO_Number_32)
223 {
224 gpio->GPASET = (uint32_t)1 << gpioNumber;
225 }
226 else
227 {
228 gpio->GPBSET = (uint32_t)1 << (gpioNumber - GPIO_Number_32);
229 }
230
231 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
232
233 return;
234 } // end of GPIO_setHigh() function
235
236
237 void GPIO_setLow(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber)
238 {
239 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
240
241
242 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
243
244 if(gpioNumber < GPIO_Number_32)
245 {
246 gpio->GPACLEAR = (uint32_t)1 << gpioNumber;
247 }
248 else
249 {
250 gpio->GPBCLEAR = (uint32_t)1 << (gpioNumber - GPIO_Number_32);
251 }
252
253 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
254
255 return;
256 } // end of GPIO_setLow() function
257
258
259 void GPIO_setMode(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber,const GPIO_Mode_e mode)
260 {
261 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
262
263
264 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
265
266 if(gpioNumber < (GPIO_GPMUX_NUMGPIOS_PER_REG * 1))
267 {
268 uint_least8_t lShift = gpioNumber << 1;
269 uint32_t clearBits = (uint32_t)GPIO_GPMUX_CONFIG_BITS << lShift;
270 uint32_t setBits = (uint32_t)mode << lShift;
271
272 // clear the bits
273 gpio->GPAMUX1 &= (~clearBits);
274
275 // set the bits
276 gpio->GPAMUX1 |= setBits;
277 }
278 else if(gpioNumber < (GPIO_GPMUX_NUMGPIOS_PER_REG * 2))
279 {
280 uint_least8_t lShift = (gpioNumber - (GPIO_GPMUX_NUMGPIOS_PER_REG * 1)) << 1;
281 uint32_t clearBits = (uint32_t)GPIO_GPMUX_CONFIG_BITS << lShift;
282 uint32_t setBits = (uint32_t)mode << lShift;
283
284 // clear the bits
285 gpio->GPAMUX2 &= (~clearBits);
286
287 // set the bits
288 gpio->GPAMUX2 |= setBits;
289 }
290 else if(gpioNumber < (GPIO_GPMUX_NUMGPIOS_PER_REG * 3))
291 {
292 uint_least8_t lShift = (gpioNumber - (GPIO_GPMUX_NUMGPIOS_PER_REG * 2)) << 1;
293 uint32_t clearBits = (uint32_t)GPIO_GPMUX_CONFIG_BITS << lShift;
294 uint32_t setBits = (uint32_t)mode << lShift;
295
296 // clear the bits
297 gpio->GPBMUX1 &= (~clearBits);
298
299 // set the bits
300 gpio->GPBMUX1 |= setBits;
301 }
302 else if(gpioNumber < (GPIO_GPMUX_NUMGPIOS_PER_REG * 4))
303 {
304 uint_least8_t lShift = (gpioNumber - (GPIO_GPMUX_NUMGPIOS_PER_REG * 3)) << 1;
305 uint32_t clearBits = (uint32_t)GPIO_GPMUX_CONFIG_BITS << lShift;
306 uint32_t setBits = (uint32_t)mode << lShift;
307
308 // clear the bits
309 gpio->GPBMUX2 &= (~clearBits);
310
311 // set the bits
312 gpio->GPBMUX2 |= setBits;
313 }
314
315 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
316
317 return;
318 } // end of GPIO_setMode() function
319
320
321 void GPIO_setPortData(GPIO_Handle gpioHandle, const GPIO_Port_e gpioPort, const uint16_t data)
322 {
323 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
324
325 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
326
327 if(gpioPort == GPIO_Port_A)
328 {
329 gpio->GPADAT = data;
330 }
331 else if(gpioPort == GPIO_Port_B)
332 {
333 gpio->GPBDAT = data;
334 }
335
336 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
337
338 return;
339 } // end of GPIO_setPortData() function
340
341 void GPIO_setQualification(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const GPIO_Qual_e qualification)
342 {
343 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
344
345
346 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
347
348 if(gpioNumber <= ((GPIO_GPxQSELx_NUMGPIOS_PER_REG * 1) - 1))
349 {
350 uint32_t clearBits = (uint32_t)GPIO_GPxQSELy_GPIOx_BITS << (2 * gpioNumber);
351 gpio->GPAQSEL1 &= ~(clearBits);
352 gpio->GPAQSEL1 |= (uint32_t)qualification << (2 * gpioNumber);
353 }
354 else if(gpioNumber <= ((GPIO_GPxQSELx_NUMGPIOS_PER_REG * 2) - 1))
355 {
356 uint32_t clearBits = (uint32_t)GPIO_GPxQSELy_GPIOx_BITS << (2 * (gpioNumber - (GPIO_GPxQSELx_NUMGPIOS_PER_REG * 1)));
357 gpio->GPAQSEL2 &= ~(clearBits);
358 gpio->GPAQSEL2 |= (uint32_t)qualification << (2 * (gpioNumber - (GPIO_GPxQSELx_NUMGPIOS_PER_REG * 1)));
359 }
360 else if(gpioNumber <= ((GPIO_GPxQSELx_NUMGPIOS_PER_REG * 3) - 1))
361 {
362 uint32_t clearBits = (uint32_t)GPIO_GPxQSELy_GPIOx_BITS << (2 * (gpioNumber - (GPIO_GPxQSELx_NUMGPIOS_PER_REG * 2)));
363 gpio->GPBQSEL1 &= ~(clearBits);
364 gpio->GPBQSEL1 |= (uint32_t)qualification << (2 * (gpioNumber - (GPIO_GPxQSELx_NUMGPIOS_PER_REG * 2)));
365 }
366 else if(gpioNumber <= ((GPIO_GPxQSELx_NUMGPIOS_PER_REG * 4) - 1))
367 {
368 uint32_t clearBits = (uint32_t)GPIO_GPxQSELy_GPIOx_BITS << (2 * (gpioNumber - (GPIO_GPxQSELx_NUMGPIOS_PER_REG * 3)));
369 gpio->GPBQSEL2 &= ~(clearBits);
370 gpio->GPBQSEL2 |= (uint32_t)qualification << (2 * (gpioNumber - (GPIO_GPxQSELx_NUMGPIOS_PER_REG * 3)));
371 }
372
373 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
374
375 return;
376 } // end of GPIO_setQualification() function
377
378 void GPIO_setQualificationPeriod(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const uint_least8_t period)
379 {
380 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
381
382 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
383
384 if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 1) - 1))
385 {
386 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS;
387 gpio->GPACTRL &= ~(clearBits);
388 gpio->GPACTRL |= (uint32_t)period;
389 }
390 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 2) - 1))
391 {
392 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS << 8;
393 gpio->GPACTRL &= ~(clearBits);
394 gpio->GPACTRL |= (uint32_t)period << 8;
395 }
396 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 3) - 1))
397 {
398 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS << 16;
399 gpio->GPACTRL &= ~(clearBits);
400 gpio->GPACTRL |= (uint32_t)period << 16;
401 }
402 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 4) - 1))
403 {
404 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS << 24;
405 gpio->GPACTRL &= ~(clearBits);
406 gpio->GPACTRL |= (uint32_t)period << 24;
407 }
408 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 5) - 1))
409 {
410 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS;
411 gpio->GPBCTRL &= ~(clearBits);
412 gpio->GPBCTRL |= (uint32_t)period;
413 }
414 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 6) - 1))
415 {
416 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS << 8;
417 gpio->GPBCTRL &= ~(clearBits);
418 gpio->GPBCTRL |= (uint32_t)period << 8;
419 }
420 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 7) - 1))
421 {
422 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS << 16;
423 gpio->GPBCTRL &= ~(clearBits);
424 gpio->GPBCTRL |= (uint32_t)period << 16;
425 }
426 else if(gpioNumber <= ((GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG * 8) - 1))
427 {
428 uint32_t clearBits = (uint32_t)GPIO_GPxCTRL_QUALPRDx_BITS << 24;
429 gpio->GPBCTRL &= ~(clearBits);
430 gpio->GPBCTRL |= (uint32_t)period << 24;
431 }
432
433 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
434
435 return;
436 } // end of GPIO_setQualificationPeriod() function
437
438
439 void GPIO_toggle(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber)
440 {
441 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
442
443
444 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
445
446 if(gpioNumber < GPIO_Number_32)
447 {
448 gpio->GPATOGGLE = (uint32_t)1 << gpioNumber;
449 }
450 else
451 {
452 gpio->GPBTOGGLE = (uint32_t)1 << (gpioNumber - GPIO_Number_32);
453 }
454
455 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
456
457 return;
458 } // end of GPIO_toggle() function
459
460
461 void GPIO_lpmSelect(GPIO_Handle gpioHandle,const GPIO_Number_e gpioNumber)
462 {
463 GPIO_Obj *gpio = (GPIO_Obj *)gpioHandle;
464
465 ENABLE_PROTECTED_REGISTER_WRITE_MODE;
466
467 gpio->GPIOLPMSEL |= ((uint32_t)1 << gpioNumber);
468
469 DISABLE_PROTECTED_REGISTER_WRITE_MODE;
470
471 return;
472 } // end of GPIO_lpmSelect() function
GPIO_setQualification
void GPIO_setQualification(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const GPIO_Qual_e qualification)
Sets the qualification for the specified general purpose I/O (GPIO)
Definition: gpio.c:341
GPIO_Mode_e
GPIO_Mode_e
Enumeration to define the general purpose I/O (GPIO) modes for each pin.
Definition: gpio.h:100
GPIO_getData
bool GPIO_getData(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Returns the data value present on a pin (either input or output)
Definition: gpio.c:57
DISABLE_PROTECTED_REGISTER_WRITE_MODE
#define DISABLE_PROTECTED_REGISTER_WRITE_MODE
Define to disable protected register writes.
Definition: cpu.h:101
_GPIO_Obj_::GPAQSEL1
volatile uint32_t GPAQSEL1
GPIO A Qualifier Select 1 Register.
Definition: gpio.h:426
GPIO_GPMUX_NUMGPIOS_PER_REG
#define GPIO_GPMUX_NUMGPIOS_PER_REG
Defines number of GPIOs covered by each GPxMUX register.
Definition: gpio.h:74
GPIO_setHigh
void GPIO_setHigh(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Sets the specified general purpose I/O (GPIO) signal high.
Definition: gpio.c:215
_GPIO_Obj_::GPADIR
volatile uint32_t GPADIR
GPIO A Direction Register.
Definition: gpio.h:430
gpio.h
Contains public interface to general purpose I/O (GPIO) methods.
GPIO_Port_B
GPIO Port B.
Definition: gpio.h:355
_GPIO_Obj_::GPASET
volatile uint32_t GPASET
GPIO A Set Register.
Definition: gpio.h:446
_GPIO_Obj_::GPBDIR
volatile uint32_t GPBDIR
GPIO B Direction Register.
Definition: gpio.h:438
GPIO_GPxCTRL_QUALPRDx_BITS
#define GPIO_GPxCTRL_QUALPRDx_BITS
Defines the location of the GPIOx bits in the GPxQSELy register.
Definition: gpio.h:88
GPIO_init
GPIO_Handle GPIO_init(void *pMemory, const size_t numBytes)
Initializes the general purpose I/O (GPIO) object handle.
Definition: gpio.c:92
GPIO_Port_A
GPIO Port A.
Definition: gpio.h:354
GPIO_Number_32
Denotes GPIO number 32.
Definition: gpio.h:395
GPIO_setQualificationPeriod
void GPIO_setQualificationPeriod(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const uint_least8_t period)
Sets the qualification period for the specified general purpose I/O block (8 I/O's per block) ...
Definition: gpio.c:378
_GPIO_Obj_::GPBQSEL2
volatile uint32_t GPBQSEL2
GPIO B Qualifier Select 2 Register.
Definition: gpio.h:435
GPIO_Direction_e
GPIO_Direction_e
Enumeration to define the general purpose I/O (GPIO) directions.
Definition: gpio.h:323
_GPIO_Obj_::GPBSET
volatile uint32_t GPBSET
GPIO B Set Register.
Definition: gpio.h:450
ENABLE_PROTECTED_REGISTER_WRITE_MODE
#define ENABLE_PROTECTED_REGISTER_WRITE_MODE
Define to allow protected register writes.
Definition: cpu.h:93
_GPIO_Obj_::GPBCLEAR
volatile uint32_t GPBCLEAR
GPIO B Clear Register.
Definition: gpio.h:451
GPIO_GPMUX_CONFIG_BITS
#define GPIO_GPMUX_CONFIG_BITS
Defines the location of the CONFIG bits in the GPMUX register.
Definition: gpio.h:71
_GPIO_Obj_::GPAPUD
volatile uint32_t GPAPUD
GPIO A Pull Up Disable Register.
Definition: gpio.h:431
_GPIO_Obj_::GPACTRL
volatile uint32_t GPACTRL
GPIO A Control Register.
Definition: gpio.h:425
_GPIO_Obj_::GPIOLPMSEL
volatile uint32_t GPIOLPMSEL
GPIO Low Power Mode Wakeup Select Register.
Definition: gpio.h:460
_GPIO_Obj_::GPBTOGGLE
volatile uint32_t GPBTOGGLE
GPIO B Toggle Register.
Definition: gpio.h:452
GPIO_Pullup_e
GPIO_Pullup_e
Enumeration to define the general purpose I/O (GPIO) pullups.
Definition: gpio.h:332
GPIO_GPxQSELx_NUMGPIOS_PER_REG
#define GPIO_GPxQSELx_NUMGPIOS_PER_REG
Defines number of GPIOs covered by each GPxQSELy register.
Definition: gpio.h:83
GPIO_read
bool GPIO_read(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Reads the specified general purpose I/O (GPIO)
Definition: gpio.c:185
_GPIO_Obj_
Defines the General Purpose I/O (GPIO) object.
Definition: gpio.h:423
_GPIO_Obj_::GPBQSEL1
volatile uint32_t GPBQSEL1
GPIO B Qualifier Select 1 Register.
Definition: gpio.h:434
GPIO_setPullup
void GPIO_setPullup(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const GPIO_Pullup_e pullup)
Sets the general purpose I/O (GPIO) pullup disable.
Definition: gpio.c:109
GPIO_setDirection
void GPIO_setDirection(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const GPIO_Direction_e direction)
Sets the general purpose I/O (GPIO) signal direction.
Definition: gpio.c:139
_GPIO_Obj_::GPBDAT
volatile uint32_t GPBDAT
GPIO B Data Register.
Definition: gpio.h:449
_GPIO_Obj_::GPBMUX1
volatile uint32_t GPBMUX1
GPIO B MUX 1 Register.
Definition: gpio.h:436
GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG
#define GPIO_GPxCTRL_QUALPRDx_NUMBITS_PER_REG
Defines number of bits per QUALPRDx field per GPxCTRL register.
Definition: gpio.h:92
GPIO_setLow
void GPIO_setLow(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Sets the specified general purpose I/O (GPIO) signal low.
Definition: gpio.c:237
GPIO_getPortData
uint16_t GPIO_getPortData(GPIO_Handle gpioHandle, const GPIO_Port_e gpioPort)
Returns the data value present on a GPIO port.
Definition: gpio.c:74
_GPIO_Obj_::GPBCTRL
volatile uint32_t GPBCTRL
GPIO B Control Register.
Definition: gpio.h:433
_GPIO_Obj_::GPAMUX1
volatile uint32_t GPAMUX1
GPIO A MUX 1 Register.
Definition: gpio.h:428
GPIO_setPortData
void GPIO_setPortData(GPIO_Handle gpioHandle, const GPIO_Port_e gpioPort, const uint16_t data)
Sets data output on a given GPIO port.
Definition: gpio.c:321
_GPIO_Obj_::GPATOGGLE
volatile uint32_t GPATOGGLE
GPIO A Toggle Register.
Definition: gpio.h:448
GPIO_toggle
void GPIO_toggle(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Toggles the specified general purpose I/O (GPIO) signal.
Definition: gpio.c:439
CPU_ExtIntNumber_e
CPU_ExtIntNumber_e
Enumeration to define the external interrupt numbers.
Definition: cpu.h:404
_GPIO_Obj_::GPBMUX2
volatile uint32_t GPBMUX2
GPIO B MUX 2 Register.
Definition: gpio.h:437
GPIO_Handle
struct _GPIO_Obj_ * GPIO_Handle
Defines the general purpose I/O (GPIO) handle.
Definition: gpio.h:466
_GPIO_Obj_::GPBPUD
volatile uint32_t GPBPUD
GPIO B Pull Up Disable Register.
Definition: gpio.h:439
_GPIO_Obj_::GPACLEAR
volatile uint32_t GPACLEAR
GPIO A Clear Register.
Definition: gpio.h:447
GPIO_Qual_e
GPIO_Qual_e
Enumeration to define the general purpose I/O (GPIO) qualification.
Definition: gpio.h:341
_GPIO_Obj_::GPAMUX2
volatile uint32_t GPAMUX2
GPIO A MUX 2 Register.
Definition: gpio.h:429
_GPIO_Obj_::GPADAT
volatile uint32_t GPADAT
GPIO A Data Register.
Definition: gpio.h:445
_GPIO_Obj_::GPAQSEL2
volatile uint32_t GPAQSEL2
GPIO A Qualifier Select 2 Register.
Definition: gpio.h:427
GPIO_setMode
void GPIO_setMode(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const GPIO_Mode_e mode)
Sets the mode for the specified general purpose I/O (GPIO) signal.
Definition: gpio.c:259
GPIO_lpmSelect
void GPIO_lpmSelect(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber)
Selects a gpio pin to wake up device from STANDBY and HALT LPM.
Definition: gpio.c:461
GPIO_setExtInt
void GPIO_setExtInt(GPIO_Handle gpioHandle, const GPIO_Number_e gpioNumber, const CPU_ExtIntNumber_e intNumber)
Sets the general purpose I/O (GPIO) external interrupt number.
Definition: gpio.c:169
_GPIO_Obj_::GPIOXINTnSEL
volatile uint16_t GPIOXINTnSEL[3]
XINT1-3 Source Select Registers.
Definition: gpio.h:458
GPIO_Number_e
GPIO_Number_e
Enumeration to define the general purpose I/O (GPIO) numbers.
Definition: gpio.h:361
GPIO_GPxQSELy_GPIOx_BITS
#define GPIO_GPxQSELy_GPIOx_BITS
Defines the location of the GPIOx bits in the GPxQSELy register.
Definition: gpio.h:79
GPIO_Port_e
GPIO_Port_e
Enumeration to define the general purpose I/O (GPIO) ports.
Definition: gpio.h:352