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cla.h
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1 /* --COPYRIGHT--,BSD
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * --/COPYRIGHT--*/
33
34
35
36 #ifndef _CLA_H_
37 #define _CLA_H_
38
45
46
47 // **************************************************************************
48 // the includes
49
50 #include "sw/modules/types/src/types.h"
51
52 #ifdef __cplusplus
53 extern "C" {
54 #endif
55
56
57 //---------------------------------------------------------------------------
58 // CLA Control Register
59 struct MCTL_BITS { // bits description
60 uint16_t HARDRESET:1; // 0 Issue a hard reset
61 uint16_t SOFTRESET:1; // 1 Issue a soft reset
62 uint16_t IACKE:1; // 2 Enable IACK for task start
63 uint16_t rsvd1:13; // 15:3 reserved
64 };
65
66 union MCTL_REG {
67 uint16_t all;
68 struct MCTL_BITS bit;
69 };
70
71 //---------------------------------------------------------------------------
72 // CLA Memory Configuration Register
73 struct MMEMCFG_BITS { // bits description
74 uint16_t PROGE:1; // 0 Program RAM enable
75 uint16_t rsvd1:3; // 3:1 reserved
76 uint16_t RAM0E:1; // 4 Data RAM 0 enable
77 uint16_t RAM1E:1; // 5 Data RAM 1 enable
78 uint16_t rsvd2:10; // 15:6 reserved
79 };
80
81 union MMEMCFG_REG {
82 uint16_t all;
83 struct MMEMCFG_BITS bit;
84 };
85
86 //---------------------------------------------------------------------------
87 // CLA Peripheral Interrupt Select Register
88 struct MPISRCSEL1_BITS { // bits description
89 uint16_t PERINT1SEL:4; // 3:0 Source for CLA interrupt 1
90 uint16_t PERINT2SEL:4; // 7:4 Source for CLA interrupt 2
91 uint16_t PERINT3SEL:4; // 11:8 Source for CLA interrupt 3
92 uint16_t PERINT4SEL:4; // 15:12 Source for CLA interrupt 4
93 uint16_t PERINT5SEL:4; // 19:16 Source for CLA interrupt 5
94 uint16_t PERINT6SEL:4; // 23:20 Source for CLA interrupt 6
95 uint16_t PERINT7SEL:4; // 27:24 Source for CLA interrupt 7
96 uint16_t PERINT8SEL:4; // 31:28 Source for CLA interrupt 8
97 };
98
99 union MPISRCSEL1_REG {
100 uint32_t all;
101 struct MPISRCSEL1_BITS bit;
102 };
103
104 //---------------------------------------------------------------------------
105 // CLA Interrupt Registers
106 struct MIFR_BITS { // bits description
107 uint16_t INT1:1; // 0 Interrupt 1 flag
108 uint16_t INT2:1; // 1 Interrupt 2 flag
109 uint16_t INT3:1; // 2 Interrupt 3 flag
110 uint16_t INT4:1; // 3 Interrupt 4 flag
111 uint16_t INT5:1; // 4 Interrupt 5 flag
112 uint16_t INT6:1; // 5 Interrupt 6 flag
113 uint16_t INT7:1; // 6 Interrupt 7 flag
114 uint16_t INT8:1; // 7 Interrupt 8 flag
115 uint16_t rsvd:8;
116 };
117
118 union MIFR_REG {
119 uint16_t all;
120 struct MIFR_BITS bit;
121 };
122
123 union MIOVF_REG {
124 uint16_t all;
125 struct MIFR_BITS bit;
126 };
127
128 union MIFRC_REG {
129 uint16_t all;
130 struct MIFR_BITS bit;
131 };
132
133 union MICLR_REG {
134 uint16_t all;
135 struct MIFR_BITS bit;
136 };
137
138 union MICLROVF_REG {
139 uint16_t all;
140 struct MIFR_BITS bit;
141 };
142
143 union MIER_REG {
144 uint16_t all;
145 struct MIFR_BITS bit;
146 };
147
148 union MIRUN_REG {
149 uint16_t all;
150 struct MIFR_BITS bit;
151 };
152
153 //---------------------------------------------------------------------------
154 // CLA Status Register
155 struct MSTF_BITS { // bits description
156 uint16_t LVF:1; // 0 Latched overflow flag
157 uint16_t LUF:1; // 1 Latched underflow flag
158 uint16_t NF:1; // 2 Negative float flag
159 uint16_t ZF:1; // 3 Zero float flag
160 uint16_t rsvd1:2; // 5,4
161 uint16_t TF:1; // 6 Test flag
162 uint16_t rsvd2:2; // 8,7
163 uint16_t RNDF32:1; // 9 Rounding mode
164 uint16_t rsvd3:1; // 10
165 uint16_t MEALLOW:1; // 11 MEALLOW status
166 uint16_t RPCL:4; // 15:12 Return PC, low portion
167 uint16_t RPCH:8; // 23:16 Return PC, high portion
168 uint16_t rsvd4:8; // 31:24
169 };
170
171 union MSTF_REG {
172 uint32_t all;
173 struct MSTF_BITS bit;
174 };
175
176 union MR_REG {
177 uint32_t i32;
178 float f32;
179 };
180
181 //---------------------------------------------------------------------------
182 // External Interrupt Register File:
183 struct CLA_REGS {
184 uint16_t MVECT1; // Task 1 vector
185 uint16_t MVECT2; // Task 2 vector
186 uint16_t MVECT3; // Task 3 vector
187 uint16_t MVECT4; // Task 4 vector
188 uint16_t MVECT5; // Task 5 vector
189 uint16_t MVECT6; // Task 6 vector
190 uint16_t MVECT7; // Task 7 vector
191 uint16_t MVECT8; // Task 8 vector
192 uint16_t rsvd1[8];
193 union MCTL_REG MCTL; // CLA control
194 union MMEMCFG_REG MMEMCFG; // CLA memory configuration
195 uint16_t rsvd2[2];
196 union MPISRCSEL1_REG MPISRCSEL1; // CLA interrupt source select
197 uint16_t rsvd3[10];
198 union MIFR_REG MIFR; // CLA interrupt flag
199 union MIOVF_REG MIOVF; // CLA interrupt overflow flag
200 union MIFRC_REG MIFRC; // CLA interrupt force
201 union MICLR_REG MICLR; // CLA interrupt flag clear
202 union MICLROVF_REG MICLROVF; // CLA interrupt overflow flag clear
203 union MIER_REG MIER; // CLA interrupt enable
204 union MIRUN_REG MIRUN; // CLA interrupt run status
205 uint16_t rsvd10;
206 // Leading _ in front of execution registers avoids
207 // conflicts when using this header in assembly files
208 uint16_t _MPC; // CLA program counter
209 uint16_t rsvd4;
210 uint16_t _MAR0; // CLA auxillary register 0
211 uint16_t _MAR1; // CLA auxillary register 1
212 uint16_t rsvd5[2];
213 union MSTF_REG _MSTF; // CLA floating-point status register
214 union MR_REG _MR0; // CLA result register 0
215 uint32_t rsvd6;
216 union MR_REG _MR1; // CLA result register 1
217 uint32_t rsvd7;
218 union MR_REG _MR2; // CLA result register 2
219 uint32_t rsvd8;
220 union MR_REG _MR3; // CLA result register 3
221 uint32_t rsvd9;
222 };
223
224 //---------------------------------------------------------------------------
225 // External Interrupt References & Function Declarations:
226 //
227 extern volatile struct CLA_REGS Cla1Regs;
228
229 #ifdef __cplusplus
230 }
231 #endif /* extern "C" */
232
233 #endif // end of _CLA_H_ definition
234
235
MSTF_REG::all
uint32_t all
Definition: cla.h:172
MSTF_BITS::ZF
uint16_t ZF
Definition: cla.h:159
MIER_REG::bit
struct MIFR_BITS bit
Definition: cla.h:145
MIOVF_REG::bit
struct MIFR_BITS bit
Definition: cla.h:125
MCTL_BITS::HARDRESET
uint16_t HARDRESET
Definition: cla.h:60
MSTF_BITS::RPCL
uint16_t RPCL
Definition: cla.h:166
MIFR_BITS::rsvd
uint16_t rsvd
Definition: cla.h:115
CLA_REGS::rsvd10
uint16_t rsvd10
Definition: cla.h:205
MIER_REG
Definition: cla.h:143
MPISRCSEL1_BITS::PERINT2SEL
uint16_t PERINT2SEL
Definition: cla.h:90
CLA_REGS::rsvd1
uint16_t rsvd1[8]
Definition: cla.h:192
MPISRCSEL1_BITS::PERINT7SEL
uint16_t PERINT7SEL
Definition: cla.h:95
MCTL_REG::bit
struct MCTL_BITS bit
Definition: cla.h:68
MIFRC_REG::bit
struct MIFR_BITS bit
Definition: cla.h:130
MICLROVF_REG::bit
struct MIFR_BITS bit
Definition: cla.h:140
MCTL_REG
Definition: cla.h:66
MMEMCFG_REG::bit
struct MMEMCFG_BITS bit
Definition: cla.h:83
MICLR_REG::all
uint16_t all
Definition: cla.h:134
CLA_REGS::_MAR0
uint16_t _MAR0
Definition: cla.h:210
MSTF_BITS::rsvd3
uint16_t rsvd3
Definition: cla.h:164
MIFR_REG::bit
struct MIFR_BITS bit
Definition: cla.h:120
MMEMCFG_BITS
Definition: cla.h:73
CLA_REGS::_MR2
union MR_REG _MR2
Definition: cla.h:218
MIFR_BITS::INT8
uint16_t INT8
Definition: cla.h:114
MPISRCSEL1_BITS::PERINT8SEL
uint16_t PERINT8SEL
Definition: cla.h:96
MIFRC_REG::all
uint16_t all
Definition: cla.h:129
MIRUN_REG::bit
struct MIFR_BITS bit
Definition: cla.h:150
MIFR_REG::all
uint16_t all
Definition: cla.h:119
CLA_REGS::rsvd9
uint32_t rsvd9
Definition: cla.h:221
MIFR_BITS::INT5
uint16_t INT5
Definition: cla.h:111
MICLROVF_REG::all
uint16_t all
Definition: cla.h:139
MICLR_REG
Definition: cla.h:133
MCTL_BITS::IACKE
uint16_t IACKE
Definition: cla.h:62
MPISRCSEL1_BITS
Definition: cla.h:88
MSTF_BITS::NF
uint16_t NF
Definition: cla.h:158
CLA_REGS::rsvd8
uint32_t rsvd8
Definition: cla.h:219
MIFR_REG
Definition: cla.h:118
CLA_REGS::MPISRCSEL1
union MPISRCSEL1_REG MPISRCSEL1
Definition: cla.h:196
MSTF_BITS::MEALLOW
uint16_t MEALLOW
Definition: cla.h:165
MPISRCSEL1_REG::bit
struct MPISRCSEL1_BITS bit
Definition: cla.h:101
MSTF_BITS::RPCH
uint16_t RPCH
Definition: cla.h:167
CLA_REGS::_MSTF
union MSTF_REG _MSTF
Definition: cla.h:213
MSTF_BITS::rsvd4
uint16_t rsvd4
Definition: cla.h:168
CLA_REGS::_MAR1
uint16_t _MAR1
Definition: cla.h:211
CLA_REGS::_MR3
union MR_REG _MR3
Definition: cla.h:220
MSTF_BITS::LUF
uint16_t LUF
Definition: cla.h:157
CLA_REGS::MVECT6
uint16_t MVECT6
Definition: cla.h:189
CLA_REGS::MVECT1
uint16_t MVECT1
Definition: cla.h:184
MIRUN_REG
Definition: cla.h:148
MPISRCSEL1_REG::all
uint32_t all
Definition: cla.h:100
MMEMCFG_BITS::rsvd1
uint16_t rsvd1
Definition: cla.h:75
Cla1Regs
volatile struct CLA_REGS Cla1Regs
MMEMCFG_BITS::rsvd2
uint16_t rsvd2
Definition: cla.h:78
MSTF_BITS::RNDF32
uint16_t RNDF32
Definition: cla.h:163
MPISRCSEL1_BITS::PERINT4SEL
uint16_t PERINT4SEL
Definition: cla.h:92
MIFR_BITS::INT1
uint16_t INT1
Definition: cla.h:107
MMEMCFG_BITS::PROGE
uint16_t PROGE
Definition: cla.h:74
MICLROVF_REG
Definition: cla.h:138
MIFR_BITS
Definition: cla.h:106
CLA_REGS::rsvd6
uint32_t rsvd6
Definition: cla.h:215
CLA_REGS::MIFR
union MIFR_REG MIFR
Definition: cla.h:198
CLA_REGS::MICLR
union MICLR_REG MICLR
Definition: cla.h:201
MMEMCFG_BITS::RAM0E
uint16_t RAM0E
Definition: cla.h:76
MPISRCSEL1_BITS::PERINT1SEL
uint16_t PERINT1SEL
Definition: cla.h:89
MCTL_BITS::rsvd1
uint16_t rsvd1
Definition: cla.h:63
MR_REG
Definition: cla.h:176
CLA_REGS::MMEMCFG
union MMEMCFG_REG MMEMCFG
Definition: cla.h:194
CLA_REGS::MICLROVF
union MICLROVF_REG MICLROVF
Definition: cla.h:202
CLA_REGS::MVECT5
uint16_t MVECT5
Definition: cla.h:188
CLA_REGS::MIFRC
union MIFRC_REG MIFRC
Definition: cla.h:200
CLA_REGS::rsvd3
uint16_t rsvd3[10]
Definition: cla.h:197
CLA_REGS::MIRUN
union MIRUN_REG MIRUN
Definition: cla.h:204
MSTF_BITS::rsvd2
uint16_t rsvd2
Definition: cla.h:162
MSTF_BITS::LVF
uint16_t LVF
Definition: cla.h:156
MR_REG::f32
float f32
Definition: cla.h:178
MICLR_REG::bit
struct MIFR_BITS bit
Definition: cla.h:135
MCTL_BITS
Definition: cla.h:59
MIFR_BITS::INT6
uint16_t INT6
Definition: cla.h:112
MSTF_BITS
Definition: cla.h:155
MIFRC_REG
Definition: cla.h:128
CLA_REGS::_MPC
uint16_t _MPC
Definition: cla.h:208
MMEMCFG_REG
Definition: cla.h:81
MIER_REG::all
uint16_t all
Definition: cla.h:144
CLA_REGS::rsvd7
uint32_t rsvd7
Definition: cla.h:217
MCTL_BITS::SOFTRESET
uint16_t SOFTRESET
Definition: cla.h:61
MIFR_BITS::INT4
uint16_t INT4
Definition: cla.h:110
CLA_REGS::MCTL
union MCTL_REG MCTL
Definition: cla.h:193
CLA_REGS::MVECT4
uint16_t MVECT4
Definition: cla.h:187
CLA_REGS
Definition: cla.h:183
CLA_REGS::MVECT8
uint16_t MVECT8
Definition: cla.h:191
CLA_REGS::rsvd5
uint16_t rsvd5[2]
Definition: cla.h:212
MSTF_REG::bit
struct MSTF_BITS bit
Definition: cla.h:173
MIFR_BITS::INT7
uint16_t INT7
Definition: cla.h:113
MIOVF_REG::all
uint16_t all
Definition: cla.h:124
CLA_REGS::MIER
union MIER_REG MIER
Definition: cla.h:203
MPISRCSEL1_REG
Definition: cla.h:99
MPISRCSEL1_BITS::PERINT5SEL
uint16_t PERINT5SEL
Definition: cla.h:93
MCTL_REG::all
uint16_t all
Definition: cla.h:67
CLA_REGS::rsvd4
uint16_t rsvd4
Definition: cla.h:209
CLA_REGS::rsvd2
uint16_t rsvd2[2]
Definition: cla.h:195
CLA_REGS::MIOVF
union MIOVF_REG MIOVF
Definition: cla.h:199
MSTF_REG
Definition: cla.h:171
MIFR_BITS::INT2
uint16_t INT2
Definition: cla.h:108
MIOVF_REG
Definition: cla.h:123
MMEMCFG_REG::all
uint16_t all
Definition: cla.h:82
MPISRCSEL1_BITS::PERINT3SEL
uint16_t PERINT3SEL
Definition: cla.h:91
CLA_REGS::MVECT2
uint16_t MVECT2
Definition: cla.h:185
CLA_REGS::MVECT7
uint16_t MVECT7
Definition: cla.h:190
CLA_REGS::MVECT3
uint16_t MVECT3
Definition: cla.h:186
MSTF_BITS::TF
uint16_t TF
Definition: cla.h:161
MSTF_BITS::rsvd1
uint16_t rsvd1
Definition: cla.h:160
MIFR_BITS::INT3
uint16_t INT3
Definition: cla.h:109
CLA_REGS::_MR1
union MR_REG _MR1
Definition: cla.h:216
MMEMCFG_BITS::RAM1E
uint16_t RAM1E
Definition: cla.h:77
CLA_REGS::_MR0
union MR_REG _MR0
Definition: cla.h:214
MPISRCSEL1_BITS::PERINT6SEL
uint16_t PERINT6SEL
Definition: cla.h:94
MIRUN_REG::all
uint16_t all
Definition: cla.h:149
MR_REG::i32
uint32_t i32
Definition: cla.h:177