MotorWare f2806x Driver API Documentation

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Data Structures | Macros | Typedefs | Enumerations | Functions | Variables
CPU

## Data Structures
struct | _CPU_Obj_
| Defines the central processing unit (CPU) object. More...

## Macros
#define | EINT asm(" clrc INTM")
| Define to enable interrupts (legacy) More...
#define | ENABLE_INTERRUPTS asm(" clrc INTM")
| Define to enable interrupts. More...
#define | DINT asm(" setc INTM")
| Define to disable interrupts (legacy) More...
#define | DISABLE_INTERRUPTS asm(" setc INTM")
| Define to disable interrupts. More...
#define | ERTM asm(" clrc DBGM")
| Define to enable debug events. More...
#define | DRTM asm(" setc DBGM")
| Define to disable debug events. More...
#define | EALLOW asm(" EALLOW")
| Define to allow protected register writes (legacy) More...
#define | ENABLE_PROTECTED_REGISTER_WRITE_MODE asm(" EALLOW")
| Define to allow protected register writes. More...
#define | EDIS asm(" EDIS")
| Define to disable protected register writes (legacy) More...
#define | DISABLE_PROTECTED_REGISTER_WRITE_MODE asm(" EDIS")
| Define to disable protected register writes. More...
#define | ESTOP0 asm(" ESTOP0")
| Define for emulation stop 0. More...
#define | IDLE asm(" IDLE")
| Define for entering IDLE mode. More...
#define | CPU_IER_INT1_BITS (1 << 0)
| Defines the location of the INT1 bits in the IER register. More...
#define | CPU_IER_INT2_BITS (1 << 1)
| Defines the location of the INT2 bits in the IER register. More...
#define | CPU_IER_INT3_BITS (1 << 2)
| Defines the location of the INT3 bits in the IER register. More...
#define | CPU_IER_INT4_BITS (1 << 3)
| Defines the location of the INT4 bits in the IER register. More...
#define | CPU_IER_INT5_BITS (1 << 4)
| Defines the location of the INT5 bits in the IER register. More...
#define | CPU_IER_INT6_BITS (1 << 5)
| Defines the location of the INT6 bits in the IER register. More...
#define | CPU_IER_INT7_BITS (1 << 6)
| Defines the location of the INT7 bits in the IER register. More...
#define | CPU_IER_INT8_BITS (1 << 7)
| Defines the location of the INT8 bits in the IER register. More...
#define | CPU_IER_INT9_BITS (1 << 8)
| Defines the location of the INT9 bits in the IER register. More...
#define | CPU_IER_INT10_BITS (1 << 9)
| Defines the location of the INT10 bits in the IER register. More...
#define | CPU_IER_INT11_BITS (1 << 10)
| Defines the location of the INT11 bits in the IER register. More...
#define | CPU_IER_INT12_BITS (1 << 11)
| Defines the location of the INT12 bits in the IER register. More...
#define | CPU_IER_INT13_BITS (1 << 12)
| Defines the location of the INT13 bits in the IER register. More...
#define | CPU_IER_INT14_BITS (1 << 13)
| Defines the location of the INT14 bits in the IER register. More...
#define | CPU_IER_DLOGINT_BITS (1 << 14)
| Defines the location of the DLOGINT bits in the IER register. More...
#define | CPU_IER_RTOSINT_BITS (1 << 15)
| Defines the location of the RTOSINT bits in the IER register. More...
#define | CPU_IFR_INT1_BITS (1 << 0)
| Defines the location of the INT1 bits in the IER register. More...
#define | CPU_IFR_INT2_BITS (1 << 1)
| Defines the location of the INT2 bits in the IER register. More...
#define | CPU_IFR_INT3_BITS (1 << 2)
| Defines the location of the INT3 bits in the IER register. More...
#define | CPU_IFR_INT4_BITS (1 << 3)
| Defines the location of the INT4 bits in the IER register. More...
#define | CPU_IFR_INT5_BITS (1 << 4)
| Defines the location of the INT5 bits in the IER register. More...
#define | CPU_IFR_INT6_BITS (1 << 5)
| Defines the location of the INT6 bits in the IER register. More...
#define | CPU_IFR_INT7_BITS (1 << 6)
| Defines the location of the INT7 bits in the IER register. More...
#define | CPU_IFR_INT8_BITS (1 << 7)
| Defines the location of the INT8 bits in the IER register. More...
#define | CPU_IFR_INT9_BITS (1 << 8)
| Defines the location of the INT9 bits in the IER register. More...
#define | CPU_IFR_INT10_BITS (1 << 9)
| Defines the location of the INT10 bits in the IER register. More...
#define | CPU_IFR_INT11_BITS (1 << 10)
| Defines the location of the INT11 bits in the IER register. More...
#define | CPU_IFR_INT12_BITS (1 << 11)
| Defines the location of the INT12 bits in the IER register. More...
#define | CPU_IFR_INT13_BITS (1 << 12)
| Defines the location of the INT13 bits in the IER register. More...
#define | CPU_IFR_INT14_BITS (1 << 13)
| Defines the location of the INT14 bits in the IER register. More...
#define | CPU_IFR_DLOGINT_BITS (1 << 14)
| Defines the location of the DLOGINT bits in the IFR register. More...
#define | CPU_IFR_RTOSINT_BITS (1 << 15)
| Defines the location of the RTOSINT bits in the IFR register. More...
#define | CPU_DBGIER_INT1_BITS (1 << 0)
| Defines the location of the INT1 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT2_BITS (1 << 1)
| Defines the location of the INT2 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT3_BITS (1 << 2)
| Defines the location of the INT3 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT4_BITS (1 << 3)
| Defines the location of the INT4 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT5_BITS (1 << 4)
| Defines the location of the INT5 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT6_BITS (1 << 5)
| Defines the location of the INT6 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT7_BITS (1 << 6)
| Defines the location of the INT7 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT8_BITS (1 << 7)
| Defines the location of the INT8 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT9_BITS (1 << 8)
| Defines the location of the INT9 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT10_BITS (1 << 9)
| Defines the location of the INT10 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT11_BITS (1 << 10)
| Defines the location of the INT11 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT12_BITS (1 << 11)
| Defines the location of the INT12 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT13_BITS (1 << 12)
| Defines the location of the INT13 bits in the DBGIER register. More...
#define | CPU_DBGIER_INT14_BITS (1 << 13)
| Defines the location of the INT14 bits in the DBGIER register. More...
#define | CPU_DBGIER_DLOGINT_BITS (1 << 14)
| Defines the location of the DLOGINT bits in the DBGIER register. More...
#define | CPU_DBGIER_RTOSINT_BITS (1 << 15)
| Defines the location of the RTOSINT bits in the DBGIER register. More...
#define | CPU_ST0_SXM_BITS (1 << 0)
| Defines the location of the SXM bits in the ST0 register. More...
#define | CPU_ST0_OVM_BITS (1 << 1)
| Defines the location of the OVM bits in the ST0 register. More...
#define | CPU_ST0_TC_BITS (1 << 2)
| Defines the location of the T bits in the ST0 register. More...
#define | CPU_ST0_C_BITS (1 << 3)
| Defines the location of the C bits in the ST0 register. More...
#define | CPU_ST0_Z_BITS (1 << 4)
| Defines the location of the Z bits in the ST0 register. More...
#define | CPU_ST0_N_BITS (1 << 5)
| Defines the location of the N bits in the ST0 register. More...
#define | CPU_ST0_V_BITS (1 << 6)
| Defines the location of the V bits in the ST0 register. More...
#define | CPU_ST0_PW_BITS (7 << 7)
| Defines the location of the PW bits in the ST0 register. More...
#define | CPU_ST0_OVCOVCU_BITS (63 << 10)
| Defines the location of the OVCOVCU bits in the ST0 register. More...
#define | CPU_ST1_INTM_BITS (1 << 0)
| Defines the location of the INTM bits in the ST1 register. More...
#define | CPU_ST1_DBGM_BITS (1 << 1)
| Defines the location of the DBGM bits in the ST1 register. More...
#define | CPU_ST1_PAGE0_BITS (1 << 2)
| Defines the location of the PAGE0 bits in the ST1 register. More...
#define | CPU_ST1_VMAP_BITS (1 << 3)
| Defines the location of the VMAP bits in the ST1 register. More...
#define | CPU_ST1_SPA_BITS (1 << 4)
| Defines the location of the SPA bits in the ST1 register. More...
#define | CPU_ST1_LOOP_BITS (1 << 5)
| Defines the location of the LOOP bits in the ST1 register. More...
#define | CPU_ST1_EALLOW_BITS (1 << 6)
| Defines the location of the EALLOW bits in the ST1 register. More...
#define | CPU_ST1_IDLESTAT_BITS (1 << 7)
| Defines the location of the IDLESTAT bits in the ST1 register. More...
#define | CPU_ST1_AMODE_BITS (1 << 8)
| Defines the location of the AMODE bits in the ST1 register. More...
#define | CPU_ST1_OBJMODE_BITS (1 << 9)
| Defines the location of the OBJMODE bits in the ST1 register. More...
#define | CPU_ST1_MOM1MAP_BITS (1 << 11)
| Defines the location of the MOM1MAP bits in the ST1 register. More...
#define | CPU_ST1_XF_BITS (1 << 12)
| Defines the location of the XF bits in the ST1 register. More...
#define | CPU_ST1_ARP_BITS (7 << 13)
| Defines the location of the ARP bits in the ST1 register. More...

## Typedefs
typedef struct _CPU_Obj_ | CPU_Obj
| Defines the central processing unit (CPU) object. More...
typedef struct _CPU_Obj_ * | CPU_Handle
| Defines the central processing unit (CPU) handle. More...

## Enumerations
enum | CPU_ExtIntNumber_e { CPU_ExtIntNumber_1 =0, CPU_ExtIntNumber_2, CPU_ExtIntNumber_3 }
| Enumeration to define the external interrupt numbers. More...
enum | CPU_IntNumber_e { CPU_IntNumber_1 =(1 << 0), CPU_IntNumber_2 =(1 << 1), CPU_IntNumber_3 =(1 << 2), CPU_IntNumber_4 =(1 << 3), CPU_IntNumber_5 =(1 << 4), CPU_IntNumber_6 =(1 << 5), CPU_IntNumber_7 =(1 << 6), CPU_IntNumber_8 =(1 << 7), CPU_IntNumber_9 =(1 << 8), CPU_IntNumber_10 =(1 << 9), CPU_IntNumber_11 =(1 << 10), CPU_IntNumber_12 =(1 << 11), CPU_IntNumber_13 =(1 << 12), CPU_IntNumber_14 =(1 << 13) }
| Enumeration to define the interrupt numbers. More...

## Functions
void | CPU_clearIntFlags (CPU_Handle cpuHandle)
| Clears all interrupt flags. More...
void | CPU_disableDebugInt (CPU_Handle cpuHandle)
| Disables the debug interrupt. More...
void | CPU_disableGlobalInts (CPU_Handle cpuHandle)
| Disables global interrupts. More...
void | CPU_disableInt (CPU_Handle cpuHandle, const CPU_IntNumber_e intNumber)
| Disables a specified interrupt number. More...
void | CPU_disableInts (CPU_Handle cpuHandle)
| Disables all interrupts. More...
void | CPU_disableProtectedRegisterWrite (CPU_Handle cpuHandle)
| Disables protected register writes. More...
void | CPU_enableDebugInt (CPU_Handle cpuHandle)
| Enables the debug interrupt. More...
void | CPU_enableGlobalInts (CPU_Handle cpuHandle)
| Enables global interrupts. More...
void | CPU_enableInt (CPU_Handle cpuHandle, const CPU_IntNumber_e intNumber)
| Enables a specified interrupt number. More...
void | CPU_enableProtectedRegisterWrite (CPU_Handle cpuHandle)
| Enables protected register writes. More...
CPU_Handle | CPU_init (void *pMemory, const size_t numBytes)
| Initializes the central processing unit (CPU) object handle. More...

## Variables
CPU_Obj | cpu
| Defines the CPU object. More...
cregister volatile unsigned int | IFR
| External reference to the interrupt flag register (IFR) register. More...
cregister volatile unsigned int | IER
| External reference to the interrupt enable register (IER) register. More...

## Detailed Description

## Data Structure Documentation

struct _CPU_Obj_

Defines the central processing unit (CPU) object.

Definition at line 435 of file cpu.h.

Data Fields
uint_least8_t | tmp | a filler value for the object

## Macro Definition Documentation

#define CPU_DBGIER_DLOGINT_BITS (1 << 14)

Defines the location of the DLOGINT bits in the DBGIER register.

Definition at line 300 of file cpu.h.

#define CPU_DBGIER_INT10_BITS (1 << 9)

Defines the location of the INT10 bits in the DBGIER register.

Definition at line 280 of file cpu.h.

#define CPU_DBGIER_INT11_BITS (1 << 10)

Defines the location of the INT11 bits in the DBGIER register.

Definition at line 284 of file cpu.h.

#define CPU_DBGIER_INT12_BITS (1 << 11)

Defines the location of the INT12 bits in the DBGIER register.

Definition at line 288 of file cpu.h.

#define CPU_DBGIER_INT13_BITS (1 << 12)

Defines the location of the INT13 bits in the DBGIER register.

Definition at line 292 of file cpu.h.

#define CPU_DBGIER_INT14_BITS (1 << 13)

Defines the location of the INT14 bits in the DBGIER register.

Definition at line 296 of file cpu.h.

#define CPU_DBGIER_INT1_BITS (1 << 0)

Defines the location of the INT1 bits in the DBGIER register.

Definition at line 244 of file cpu.h.

#define CPU_DBGIER_INT2_BITS (1 << 1)

Defines the location of the INT2 bits in the DBGIER register.

Definition at line 248 of file cpu.h.

#define CPU_DBGIER_INT3_BITS (1 << 2)

Defines the location of the INT3 bits in the DBGIER register.

Definition at line 252 of file cpu.h.

#define CPU_DBGIER_INT4_BITS (1 << 3)

Defines the location of the INT4 bits in the DBGIER register.

Definition at line 256 of file cpu.h.

#define CPU_DBGIER_INT5_BITS (1 << 4)

Defines the location of the INT5 bits in the DBGIER register.

Definition at line 260 of file cpu.h.

#define CPU_DBGIER_INT6_BITS (1 << 5)

Defines the location of the INT6 bits in the DBGIER register.

Definition at line 264 of file cpu.h.

#define CPU_DBGIER_INT7_BITS (1 << 6)

Defines the location of the INT7 bits in the DBGIER register.

Definition at line 268 of file cpu.h.

#define CPU_DBGIER_INT8_BITS (1 << 7)

Defines the location of the INT8 bits in the DBGIER register.

Definition at line 272 of file cpu.h.

#define CPU_DBGIER_INT9_BITS (1 << 8)

Defines the location of the INT9 bits in the DBGIER register.

Definition at line 276 of file cpu.h.

#define CPU_DBGIER_RTOSINT_BITS (1 << 15)

Defines the location of the RTOSINT bits in the DBGIER register.

Definition at line 304 of file cpu.h.

#define CPU_IER_DLOGINT_BITS (1 << 14)

Defines the location of the DLOGINT bits in the IER register.

Definition at line 169 of file cpu.h.

#define CPU_IER_INT10_BITS (1 << 9)

Defines the location of the INT10 bits in the IER register.

Definition at line 149 of file cpu.h.

#define CPU_IER_INT11_BITS (1 << 10)

Defines the location of the INT11 bits in the IER register.

Definition at line 153 of file cpu.h.

#define CPU_IER_INT12_BITS (1 << 11)

Defines the location of the INT12 bits in the IER register.

Definition at line 157 of file cpu.h.

#define CPU_IER_INT13_BITS (1 << 12)

Defines the location of the INT13 bits in the IER register.

Definition at line 161 of file cpu.h.

#define CPU_IER_INT14_BITS (1 << 13)

Defines the location of the INT14 bits in the IER register.

Definition at line 165 of file cpu.h.

#define CPU_IER_INT1_BITS (1 << 0)

Defines the location of the INT1 bits in the IER register.

Definition at line 113 of file cpu.h.

#define CPU_IER_INT2_BITS (1 << 1)

Defines the location of the INT2 bits in the IER register.

Definition at line 117 of file cpu.h.

#define CPU_IER_INT3_BITS (1 << 2)

Defines the location of the INT3 bits in the IER register.

Definition at line 121 of file cpu.h.

#define CPU_IER_INT4_BITS (1 << 3)

Defines the location of the INT4 bits in the IER register.

Definition at line 125 of file cpu.h.

#define CPU_IER_INT5_BITS (1 << 4)

Defines the location of the INT5 bits in the IER register.

Definition at line 129 of file cpu.h.

#define CPU_IER_INT6_BITS (1 << 5)

Defines the location of the INT6 bits in the IER register.

Definition at line 133 of file cpu.h.

#define CPU_IER_INT7_BITS (1 << 6)

Defines the location of the INT7 bits in the IER register.

Definition at line 137 of file cpu.h.

#define CPU_IER_INT8_BITS (1 << 7)

Defines the location of the INT8 bits in the IER register.

Definition at line 141 of file cpu.h.

#define CPU_IER_INT9_BITS (1 << 8)

Defines the location of the INT9 bits in the IER register.

Definition at line 145 of file cpu.h.

#define CPU_IER_RTOSINT_BITS (1 << 15)

Defines the location of the RTOSINT bits in the IER register.

Definition at line 173 of file cpu.h.

#define CPU_IFR_DLOGINT_BITS (1 << 14)

Defines the location of the DLOGINT bits in the IFR register.

Definition at line 235 of file cpu.h.

#define CPU_IFR_INT10_BITS (1 << 9)

Defines the location of the INT10 bits in the IER register.

Definition at line 215 of file cpu.h.

#define CPU_IFR_INT11_BITS (1 << 10)

Defines the location of the INT11 bits in the IER register.

Definition at line 219 of file cpu.h.

#define CPU_IFR_INT12_BITS (1 << 11)

Defines the location of the INT12 bits in the IER register.

Definition at line 223 of file cpu.h.

#define CPU_IFR_INT13_BITS (1 << 12)

Defines the location of the INT13 bits in the IER register.

Definition at line 227 of file cpu.h.

#define CPU_IFR_INT14_BITS (1 << 13)

Defines the location of the INT14 bits in the IER register.

Definition at line 231 of file cpu.h.

#define CPU_IFR_INT1_BITS (1 << 0)

Defines the location of the INT1 bits in the IER register.

Definition at line 179 of file cpu.h.

#define CPU_IFR_INT2_BITS (1 << 1)

Defines the location of the INT2 bits in the IER register.

Definition at line 183 of file cpu.h.

#define CPU_IFR_INT3_BITS (1 << 2)

Defines the location of the INT3 bits in the IER register.

Definition at line 187 of file cpu.h.

#define CPU_IFR_INT4_BITS (1 << 3)

Defines the location of the INT4 bits in the IER register.

Definition at line 191 of file cpu.h.

#define CPU_IFR_INT5_BITS (1 << 4)

Defines the location of the INT5 bits in the IER register.

Definition at line 195 of file cpu.h.

#define CPU_IFR_INT6_BITS (1 << 5)

Defines the location of the INT6 bits in the IER register.

Definition at line 199 of file cpu.h.

#define CPU_IFR_INT7_BITS (1 << 6)

Defines the location of the INT7 bits in the IER register.

Definition at line 203 of file cpu.h.

#define CPU_IFR_INT8_BITS (1 << 7)

Defines the location of the INT8 bits in the IER register.

Definition at line 207 of file cpu.h.

#define CPU_IFR_INT9_BITS (1 << 8)

Defines the location of the INT9 bits in the IER register.

Definition at line 211 of file cpu.h.

#define CPU_IFR_RTOSINT_BITS (1 << 15)

Defines the location of the RTOSINT bits in the IFR register.

Definition at line 239 of file cpu.h.

#define CPU_ST0_C_BITS (1 << 3)

Defines the location of the C bits in the ST0 register.

Definition at line 322 of file cpu.h.

#define CPU_ST0_N_BITS (1 << 5)

Defines the location of the N bits in the ST0 register.

Definition at line 330 of file cpu.h.

#define CPU_ST0_OVCOVCU_BITS (63 << 10)

Defines the location of the OVCOVCU bits in the ST0 register.

Definition at line 342 of file cpu.h.

#define CPU_ST0_OVM_BITS (1 << 1)

Defines the location of the OVM bits in the ST0 register.

Definition at line 314 of file cpu.h.

#define CPU_ST0_PW_BITS (7 << 7)

Defines the location of the PW bits in the ST0 register.

Definition at line 338 of file cpu.h.

#define CPU_ST0_SXM_BITS (1 << 0)

Defines the location of the SXM bits in the ST0 register.

Definition at line 310 of file cpu.h.

#define CPU_ST0_TC_BITS (1 << 2)

Defines the location of the T bits in the ST0 register.

Definition at line 318 of file cpu.h.

#define CPU_ST0_V_BITS (1 << 6)

Defines the location of the V bits in the ST0 register.

Definition at line 334 of file cpu.h.

#define CPU_ST0_Z_BITS (1 << 4)

Defines the location of the Z bits in the ST0 register.

Definition at line 326 of file cpu.h.

#define CPU_ST1_AMODE_BITS (1 << 8)

Defines the location of the AMODE bits in the ST1 register.

Definition at line 380 of file cpu.h.

#define CPU_ST1_ARP_BITS (7 << 13)

Defines the location of the ARP bits in the ST1 register.

Definition at line 396 of file cpu.h.

#define CPU_ST1_DBGM_BITS (1 << 1)

Defines the location of the DBGM bits in the ST1 register.

Definition at line 352 of file cpu.h.

#define CPU_ST1_EALLOW_BITS (1 << 6)

Defines the location of the EALLOW bits in the ST1 register.

Definition at line 372 of file cpu.h.

#define CPU_ST1_IDLESTAT_BITS (1 << 7)

Defines the location of the IDLESTAT bits in the ST1 register.

Definition at line 376 of file cpu.h.

#define CPU_ST1_INTM_BITS (1 << 0)

Defines the location of the INTM bits in the ST1 register.

Definition at line 348 of file cpu.h.

#define CPU_ST1_LOOP_BITS (1 << 5)

Defines the location of the LOOP bits in the ST1 register.

Definition at line 368 of file cpu.h.

#define CPU_ST1_MOM1MAP_BITS (1 << 11)

Defines the location of the MOM1MAP bits in the ST1 register.

Definition at line 388 of file cpu.h.

#define CPU_ST1_OBJMODE_BITS (1 << 9)

Defines the location of the OBJMODE bits in the ST1 register.

Definition at line 384 of file cpu.h.

#define CPU_ST1_PAGE0_BITS (1 << 2)

Defines the location of the PAGE0 bits in the ST1 register.

Definition at line 356 of file cpu.h.

#define CPU_ST1_SPA_BITS (1 << 4)

Defines the location of the SPA bits in the ST1 register.

Definition at line 364 of file cpu.h.

#define CPU_ST1_VMAP_BITS (1 << 3)

Defines the location of the VMAP bits in the ST1 register.

Definition at line 360 of file cpu.h.

#define CPU_ST1_XF_BITS (1 << 12)

Defines the location of the XF bits in the ST1 register.

Definition at line 392 of file cpu.h.

#define DINT asm(" setc INTM")

Define to disable interrupts (legacy)

Definition at line 73 of file cpu.h.

#define DISABLE_INTERRUPTS asm(" setc INTM")

Define to disable interrupts.

Definition at line 77 of file cpu.h.

#define DISABLE_PROTECTED_REGISTER_WRITE_MODE asm(" EDIS")

Define to disable protected register writes.

Definition at line 101 of file cpu.h.

Referenced by ADC_disable(), ADC_disableBandGap(), ADC_disableInt(), ADC_disableNoOverlapMode(), ADC_disableRefBuffers(), ADC_disableVoltRefLoConv(), ADC_enable(), ADC_enableBandGap(), ADC_enableInt(), ADC_enableNoOverlapMode(), ADC_enableRefBuffers(), ADC_enableVoltRefLoConv(), ADC_powerDown(), ADC_powerUp(), ADC_reset(), ADC_setDivideSelect(), ADC_setIntMode(), ADC_setIntPulseGenMode(), ADC_setIntSrc(), ADC_setOffTrim(), ADC_setSampleMode(), ADC_setSampleOverlapMode(), ADC_setSocChanNumber(), ADC_setSocFrc(), ADC_setSocFrcWord(), ADC_setSocSampleDelay(), ADC_setSocTrigSrc(), ADC_setTempSensorSrc(), ADC_setupSocTrigSrc(), ADC_setVoltRefSrc(), CLK_disableAdcClock(), CLK_disableClaClock(), CLK_disableClkIn(), CLK_disableCpuTimerClock(), CLK_disableCrystalOsc(), CLK_disableEcanaClock(), CLK_disableEcap1Clock(), CLK_disableEqep1Clock(), CLK_disableEqep2Clock(), CLK_disableGpioInputClock(), CLK_disableHrPwmClock(), CLK_disableI2cClock(), CLK_disableLinAClock(), CLK_disableOsc1(), CLK_disableOsc1HaltMode(), CLK_disableOsc2(), CLK_disableOsc2HaltMode(), CLK_disablePwmClock(), CLK_disableSciaClock(), CLK_disableScibClock(), CLK_disableSpiaClock(), CLK_disableTbClockSync(), CLK_disableWatchDogHaltMode(), CLK_enableAdcClock(), CLK_enableClaClock(), CLK_enableClkIn(), CLK_enableCompClock(), CLK_enableCpuTimerClock(), CLK_enableCrystalOsc(), CLK_enableEcanaClock(), CLK_enableEcap1Clock(), CLK_enableEqep1Clock(), CLK_enableEqep2Clock(), CLK_enableGpioInputClock(), CLK_enableHrPwmClock(), CLK_enableI2cClock(), CLK_enableLinAClock(), CLK_enableOsc1(), CLK_enableOsc1HaltMode(), CLK_enableOsc2(), CLK_enableOsc2HaltMode(), CLK_enablePwmClock(), CLK_enableSciaClock(), CLK_enableScibClock(), CLK_enableSpiaClock(), CLK_enableSpibClock(), CLK_enableTbClockSync(), CLK_enableWatchDogHaltMode(), CLK_setClkOutPreScaler(), CLK_setLowSpdPreScaler(), CLK_setOsc2Src(), CLK_setOscSrc(), CLK_setTimer2PreScale(), CLK_setTimer2Src(), CLK_setWatchDogSrc(), CLK_setXClkInSrc(), COMP_disable(), COMP_disableDac(), COMP_enable(), COMP_enableDac(), FLASH_clear3VStatus(), FLASH_disablePipelineMode(), FLASH_enablePipelineMode(), FLASH_setActiveWaitCount(), FLASH_setNumPagedReadWaitStates(), FLASH_setNumRandomReadWaitStates(), FLASH_setOtpWaitStates(), FLASH_setPowerMode(), FLASH_setStandbyWaitCount(), GPIO_lpmSelect(), GPIO_setDirection(), GPIO_setExtInt(), GPIO_setHigh(), GPIO_setLow(), GPIO_setMode(), GPIO_setPortData(), GPIO_setPullup(), GPIO_setQualification(), GPIO_setQualificationPeriod(), GPIO_toggle(), OSC_setCoarseTrim(), OSC_setFineTrim(), OSC_setTrim(), PIE_registerPieIntHandler(), PIE_registerSystemIntHandler(), PIE_setDefaultIntVectorTable(), PIE_unregisterPieIntHandler(), PIE_unregisterSystemIntHandler(), PLL_disable(), PLL_disableClkDetect(), PLL_disableNormRdy(), PLL_disableOsc(), PLL_enable(), PLL_enableClkDetect(), PLL_enableNormRdy(), PLL_enableOsc(), PLL_resetClkDetect(), PLL_setClkFreq(), PLL_setDivideSelect(), PLL_setLockPeriod(), PWM_clearOneShotTrip(), PWM_clearTripZone(), PWM_disableAutoConvert(), PWM_disableDigitalCompareBlankingWindow(), PWM_disableDigitalCompareBlankingWindowInversion(), PWM_disableHrPeriod(), PWM_disableHrPhaseSync(), PWM_disableTripZoneInt(), PWM_disableTripZones(), PWM_disableTripZoneSrc(), PWM_enableAutoConvert(), PWM_enableDigitalCompareBlankingWindow(), PWM_enableDigitalCompareBlankingWindowInversion(), PWM_enableHrPeriod(), PWM_enableHrPhaseSync(), PWM_enableTripZoneInt(), PWM_enableTripZoneSrc(), PWM_setDigitalCompareAEvent1(), PWM_setDigitalCompareAEvent2(), PWM_setDigitalCompareBEvent1(), PWM_setDigitalCompareBEvent2(), PWM_setDigitalCompareBlankingPulse(), PWM_setDigitalCompareFilterSource(), PWM_setDigitalCompareInput(), PWM_setHrControlMode(), PWM_setHrEdgeMode(), PWM_setHrShadowMode(), PWM_setOneShotTrip(), PWM_setPeriodHr(), PWM_setTripZoneDCEventSelect_DCAEVT1(), PWM_setTripZoneDCEventSelect_DCAEVT2(), PWM_setTripZoneDCEventSelect_DCBEVT1(), PWM_setTripZoneDCEventSelect_DCBEVT2(), PWM_setTripZoneState_DCAEVT1(), PWM_setTripZoneState_DCAEVT2(), PWM_setTripZoneState_DCBEVT1(), PWM_setTripZoneState_DCBEVT2(), PWM_setTripZoneState_TZA(), PWM_setTripZoneState_TZB(), PWR_disableWatchDogInt(), PWR_enableWatchDogInt(), PWR_setLowPowerMode(), PWR_setNumStandByClocks(), WDOG_clearCounter(), WDOG_disable(), WDOG_disableInt(), WDOG_disableOverRide(), WDOG_enable(), WDOG_enableInt(), WDOG_enableOverRide(), and WDOG_setPreScaler().

#define DRTM asm(" setc DBGM")

Define to disable debug events.

Definition at line 85 of file cpu.h.

#define EALLOW asm(" EALLOW")

Define to allow protected register writes (legacy)

Definition at line 89 of file cpu.h.

#define EDIS asm(" EDIS")

Define to disable protected register writes (legacy)

Definition at line 97 of file cpu.h.

#define EINT asm(" clrc INTM")

Define to enable interrupts (legacy)

Definition at line 65 of file cpu.h.

#define ENABLE_INTERRUPTS asm(" clrc INTM")

Define to enable interrupts.

Definition at line 69 of file cpu.h.

#define ENABLE_PROTECTED_REGISTER_WRITE_MODE asm(" EALLOW")

Define to allow protected register writes.

Definition at line 93 of file cpu.h.

Referenced by ADC_disable(), ADC_disableBandGap(), ADC_disableInt(), ADC_disableNoOverlapMode(), ADC_disableRefBuffers(), ADC_disableVoltRefLoConv(), ADC_enable(), ADC_enableBandGap(), ADC_enableInt(), ADC_enableNoOverlapMode(), ADC_enableRefBuffers(), ADC_enableVoltRefLoConv(), ADC_powerDown(), ADC_powerUp(), ADC_reset(), ADC_setDivideSelect(), ADC_setIntMode(), ADC_setIntPulseGenMode(), ADC_setIntSrc(), ADC_setOffTrim(), ADC_setSampleMode(), ADC_setSampleOverlapMode(), ADC_setSocChanNumber(), ADC_setSocFrc(), ADC_setSocFrcWord(), ADC_setSocSampleDelay(), ADC_setSocTrigSrc(), ADC_setTempSensorSrc(), ADC_setupSocTrigSrc(), ADC_setVoltRefSrc(), CLK_disableAdcClock(), CLK_disableClaClock(), CLK_disableClkIn(), CLK_disableCpuTimerClock(), CLK_disableCrystalOsc(), CLK_disableEcanaClock(), CLK_disableEcap1Clock(), CLK_disableEqep1Clock(), CLK_disableEqep2Clock(), CLK_disableGpioInputClock(), CLK_disableHrPwmClock(), CLK_disableI2cClock(), CLK_disableLinAClock(), CLK_disableOsc1(), CLK_disableOsc1HaltMode(), CLK_disableOsc2(), CLK_disableOsc2HaltMode(), CLK_disablePwmClock(), CLK_disableSciaClock(), CLK_disableScibClock(), CLK_disableSpiaClock(), CLK_disableTbClockSync(), CLK_disableWatchDogHaltMode(), CLK_enableAdcClock(), CLK_enableClaClock(), CLK_enableClkIn(), CLK_enableCompClock(), CLK_enableCpuTimerClock(), CLK_enableCrystalOsc(), CLK_enableEcanaClock(), CLK_enableEcap1Clock(), CLK_enableEqep1Clock(), CLK_enableEqep2Clock(), CLK_enableGpioInputClock(), CLK_enableHrPwmClock(), CLK_enableI2cClock(), CLK_enableLinAClock(), CLK_enableOsc1(), CLK_enableOsc1HaltMode(), CLK_enableOsc2(), CLK_enableOsc2HaltMode(), CLK_enablePwmClock(), CLK_enableSciaClock(), CLK_enableScibClock(), CLK_enableSpiaClock(), CLK_enableSpibClock(), CLK_enableTbClockSync(), CLK_enableWatchDogHaltMode(), CLK_setClkOutPreScaler(), CLK_setLowSpdPreScaler(), CLK_setOsc2Src(), CLK_setOscSrc(), CLK_setTimer2PreScale(), CLK_setTimer2Src(), CLK_setWatchDogSrc(), CLK_setXClkInSrc(), COMP_disable(), COMP_disableDac(), COMP_enable(), COMP_enableDac(), FLASH_clear3VStatus(), FLASH_disablePipelineMode(), FLASH_enablePipelineMode(), FLASH_setActiveWaitCount(), FLASH_setNumPagedReadWaitStates(), FLASH_setNumRandomReadWaitStates(), FLASH_setOtpWaitStates(), FLASH_setPowerMode(), FLASH_setStandbyWaitCount(), GPIO_lpmSelect(), GPIO_setDirection(), GPIO_setExtInt(), GPIO_setHigh(), GPIO_setLow(), GPIO_setMode(), GPIO_setPortData(), GPIO_setPullup(), GPIO_setQualification(), GPIO_setQualificationPeriod(), GPIO_toggle(), OSC_setCoarseTrim(), OSC_setFineTrim(), OSC_setTrim(), PIE_registerPieIntHandler(), PIE_registerSystemIntHandler(), PIE_setDefaultIntVectorTable(), PIE_unregisterPieIntHandler(), PIE_unregisterSystemIntHandler(), PLL_disable(), PLL_disableClkDetect(), PLL_disableNormRdy(), PLL_disableOsc(), PLL_enable(), PLL_enableClkDetect(), PLL_enableNormRdy(), PLL_enableOsc(), PLL_resetClkDetect(), PLL_setClkFreq(), PLL_setDivideSelect(), PLL_setLockPeriod(), PWM_clearOneShotTrip(), PWM_clearTripZone(), PWM_disableAutoConvert(), PWM_disableDigitalCompareBlankingWindow(), PWM_disableDigitalCompareBlankingWindowInversion(), PWM_disableHrPeriod(), PWM_disableHrPhaseSync(), PWM_disableTripZoneInt(), PWM_disableTripZones(), PWM_disableTripZoneSrc(), PWM_enableAutoConvert(), PWM_enableDigitalCompareBlankingWindow(), PWM_enableDigitalCompareBlankingWindowInversion(), PWM_enableHrPeriod(), PWM_enableHrPhaseSync(), PWM_enableTripZoneInt(), PWM_enableTripZoneSrc(), PWM_setDigitalCompareAEvent1(), PWM_setDigitalCompareAEvent2(), PWM_setDigitalCompareBEvent1(), PWM_setDigitalCompareBEvent2(), PWM_setDigitalCompareBlankingPulse(), PWM_setDigitalCompareFilterSource(), PWM_setDigitalCompareInput(), PWM_setHrControlMode(), PWM_setHrEdgeMode(), PWM_setHrShadowMode(), PWM_setOneShotTrip(), PWM_setPeriodHr(), PWM_setTripZoneDCEventSelect_DCAEVT1(), PWM_setTripZoneDCEventSelect_DCAEVT2(), PWM_setTripZoneDCEventSelect_DCBEVT1(), PWM_setTripZoneDCEventSelect_DCBEVT2(), PWM_setTripZoneState_DCAEVT1(), PWM_setTripZoneState_DCAEVT2(), PWM_setTripZoneState_DCBEVT1(), PWM_setTripZoneState_DCBEVT2(), PWM_setTripZoneState_TZA(), PWM_setTripZoneState_TZB(), PWR_disableWatchDogInt(), PWR_enableWatchDogInt(), PWR_setLowPowerMode(), PWR_setNumStandByClocks(), WDOG_clearCounter(), WDOG_disable(), WDOG_disableInt(), WDOG_disableOverRide(), WDOG_enable(), WDOG_enableInt(), WDOG_enableOverRide(), and WDOG_setPreScaler().

#define ERTM asm(" clrc DBGM")

Define to enable debug events.

Definition at line 81 of file cpu.h.

#define ESTOP0 asm(" ESTOP0")

Define for emulation stop 0.

Definition at line 105 of file cpu.h.

#define IDLE asm(" IDLE")

Define for entering IDLE mode.

Definition at line 109 of file cpu.h.

## Typedef Documentation

typedef struct _CPU_Obj_* CPU_Handle

Defines the central processing unit (CPU) handle.

Definition at line 443 of file cpu.h.

typedef struct _CPU_Obj_ CPU_Obj

Defines the central processing unit (CPU) object.

## Enumeration Type Documentation

enum CPU_ExtIntNumber_e

Enumeration to define the external interrupt numbers.

Enumerator
CPU_ExtIntNumber_1 | Denotes external interrupt number 1.
CPU_ExtIntNumber_2 | Denotes external interrupt number 2.
CPU_ExtIntNumber_3 | Denotes external interrupt number 3.

Definition at line 404 of file cpu.h.

enum CPU_IntNumber_e

Enumeration to define the interrupt numbers.

Enumerator
CPU_IntNumber_1 | Denotes interrupt number 1.
CPU_IntNumber_2 | Denotes interrupt number 2.
CPU_IntNumber_3 | Denotes interrupt number 3.
CPU_IntNumber_4 | Denotes interrupt number 4.
CPU_IntNumber_5 | Denotes interrupt number 5.
CPU_IntNumber_6 | Denotes interrupt number 6.
CPU_IntNumber_7 | Denotes interrupt number 7.
CPU_IntNumber_8 | Denotes interrupt number 8.
CPU_IntNumber_9 | Denotes interrupt number 9.
CPU_IntNumber_10 | Denotes interrupt number 10.
CPU_IntNumber_11 | Denotes interrupt number 11.
CPU_IntNumber_12 | Denotes interrupt number 12.
CPU_IntNumber_13 | Denotes interrupt number 13.
CPU_IntNumber_14 | Denotes interrupt number 14.

Definition at line 414 of file cpu.h.

## Function Documentation

void CPU_clearIntFlags | ( | CPU_Handle | cpuHandle | ) |

Clears all interrupt flags.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle

Definition at line 58 of file cpu.c.

References IFR.

void CPU_disableDebugInt | ( | CPU_Handle | cpuHandle | ) |

Disables the debug interrupt.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle

Definition at line 68 of file cpu.c.

void CPU_disableGlobalInts | ( | CPU_Handle | cpuHandle | ) |

Disables global interrupts.

Parameters

  [in] | cpuHandle | The CPU handle

Definition at line 78 of file cpu.c.

void CPU_disableInt | ( | CPU_Handle | cpuHandle,
|  | const CPU_IntNumber_e | intNumber
| ) |  |

Disables a specified interrupt number.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle
  [in] | intNumber | The interrupt number

Definition at line 88 of file cpu.c.

References IER.

void CPU_disableInts | ( | CPU_Handle | cpuHandle | ) |

Disables all interrupts.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle

Definition at line 98 of file cpu.c.

References IER.

void CPU_disableProtectedRegisterWrite | ( | CPU_Handle | cpuHandle | ) |

Disables protected register writes.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle

Definition at line 108 of file cpu.c.

void CPU_enableDebugInt | ( | CPU_Handle | cpuHandle | ) |

Enables the debug interrupt.

Parameters

  [in] | cpuHandle | The CPU handle

Definition at line 118 of file cpu.c.

void CPU_enableGlobalInts | ( | CPU_Handle | cpuHandle | ) |

Enables global interrupts.

Parameters

  [in] | cpuHandle | The CPU handle

Definition at line 128 of file cpu.c.

void CPU_enableInt | ( | CPU_Handle | cpuHandle,
|  | const CPU_IntNumber_e | intNumber
| ) |  |

Enables a specified interrupt number.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle
  [in] | intNumber | The interrupt number

Definition at line 138 of file cpu.c.

References IER.

void CPU_enableProtectedRegisterWrite | ( | CPU_Handle | cpuHandle | ) |

Enables protected register writes.

Parameters

  [in] | cpuHandle | The central processing unit (CPU) object handle

Definition at line 148 of file cpu.c.

CPU_Handle CPU_init | ( | void * | pMemory,
|  | const size_t | numBytes
| ) |  |

Initializes the central processing unit (CPU) object handle.

Parameters

  [in] | pMemory | A pointer to the memory for the CPU object
  [in] | numBytes | The number of bytes allocated for the CPU object, bytes

Returns
  The central processing unit (CPU) object handle

Definition at line 158 of file cpu.c.

## Variable Documentation

CPU_Obj cpu

Defines the CPU object.

Definition at line 52 of file cpu.c.

cregister volatile unsigned int IER

External reference to the interrupt enable register (IER) register.

Referenced by CPU_disableInt(), CPU_disableInts(), and CPU_enableInt().

cregister volatile unsigned int IFR

External reference to the interrupt flag register (IFR) register.

Referenced by CPU_clearIntFlags().