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i2c.h
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1 /* --COPYRIGHT--,BSD
2 * Copyright (c) 2015, Texas Instruments Incorporated
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 *
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
26 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * --/COPYRIGHT--*/
33
34
35
36 #ifndef _I2C_H_
37 #define _I2C_H_
38
45
46
47 // **************************************************************************
48 // the includes
49
50 #include "sw/modules/types/src/types.h"
51
52
53 #ifdef __cplusplus
54 extern "C" {
55 #endif
56
57 //----------------------------------------------------
58 // I2C interrupt vector register bit definitions */
59 struct I2CISRC_BITS { // bits description
60 uint16_t INTCODE:3; // 2:0 Interrupt code
61 uint16_t rsvd1:13; // 15:3 reserved
62 };
63
64 union I2CISRC_REG {
65 uint16_t all;
66 struct I2CISRC_BITS bit;
67 };
68
69 //----------------------------------------------------
70 // I2C interrupt mask register bit definitions */
71 struct I2CIER_BITS { // bits description
72 uint16_t ARBL:1; // 0 Arbitration lost interrupt
73 uint16_t NACK:1; // 1 No ack interrupt
74 uint16_t ARDY:1; // 2 Register access ready interrupt
75 uint16_t RRDY:1; // 3 Recieve data ready interrupt
76 uint16_t XRDY:1; // 4 Transmit data ready interrupt
77 uint16_t SCD:1; // 5 Stop condition detection
78 uint16_t AAS:1; // 6 Address as slave
79 uint16_t rsvd:9; // 15:7 reserved
80 };
81
82 union I2CIER_REG {
83 uint16_t all;
84 struct I2CIER_BITS bit;
85 };
86
87 //----------------------------------------------------
88 // I2C status register bit definitions */
89 struct I2CSTR_BITS { // bits description
90 uint16_t ARBL:1; // 0 Arbitration lost interrupt
91 uint16_t NACK:1; // 1 No ack interrupt
92 uint16_t ARDY:1; // 2 Register access ready interrupt
93 uint16_t RRDY:1; // 3 Recieve data ready interrupt
94 uint16_t XRDY:1; // 4 Transmit data ready interrupt
95 uint16_t SCD:1; // 5 Stop condition detection
96 uint16_t rsvd1:2; // 7:6 reserved
97 uint16_t AD0:1; // 8 Address Zero
98 uint16_t AAS:1; // 9 Address as slave
99 uint16_t XSMT:1; // 10 XMIT shift empty
100 uint16_t RSFULL:1; // 11 Recieve shift full
101 uint16_t BB:1; // 12 Bus busy
102 uint16_t NACKSNT:1; // 13 A no ack sent
103 uint16_t SDIR:1; // 14 Slave direction
104 uint16_t rsvd2:1; // 15 reserved
105 };
106
107 union I2CSTR_REG {
108 uint16_t all;
109 struct I2CSTR_BITS bit;
110 };
111
112 //----------------------------------------------------
113 // I2C mode control register bit definitions */
114 struct I2CMDR_BITS { // bits description
115 uint16_t BC:3; // 2:0 Bit count
116 uint16_t FDF:1; // 3 Free data format
117 uint16_t STB:1; // 4 Start byte
118 uint16_t IRS:1; // 5 I2C Reset not
119 uint16_t DLB:1; // 6 Digital loopback
120 uint16_t RM:1; // 7 Repeat mode
121 uint16_t XA:1; // 8 Expand address
122 uint16_t TRX:1; // 9 Transmitter/reciever
123 uint16_t MST:1; // 10 Master/slave
124 uint16_t STP:1; // 11 Stop condition
125 uint16_t rsvd1:1; // 12 reserved
126 uint16_t STT:1; // 13 Start condition
127 uint16_t FREE:1; // 14 Emulation mode
128 uint16_t NACKMOD:1; // 15 No Ack mode
129 };
130
131 union I2CMDR_REG {
132 uint16_t all;
133 struct I2CMDR_BITS bit;
134 };
135
136 //----------------------------------------------------
137 // I2C extended mode control register bit definitions */
138 struct I2CEMDR_BITS { // bits description
139 uint16_t BCM:1; // 0 Bit count
140 uint16_t rsvd1:15; // 15:1 reserved
141 };
142
143 union I2CEMDR_REG {
144 uint16_t all;
145 struct I2CEMDR_BITS bit;
146 };
147
148 //----------------------------------------------------
149 // I2C pre-scaler register bit definitions */
150 struct I2CPSC_BITS { // bits description
151 uint16_t IPSC:8; // 7:0 pre-scaler
152 uint16_t rsvd1:8; // 15:8 reserved
153 };
154
155 union I2CPSC_REG {
156 uint16_t all;
157 struct I2CPSC_BITS bit;
158 };
159
160 //----------------------------------------------------
161 // TX FIFO control register bit definitions */
162 struct I2CFFTX_BITS { // bits description
163 uint16_t TXFFIL:5; // 4:0 FIFO interrupt level
164 uint16_t TXFFIENA:1; // 5 FIFO interrupt enable/disable
165 uint16_t TXFFINTCLR:1; // 6 FIFO clear
166 uint16_t TXFFINT:1; // 7 FIFO interrupt flag
167 uint16_t TXFFST:5; // 12:8 FIFO level status
168 uint16_t TXFFRST:1; // 13 FIFO reset
169 uint16_t I2CFFEN:1; // 14 enable/disable TX & RX FIFOs
170 uint16_t rsvd1:1; // 15 reserved
171
172 };
173
174 union I2CFFTX_REG {
175 uint16_t all;
176 struct I2CFFTX_BITS bit;
177 };
178
179 //----------------------------------------------------
180 // RX FIFO control register bit definitions */
181 struct I2CFFRX_BITS { // bits description
182 uint16_t RXFFIL:5; // 4:0 FIFO interrupt level
183 uint16_t RXFFIENA:1; // 5 FIFO interrupt enable/disable
184 uint16_t RXFFINTCLR:1; // 6 FIFO clear
185 uint16_t RXFFINT:1; // 7 FIFO interrupt flag
186 uint16_t RXFFST:5; // 12:8 FIFO level
187 uint16_t RXFFRST:1; // 13 FIFO reset
188 uint16_t rsvd1:2; // 15:14 reserved
189 };
190
191 union I2CFFRX_REG {
192 uint16_t all;
193 struct I2CFFRX_BITS bit;
194 };
195
196 //----------------------------------------------------
197
198 struct I2C_REGS {
199 uint16_t I2COAR; // Own address register
200 union I2CIER_REG I2CIER; // Interrupt enable
201 union I2CSTR_REG I2CSTR; // Interrupt status
202 uint16_t I2CCLKL; // Clock divider low
203 uint16_t I2CCLKH; // Clock divider high
204 uint16_t I2CCNT; // Data count
205 uint16_t I2CDRR; // Data recieve
206 uint16_t I2CSAR; // Slave address
207 uint16_t I2CDXR; // Data transmit
208 union I2CMDR_REG I2CMDR; // Mode
209 union I2CISRC_REG I2CISRC; // Interrupt source
210 union I2CEMDR_REG I2CEMDR; // Extended mode
211 union I2CPSC_REG I2CPSC; // Pre-scaler
212 uint16_t rsvd2[19]; // reserved
213 union I2CFFTX_REG I2CFFTX; // Transmit FIFO
214 union I2CFFRX_REG I2CFFRX; // Recieve FIFO
215 };
216
217
218
219 //---------------------------------------------------------------------------
220 // External References & Function Declarations:
221 //
222 extern volatile struct I2C_REGS I2caRegs;
223
224 #ifdef __cplusplus
225 }
226 #endif /* extern "C" */
227
228 #endif // end of _I2C_H_ definition
229
I2CFFTX_BITS
Definition: i2c.h:162
I2CSTR_BITS::ARDY
uint16_t ARDY
Definition: i2c.h:92
I2CIER_BITS::rsvd
uint16_t rsvd
Definition: i2c.h:79
I2CMDR_BITS::NACKMOD
uint16_t NACKMOD
Definition: i2c.h:128
I2CIER_BITS::NACK
uint16_t NACK
Definition: i2c.h:73
I2CSTR_BITS::AAS
uint16_t AAS
Definition: i2c.h:98
I2C_REGS::I2CCNT
uint16_t I2CCNT
Definition: i2c.h:204
I2CPSC_BITS
Definition: i2c.h:150
I2CPSC_REG
Definition: i2c.h:155
I2CFFRX_REG::bit
struct I2CFFRX_BITS bit
Definition: i2c.h:193
I2caRegs
volatile struct I2C_REGS I2caRegs
I2CFFTX_REG
Definition: i2c.h:174
I2CMDR_BITS::TRX
uint16_t TRX
Definition: i2c.h:122
I2CISRC_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:61
I2CFFRX_BITS::RXFFIL
uint16_t RXFFIL
Definition: i2c.h:182
I2CMDR_BITS::STB
uint16_t STB
Definition: i2c.h:117
I2CFFTX_BITS::TXFFINT
uint16_t TXFFINT
Definition: i2c.h:166
I2CIER_BITS::XRDY
uint16_t XRDY
Definition: i2c.h:76
I2CFFRX_BITS::RXFFINT
uint16_t RXFFINT
Definition: i2c.h:185
I2CFFTX_BITS::TXFFRST
uint16_t TXFFRST
Definition: i2c.h:168
I2CIER_BITS::ARDY
uint16_t ARDY
Definition: i2c.h:74
I2CFFTX_BITS::TXFFIENA
uint16_t TXFFIENA
Definition: i2c.h:164
I2C_REGS::I2CISRC
union I2CISRC_REG I2CISRC
Definition: i2c.h:209
I2C_REGS::I2CDRR
uint16_t I2CDRR
Definition: i2c.h:205
I2CSTR_BITS::RRDY
uint16_t RRDY
Definition: i2c.h:93
I2CFFTX_BITS::TXFFST
uint16_t TXFFST
Definition: i2c.h:167
I2CMDR_BITS::XA
uint16_t XA
Definition: i2c.h:121
I2C_REGS::I2CFFTX
union I2CFFTX_REG I2CFFTX
Definition: i2c.h:213
I2CMDR_BITS::BC
uint16_t BC
Definition: i2c.h:115
I2CFFTX_REG::all
uint16_t all
Definition: i2c.h:175
I2CSTR_BITS::RSFULL
uint16_t RSFULL
Definition: i2c.h:100
I2CMDR_BITS::FDF
uint16_t FDF
Definition: i2c.h:116
I2CEMDR_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:140
I2CMDR_REG::all
uint16_t all
Definition: i2c.h:132
I2CIER_BITS::SCD
uint16_t SCD
Definition: i2c.h:77
I2CSTR_BITS
Definition: i2c.h:89
I2CFFRX_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:188
I2CMDR_BITS::MST
uint16_t MST
Definition: i2c.h:123
I2CMDR_REG::bit
struct I2CMDR_BITS bit
Definition: i2c.h:133
I2CSTR_BITS::AD0
uint16_t AD0
Definition: i2c.h:97
I2CMDR_BITS
Definition: i2c.h:114
I2CFFRX_REG::all
uint16_t all
Definition: i2c.h:192
I2CMDR_BITS::RM
uint16_t RM
Definition: i2c.h:120
I2CSTR_REG::all
uint16_t all
Definition: i2c.h:108
I2C_REGS
Definition: i2c.h:198
I2CSTR_BITS::NACK
uint16_t NACK
Definition: i2c.h:91
I2CFFRX_BITS
Definition: i2c.h:181
I2CSTR_BITS::SCD
uint16_t SCD
Definition: i2c.h:95
I2CSTR_BITS::rsvd2
uint16_t rsvd2
Definition: i2c.h:104
I2CEMDR_REG
Definition: i2c.h:143
I2CSTR_BITS::NACKSNT
uint16_t NACKSNT
Definition: i2c.h:102
I2C_REGS::I2CCLKL
uint16_t I2CCLKL
Definition: i2c.h:202
I2CSTR_REG
Definition: i2c.h:107
I2C_REGS::I2CEMDR
union I2CEMDR_REG I2CEMDR
Definition: i2c.h:210
I2CISRC_REG::all
uint16_t all
Definition: i2c.h:65
I2C_REGS::I2CIER
union I2CIER_REG I2CIER
Definition: i2c.h:200
I2CFFTX_BITS::TXFFINTCLR
uint16_t TXFFINTCLR
Definition: i2c.h:165
I2C_REGS::I2CSTR
union I2CSTR_REG I2CSTR
Definition: i2c.h:201
I2CSTR_BITS::XRDY
uint16_t XRDY
Definition: i2c.h:94
I2C_REGS::I2CMDR
union I2CMDR_REG I2CMDR
Definition: i2c.h:208
I2CSTR_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:96
I2CPSC_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:152
I2C_REGS::I2CFFRX
union I2CFFRX_REG I2CFFRX
Definition: i2c.h:214
I2CEMDR_REG::all
uint16_t all
Definition: i2c.h:144
I2CFFRX_BITS::RXFFINTCLR
uint16_t RXFFINTCLR
Definition: i2c.h:184
I2CFFRX_BITS::RXFFST
uint16_t RXFFST
Definition: i2c.h:186
I2CIER_BITS::ARBL
uint16_t ARBL
Definition: i2c.h:72
I2CEMDR_REG::bit
struct I2CEMDR_BITS bit
Definition: i2c.h:145
I2C_REGS::I2CPSC
union I2CPSC_REG I2CPSC
Definition: i2c.h:211
I2CMDR_REG
Definition: i2c.h:131
I2CIER_BITS::RRDY
uint16_t RRDY
Definition: i2c.h:75
I2CMDR_BITS::IRS
uint16_t IRS
Definition: i2c.h:118
I2CPSC_BITS::IPSC
uint16_t IPSC
Definition: i2c.h:151
I2C_REGS::rsvd2
uint16_t rsvd2[19]
Definition: i2c.h:212
I2CISRC_BITS
Definition: i2c.h:59
I2CPSC_REG::all
uint16_t all
Definition: i2c.h:156
I2CIER_REG::bit
struct I2CIER_BITS bit
Definition: i2c.h:84
I2CSTR_BITS::SDIR
uint16_t SDIR
Definition: i2c.h:103
I2CMDR_BITS::STT
uint16_t STT
Definition: i2c.h:126
I2CISRC_REG
Definition: i2c.h:64
I2CFFRX_BITS::RXFFIENA
uint16_t RXFFIENA
Definition: i2c.h:183
I2CIER_BITS::AAS
uint16_t AAS
Definition: i2c.h:78
I2CIER_REG::all
uint16_t all
Definition: i2c.h:83
I2CISRC_BITS::INTCODE
uint16_t INTCODE
Definition: i2c.h:60
I2CMDR_BITS::FREE
uint16_t FREE
Definition: i2c.h:127
I2CFFTX_BITS::TXFFIL
uint16_t TXFFIL
Definition: i2c.h:163
I2C_REGS::I2CSAR
uint16_t I2CSAR
Definition: i2c.h:206
I2CFFRX_REG
Definition: i2c.h:191
I2CMDR_BITS::DLB
uint16_t DLB
Definition: i2c.h:119
I2CEMDR_BITS::BCM
uint16_t BCM
Definition: i2c.h:139
I2CSTR_BITS::ARBL
uint16_t ARBL
Definition: i2c.h:90
I2CISRC_REG::bit
struct I2CISRC_BITS bit
Definition: i2c.h:66
I2CFFTX_BITS::I2CFFEN
uint16_t I2CFFEN
Definition: i2c.h:169
I2CMDR_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:125
I2CIER_REG
Definition: i2c.h:82
I2CEMDR_BITS
Definition: i2c.h:138
I2CMDR_BITS::STP
uint16_t STP
Definition: i2c.h:124
I2CFFRX_BITS::RXFFRST
uint16_t RXFFRST
Definition: i2c.h:187
I2CIER_BITS
Definition: i2c.h:71
I2CSTR_REG::bit
struct I2CSTR_BITS bit
Definition: i2c.h:109
I2CFFTX_REG::bit
struct I2CFFTX_BITS bit
Definition: i2c.h:176
I2CPSC_REG::bit
struct I2CPSC_BITS bit
Definition: i2c.h:157
I2CSTR_BITS::BB
uint16_t BB
Definition: i2c.h:101
I2C_REGS::I2COAR
uint16_t I2COAR
Definition: i2c.h:199
I2CSTR_BITS::XSMT
uint16_t XSMT
Definition: i2c.h:99
I2CFFTX_BITS::rsvd1
uint16_t rsvd1
Definition: i2c.h:170
I2C_REGS::I2CDXR
uint16_t I2CDXR
Definition: i2c.h:207
I2C_REGS::I2CCLKH
uint16_t I2CCLKH
Definition: i2c.h:203