50 #include "sw/modules/types/src/types.h"
71 #define ADC_BASE_ADDR (0x00000B00)
76 #define ADC_DELAY_usec 10000L
80 #define ADC_numBits 12
84 #define ADC_dataBias (1 << (ADC_numBits - 1))
89 #define ADC_ADCCTL1_TEMPCONV_BITS (1 << 0)
93 #define ADC_ADCCTL1_VREFLOCONV_BITS (1 << 1)
97 #define ADC_ADCCTL1_INTPULSEPOS_BITS (1 << 2)
101 #define ADC_ADCCTL1_ADCREFSEL_BITS (1 << 3)
105 #define ADC_ADCCTL1_ADCREFPWD_BITS (1 << 5)
109 #define ADC_ADCCTL1_ADCBGPWD_BITS (1 << 6)
113 #define ADC_ADCCTL1_ADCPWDN_BITS (1 << 7)
117 #define ADC_ADCCTL1_ADCBSYCHAN_BITS (31 << 8)
121 #define ADC_ADCCTL1_ADCBSY_BITS (1 << 13)
125 #define ADC_ADCCTL1_ADCENABLE_BITS (1 << 14)
129 #define ADC_ADCCTL1_RESET_BITS (1 << 15)
133 #define ADC_ADCCTL2_CLKDIV2EN_BITS (1 << 0)
137 #define ADC_ADCCTL2_CLKDIV4EN_BITS (1 << 2)
141 #define ADC_ADCCTL2_ADCNONOVERLAP_BITS (1 << 1)
145 #define ADC_INTSELxNy_NUMBITS_PER_REG 8
149 #define ADC_INTSELxNy_LOG2_NUMBITS_PER_REG 3
153 #define ADC_INTSELxNy_INTSEL_BITS (31 << 0)
157 #define ADC_INTSELxNy_INTE_BITS (1 << 5)
161 #define ADC_INTSELxNy_INTCONT_BITS (1 << 6)
165 #define ADC_ADCSOCxCTL_ACQPS_BITS (63 << 0)
169 #define ADC_ADCSOCxCTL_CHSEL_BITS (15 << 6)
173 #define ADC_ADCSOCxCTL_TRIGSEL_BITS (31 << 11)
177 #define ADC_ADCINTSOCSELx_SOCx_BITS 3
181 #define ADC_ADCSAMPLEMODE_SIMULEN0_BITS (1 << 0)
185 #define ADC_ADCSAMPLEMODE_SIMULEN2_BITS (1 << 1)
189 #define ADC_ADCSAMPLEMODE_SIMULEN4_BITS (1 << 2)
193 #define ADC_ADCSAMPLEMODE_SIMULEN6_BITS (1 << 3)
197 #define ADC_ADCSAMPLEMODE_SIMULEN8_BITS (1 << 4)
201 #define ADC_ADCSAMPLEMODE_SIMULEN10_BITS (1 << 5)
205 #define ADC_ADCSAMPLEMODE_SIMULEN12_BITS (1 << 6)
209 #define ADC_ADCSAMPLEMODE_SIMULEN14_BITS (1 << 7)
214 #define ADC_ADCSAMPLEMODE_SEPARATE_FLAG 0x100
528 volatile uint16_t
resvd_1[26096];
531 volatile uint16_t
rsvd_2[2];
537 volatile uint16_t
rsvd_3[3];
544 volatile uint16_t
rsvd_6[2];
601 status = (bool)(adc->
ADCINTFLG & (1 << intNumber) >> intNumber);
676 extern ADC_Handle
ADC_init(
void *pMemory,
const size_t numBytes);
703 extern void ADC_reset(ADC_Handle adcHandle);
780 extern void ADC_setOffTrim(ADC_Handle adcHandle,
const uint16_t offtrim);
821 #endif // end of _ADC_H_ definition
struct _ADC_Obj_ * ADC_Handle
Defines the analog-to-digital converter (ADC) handle.
Denotes SOC channel number A3.
volatile uint16_t ADCSOCOVFCLR1
ADC SOC Overflow Clear 1 Register.
volatile uint16_t ADCINTSOCSEL2
ADC Interrupt Trigger SOC Select 2 Register.
ADC_SocTrigSrc_e
Enumeration to define the start of conversion (SOC) trigger source.
void ADC_setSocTrigSrc(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocTrigSrc_e trigSrc)
Sets the start-of-conversion (SOC) trigger source.
Denotes SOC channel number B4.
volatile uint16_t rsvd_8
Reserved.
Denotes SOC channel number A6.
Denotes an SOC sample delay of 29 cycles.
Denotes an SOC sample delay of 53 cycles.
Denotes a EPWM1, ADCSOCA trigger source for the SOC flag.
ADC_IntPulseGenMode_e
Enumeration to define the analog-to-digital converter (ADC) interrupt pulse generation mode...
Denotes a EPWM4, ADCSOCA trigger source for the SOC flag.
void ADC_enableBandGap(ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC) band gap circuit.
void ADC_setOffTrim(ADC_Handle adcHandle, const uint16_t offtrim)
Sets the offset trim register.
Denotes SOC8 and SOC9 are sampled separately.
Denotes that interrupt source is the end of conversion for SOC11.
ADC_SampleMode_e
Enumeration to define the analog-to-digital converter (ADC) sample modes.
Denotes soc 12 forced conversion.
Denotes an SOC sample delay of 7 cycles.
Denotes SOC channel number B6.
volatile uint16_t ADCINTFLGCLR
ADC Interrupt Flag Clear Register.
ADC_SocNumber_e
Enumeration to define the start of conversion (SOC) numbers.
ADC_IntSrc_e
Enumeration to define the analog-to-digital converter (ADC) interrupt source.
volatile uint16_t ADCINTFLG
ADC Interrupt Flag Register.
void ADC_setSocFrcWord(ADC_Handle adcHandle, const uint16_t socFrc)
Sets the entire start of conversion (SOC) force register.
volatile uint16_t ADCINTOVF
ADC Interrupt Overflow Register.
Denotes that interrupt source is the end of conversion for SOC4.
void ADC_setupSocTrigSrc(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_IntTriggerSOC_e intTrigSrc)
Sets the start of conversion (SOC) trigger source.
ADC_TempSensorSrc_e
Enumeration to define the temperature sensor source.
Denotes an SOC sample delay of 15 cycles.
Denotes SOC channel number B3.
volatile uint16_t ADCSOCFRC1
ADC SOC Force 1 Register.
Denotes SOC14 and SOC15 are sampled together.
Denotes a XINT2, XINT2SOC trigger source for the SOC flag.
Denotes an SOC sample delay of 26 cycles.
ADC_SocFrc_e
Enumeration to define the soc force values.
Denotes a EPWM4, ADCSOCB trigger source for the SOC flag.
void ADC_reset(ADC_Handle adcHandle)
Resets the analog-to-digital converter (ADC)
void ADC_setIntPulseGenMode(ADC_Handle adcHandle, const ADC_IntPulseGenMode_e pulseMode)
Sets the interrupt pulse generation mode.
Denotes soc 15 forced conversion.
Denotes soc 13 forced conversion.
Denotes SOC12 and SOC13 are sampled together.
Denotes an SOC sample delay of 61 cycles.
Denotes that interrupt source is the end of conversion for SOC14.
void ADC_disableVoltRefLoConv(ADC_Handle adcHandle)
Disables conversion of the voltage reference low signal for calibration.
#define ADC_ADCSOCxCTL_ACQPS_BITS
Defines the location of the ACQPS bits in the ADCSOCxCTL register.
Denotes an SOC sample delay of 27 cycles.
Denotes a EPWM8, ADCSOCB trigger source for the SOC flag.
Denotes SOC channel number A0 and B0 together.
Denotes an SOC sample delay of 9 cycles.
volatile uint16_t ADCSAMPLEMODE
ADC Sample Mode Register.
static ADC_SocSampleDelay_e ADC_getSocSampleDelay(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber)
Gets the analog-to-digital converter (ADC) start-of-conversion (SOC) sample delay value...
Denotes a EPWM8, ADCSOCA trigger source for the SOC flag.
void ADC_enableVoltRefLoConv(ADC_Handle adcHandle)
Enables conversion of the voltage reference low signal for calibration.
Denotes SOC channel number A1.
Denotes soc 8 forced conversion.
Denotes SOC channel number A5.
Denotes an SOC sample delay of 50 cycles.
Denotes ADCINT9 High Priority for use with PIE_enableAdcInt() only.
Denotes SOC2 and SOC3 are sampled separately.
Denotes Main Clock Prescaling of 4.
volatile uint16_t rsvd_10
Reserved.
Denotes a EPWM5, ADCSOCA trigger source for the SOC flag.
Denotes that interrupt pulse generation occurs when the ADC begins conversion.
Denotes a EPWM6, ADCSOCA trigger source for the SOC flag.
volatile uint16_t rsvd_2[3]
Reserved.
Denotes a CPUTIMER1 trigger source for the SOC flag.
Denotes SOC channel number A4.
void ADC_enableNoOverlapMode(ADC_Handle adcHandle)
Enables no overlap mode.
void ADC_setIntMode(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber, const ADC_IntMode_e intMode)
Sets the interrupt mode.
Denotes an SOC sample delay of 62 cycles.
ADC_DivideSelect_e ADC_getDivideSelect(ADC_Handle adcHandle)
Gets the analog-to-digital converter (ADC) divide select value.
volatile uint16_t resvd_1[26096]
Reserved.
Denotes SOC0 and SOC1 are sampled together.
volatile uint16_t rsvd_6[2]
Reserved.
Denotes SOC2 and SOC3 are sampled together.
Denotes SOC channel number B2.
Denotes soc 10 forced conversion.
void ADC_disableRefBuffers(ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC) reference buffers circuit.
Denotes that interrupt source is the end of conversion for SOC15.
void ADC_enable(ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC)
volatile uint16_t ADCCTL2
ADC Control Register 2.
volatile uint16_t rsvd_3[3]
Reserved.
Denotes an SOC sample delay of 38 cycles.
volatile uint16_t ADCSOCxCTL[16]
ADC SOCx Control Registers.
volatile uint16_t ADCCTL1
ADC Control Register 1.
Denotes a EPWM2, ADCSOCB trigger source for the SOC flag.
ADC_DivideSelect_e
Enumeration to define the start of conversion (SOC) numbers.
volatile uint16_t ADCINTOVFCLR
ADC Interrupt Overflow Clear Register.
ADC_IntTriggerSOC_e
Enumeration to define the analog-to-digital converter (ADC) input trigger SOC Select 1 Register group...
Denotes an SOC sample delay of 24 cycles.
Denotes an SOC sample delay of 11 cycles.
Denotes an SOC sample delay of 52 cycles.
Denotes a EPWM1, ADCSOCB trigger source for the SOC flag.
ADC_ResultNumber_e
Enumeration to define the analog-to-digital converter (ADC) result number.
Denotes that interrupt source is the end of conversion for SOC0.
Denotes an SOC sample delay of 28 cycles.
Denotes SOC6 and SOC7 are sampled separately.
volatile uint16_t resvd_12[13]
Reserved.
Denotes that a new interrupt with not be generated until the interrupt flag is cleared.
Denotes an internal voltage reference source.
volatile uint16_t ADCINTSOCSEL1
ADC Interrupt Trigger SOC Select 1 Register.
void ADC_setSampleMode(ADC_Handle adcHandle, const ADC_SampleMode_e sampleMode)
Sets the sample mode.
Denotes a EPWM5, ADCSOCB trigger source for the SOC flag.
Denotes an SOC sample delay of 55 cycles.
void ADC_disableNoOverlapMode(ADC_Handle adcHandle)
Disables no overlap mode.
Denotes an SOC sample delay of 63 cycles.
Denotes SOC channel number A0 and B0 together.
Denotes an SOC sample delay of 39 cycles.
Defines the analog-to-digital converter (ADC) object.
Denotes SOC10 and SOC11 are sampled together.
ADC_Handle ADC_init(void *pMemory, const size_t numBytes)
Initializes the analog-to-digital converter (ADC) object handle.
static bool ADC_getIntFlag(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Gets the analog-to-digital converter (ADC) interrupt flag.
Denotes an SOC sample delay of 14 cycles.
void ADC_disableBandGap(ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC) band gap circuit.
Denotes an SOC sample delay of 37 cycles.
ADC_IntNumber_e
Enumeration to define the analog-to-digital converter (ADC) interrupt number.
Denotes SOC channel number B7.
void ADC_setVoltRefSrc(ADC_Handle adcHandle, const ADC_VoltageRefSrc_e voltRef)
Sets the voltage reference source.
Denotes an SOC sample delay of 22 cycles.
Denotes that interrupt source is the end of conversion for SOC3.
ADC_VoltageRefSrc_e
Enumeration to define the voltage reference source.
void ADC_enableInt(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Enables the analog-to-digital converter (ADC) interrupt.
Denotes that interrupt source is the end of conversion for SOC13.
Denotes a CPUTIMER0 trigger source for the SOC flag.
Denotes that sample and conversion overlap is not allowed.
Denotes SOC channel number B0.
Denotes that interrupt pulse generation occurs 1 cycle prior to the ADC result latching.
Denotes an SOC sample delay of 35 cycles.
Denotes an SOC sample delay of 48 cycles.
volatile uint16_t SOCPRICTRL
ADC Start Of Conversion Priority Control Register.
Denotes soc 4 forced conversion.
Denotes that interrupt source is the end of conversion for SOC2.
Denotes SOC channel number A7.
Denotes SOC channel number A0 and B0 together.
Denotes an SOC sample delay of 12 cycles.
struct _ADC_Obj_ ADC_Obj
Defines the analog-to-digital converter (ADC) object.
Denotes soc 1 forced conversion.
Denotes that a new interrupt with be generated on the next end of conversion (EOC) ...
Denotes ADCINT1 High Priority for use with PIE_enableAdcInt() only.
Denotes an SOC sample delay of 42 cycles.
Denotes that interrupt source is the end of conversion for SOC1.
Denotes an SOC sample delay of 54 cycles.
Denotes SOC4 and SOC5 are sampled separately.
Denotes SOC4 and SOC5 are sampled together.
volatile uint16_t ADCREFTRIM
ADC Reference/Gain Trim Register.
Denotes that interrupt source is the end of conversion for SOC9.
Denotes soc 9 forced conversion.
volatile uint16_t INTSELxNy[5]
ADC Interrupt Select x and y Register.
Denotes Main Clock Prescaling of 0.
Denotes SOC channel number B5.
Denotes an SOC sample delay of 25 cycles.
static uint_least16_t ADC_readResult(ADC_Handle adcHandle, const ADC_ResultNumber_e resultNumber)
Reads the specified ADC result (i.e. value)
Denotes SOC10 and SOC11 are sampled separately.
Denotes an SOC sample delay of 8 cycles.
Denotes SOC14 and SOC15 are sampled separately.
Denotes soc 7 forced conversion.
Denotes SOC0 and SOC1 are sampled separately.
Contains public interface to various functions related to the central processing unit (CPU) object...
volatile uint16_t ADCREV
ADC Revision Register.
#define ADC_ADCSAMPLEMODE_SEPARATE_FLAG
Define for the channel separate flag.
volatile uint16_t rsvd_11[16]
Reserved.
volatile uint16_t rsvd_9
Reserved.
Denotes SOC12 and SOC13 are sampled separately.
Denotes an SOC sample delay of 51 cycles.
Denotes soc 3 forced conversion.
Denotes SOC channel number A0 and B0 together.
Denotes a EPWM7, ADCSOCB trigger source for the SOC flag.
Denotes soc 11 forced conversion.
Denotes that interrupt source is the end of conversion for SOC7.
Denotes an internal temperature source.
static void ADC_clearIntFlag(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Clears the analog-to-digital converter (ADC) interrupt flag.
volatile uint16_t ADCSOCFLG1
ADC SOC Flag 1 Register.
Denotes that ADCINT2 will trigger SOCx. TRIGSEL field is ignored.
Denotes that interrupt source is the end of conversion for SOC12.
ADC_SocSampleDelay_e
Enumeration to define the start of conversion (SOC) sample delays.
Denotes that interrupt source is the end of conversion for SOC10.
Denotes a EPWM3, ADCSOCB trigger source for the SOC flag.
Denotes soc 14 forced conversion.
void ADC_setSocChanNumber(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocChanNumber_e chanNumber)
Sets the start-of-conversion (SOC) channel number.
Denotes an SOC sample delay of 13 cycles.
void ADC_enableRefBuffers(ADC_Handle adcHandle)
Enables the analog-to-digital converter (ADC) reference buffers circuit.
Denotes that sample and conversion overlap is allowed.
Denotes SOC6 and SOC7 are sampled together.
Denotes an SOC sample delay of 64 cycles.
Denotes an SOC sample delay of 40 cycles.
Denotes an SOC sample delay of 41 cycles.
Denotes a EPWM7, ADCSOCA trigger source for the SOC flag.
Denotes soc 6 forced conversion.
Denotes soc 2 forced conversion.
Denotes SOC channel number A0 and B0 together.
Denotes that interrupt source is the end of conversion for SOC5.
Denotes an SOC sample delay of 16 cycles.
void ADC_powerDown(ADC_Handle adcHandle)
Powers down the analog-to-digital converter (ADC)
void ADC_setIntSrc(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber, const ADC_IntSrc_e intSrc)
Sets the interrupt source.
Denotes SOC channel number A0 and B0 together.
ADC_IntMode_e
Enumeration to define the analog-to-digital converter (ADC) interrupt mode.
volatile uint16_t rsvd_5
Reserved.
ADC_SocChanNumber_e
Enumeration to define the start of conversion (SOC) channel numbers.
Denotes an SOC sample delay of 36 cycles.
void ADC_setTempSensorSrc(ADC_Handle adcHandle, const ADC_TempSensorSrc_e sensorSrc)
Sets the temperature sensor source.
void ADC_setSocFrc(ADC_Handle adcHandle, const ADC_SocFrc_e socFrc)
Sets the start-of-conversion (SOC) force register.
Denotes an SOC sample delay of 23 cycles.
volatile uint16_t rsvd_4
Reserved.
Denotes SOC channel number A0 and B0 together.
Denotes soc 5 forced conversion.
Denotes SOC8 and SOC9 are sampled together.
volatile uint16_t ADCOFFTRIM
ADC Offset Trim Register.
Denotes a EPWM7, ADCSOCB trigger source for the SOC flag.
Denotes an SOC sample delay of 49 cycles.
Denotes that interrupt source is the end of conversion for SOC6.
Denotes a EPWM3, ADCSOCA trigger source for the SOC flag.
ADC_ADCCTL2_ADCNONOVERLAP_e
Enumeration to define the analog-to-digital converter (ADC) sample and conversion overlap setting...
void ADC_powerUp(ADC_Handle adcHandle)
Powers up the analog-to-digital converter (ADC)
Denotes an internal voltage reference source.
Denotes a CPUTIMER2 trigger source for the SOC flag.
void ADC_disableInt(ADC_Handle adcHandle, const ADC_IntNumber_e intNumber)
Disables the analog-to-digital converter (ADC) interrupt.
Denotes an SOC sample delay of 10 cycles.
Denotes SOC channel number A2.
Denotes soc 0 forced conversion.
Denotes that ADCINT1 will trigger SOCx. TRIGSEL field is ignored.
volatile uint16_t ADCSOCOVF1
ADC SOC Overflow 1 Register.
Denotes an external temperature source.
Denotes a software trigger source for the SOC flag.
volatile uint16_t rsvd_7
Reserved.
Denotes SOC channel number A0 and B0 together.
Denotes Main Clock Prescaling of 2.
Denotes that no ADCINT will trigger SOCx. TRIGSEL field determines SOCx trigger.
Denotes a EPWM2, ADCSOCA trigger source for the SOC flag.
void ADC_setSocSampleDelay(ADC_Handle adcHandle, const ADC_SocNumber_e socNumber, const ADC_SocSampleDelay_e sampleDelay)
Sets the start-of-conversion (SOC) sample delay.
Denotes ADCINT2 High Priority for use with PIE_enableAdcInt() only.
Denotes SOC channel number A0.
void ADC_disable(ADC_Handle adcHandle)
Disables the analog-to-digital converter (ADC)
Denotes SOC channel number B1.
Denotes that interrupt source is the end of conversion for SOC8.
volatile uint16_t ADCRESULT[16]
ADC result registers.
void ADC_setDivideSelect(ADC_Handle adcHandle, const ADC_DivideSelect_e divSelect)
Sets the analog-to-digital converter (ADC) divide select value.
