/*
// TI File $Revision: /main/3 $
// Checkin $Date: Agu 1, 2017   13:45:43 $
//
// FILE:    F280025_RAM_CPU.cmd
//
// TITLE:   Linker Command File For F280025 examples that run out of RAM
//
//
//          Keep in mind that L0,L1,L2,L3 and L4 are protected by the code
//          security module.
//
//          What this means is in most cases you will want to move to
//          another memory map file which has more memory defined.
//
*/

/*========================================================= */
/* Define the memory block start/length for the F28002x
   PAGE 0 will be used to organize program sections
   PAGE 1 will be used to organize data sections

   Notes:
         Memory blocks on F280025 are uniform (ie same
         physical memory) in both PAGE 0 and PAGE 1.
         That is the same memory region should not be
         defined for both PAGE 0 and PAGE 1.
         Doing so will result in corruption of program
         and/or data.

         Contiguous SARAM memory blocks can be combined
         if required to create a larger memory block.
*///#############################################################################
// This file belongs to the DCSM testing project for f28002x device.
// It is intended to be a part of the test directory only.
//#############################################################################
//                              DISCLAIMER
//#############################################################################

MEMORY
{
   BEGIN           	: origin = 0x00080000, length = 0x00000002

   BOOT_RSVD		: origin = 0x00000000, length = 0x00000050
   
   RAMGS0     	   	: origin = 0x0000C000, length = 0x00000800

   RAMLS456        : origin = 0x0000A000, length = 0x00001000
   RAMLS7        : origin = 0x0000B000, length = 0x00001000

   FLASHBANK0_BOOT	: origin = 0x00080002, length = 0x00001FFE			/* 8k BOOT */

   FLASHBANK0_BAK	: origin = 0x00082000, length = 0x00008000			/* 32k BAK */

   FLASHBANK0_APP	: origin = 0x0008A010, length = 0x00005FE0			/* 24k APP */  /* 留8个word存放信息 */

   BOOTROM			: origin = 0x003F0000, length = 0x00004000
   BOOTROM_FUNC		: origin = 0x003F4000, length = 0x00003000
   BOOTROM_EXT		: origin = 0x003F8000, length = 0x00007FC0
   RESET           	: origin = 0x003FFFC0, length = 0x00000002

   BOOTROM_CONST	: origin = 0x003F7000, length = 0x00001000

   RAMM0           	: origin = 0x00000050, length = 0x000003B0
   RAMM1           	: origin = 0x00000400, length = 0x00000400     /* on-chip RAM block M1 */

}


SECTIONS
{

   .TI.ramfunc		: LOAD = FLASHBANK0_BOOT			/* 定义在ramfunc上的代码，加载到FLASHBANK0_S0_1中 */
                      RUN = RAMLS7,	                /* ramfunc上的代码，复制到RAMLS4567上运行 */
                      LOAD_START(RamfuncsLoadStart),
                      LOAD_SIZE(RamfuncsLoadSize),
                      LOAD_END(RamfuncsLoadEnd),
                      RUN_START(RamfuncsRunStart),
                      RUN_SIZE(RamfuncsRunSize),
                      RUN_END(RamfuncsRunEnd),
                      ALIGN(8)

   .text            : > FLASHBANK0_BOOT,      	ALIGN(8)
   .cinit           : > FLASHBANK0_BOOT,      	ALIGN(8)
   .switch          : > FLASHBANK0_BOOT,      	ALIGN(8)
   .reset           : > RESET, 				   	TYPE = DSECT
   .cio				: > RAMM0
   codestart		: > BEGIN,     		 	   	ALIGN(8)

   .stack           : > RAMM0

   .pinit           : > FLASHBANK0_BOOT,		ALIGN(8)
   .bss             : > RAMLS456,		ALIGN(8)
   .data            : > RAMLS456
   .sysmem          : > RAMLS456

   ramgs0 : > RAMGS0

   .const           : >  FLASHBANK0_BOOT,       ALIGN(8)
   .init_array      : >  RAMM0

    DataBufferSection : > RAMGS0,               ALIGN(8)
}



/*
//===========================================================================
// End of file.
//===========================================================================
*/
