//###########################################################################
//
// FILE:    hw_asysctl.h
//
// TITLE:   Definitions for the ASYSCTL registers.
//
//###########################################################################
// $TI Release: F28002x Support Library v3.02.00.00 $
// $Release Date: Tue May 26 17:23:28 IST 2020 $
// $Copyright:
// Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
//
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// $
//###########################################################################

#ifndef HW_ASYSCTL_H
#define HW_ASYSCTL_H

//*****************************************************************************
//
// The following are defines for the ASYSCTL register offsets
//
//*****************************************************************************
#define ASYSCTL_O_PMMVMONTRIM     0xEU         // Power Management Module VMON
                                               // Trim Register
#define ASYSCTL_O_PMMVREGTRIM     0x14U        // Power Management Module VREG
                                               // Trim Register
#define ASYSCTL_O_TSNSCTL         0x60U        // Temperature Sensor Control
                                               // Register
#define ASYSCTL_O_ANAREFCTL       0x68U        // Analog Reference Control
                                               // Register
#define ASYSCTL_O_VMONCTL         0x70U        // Voltage Monitor Control
                                               // Register
#define ASYSCTL_O_CMPHPMXSEL      0x82U        // Bits to select one of the
                                               // many sources on CopmHP inputs.
                                               // Refer to Pimux diagram for
                                               // details.
#define ASYSCTL_O_CMPLPMXSEL      0x84U        // Bits to select one of the
                                               // many sources on CopmLP inputs.
                                               // Refer to Pimux diagram for
                                               // details.
#define ASYSCTL_O_CMPHNMXSEL      0x86U        // Bits to select one of the
                                               // many sources on CopmHN inputs.
                                               // Refer to Pimux diagram for
                                               // details.
#define ASYSCTL_O_CMPLNMXSEL      0x87U        // Bits to select one of the
                                               // many sources on CopmLN inputs.
                                               // Refer to Pimux diagram for
                                               // details.
#define ASYSCTL_O_ADCDACLOOPBACK  0x88U        // Enabble loopback from DAC to
                                               // ADCs
#define ASYSCTL_O_LOCK            0x8EU        // Lock Register
#define ASYSCTL_O_SYSAPLLCONFIG10  0xC9U        // APLL Module (SYSPLL Instance)
                                               // CONFIG10 Register

//*****************************************************************************
//
// The following are defines for the bit fields in the PMMVMONTRIM register
//
//*****************************************************************************
#define ASYSCTL_PMMVMONTRIM_PORBORFILTERTRIM_S  16U
#define ASYSCTL_PMMVMONTRIM_PORBORFILTERTRIM_M  0x70000U     // Trim Bits for the POR/BOR
                                               // filter
#define ASYSCTL_PMMVMONTRIM_PORBORFILTERTRIM_RANGE_SELECT  0x80000U     // Power Supply glitch
                                               // sensititivity trim.
#define ASYSCTL_PMMVMONTRIM_PMMSPAREPROG_S  20U
#define ASYSCTL_PMMVMONTRIM_PMMSPAREPROG_M  0xF00000U    // Spare For Future use

//*****************************************************************************
//
// The following are defines for the bit fields in the PMMVREGTRIM register
//
//*****************************************************************************
#define ASYSCTL_PMMVREGTRIM_VREGTRIM_S  0U
#define ASYSCTL_PMMVREGTRIM_VREGTRIM_M  0xFFU        // Core VDD Voltage Regulator
                                               // Trim

//*****************************************************************************
//
// The following are defines for the bit fields in the TSNSCTL register
//
//*****************************************************************************
#define ASYSCTL_TSNSCTL_ENABLE    0x1U         // Temperature Sensor Enable

//*****************************************************************************
//
// The following are defines for the bit fields in the ANAREFCTL register
//
//*****************************************************************************
#define ASYSCTL_ANAREFCTL_ANAREFASEL  0x1U         // Analog Reference A Select
#define ASYSCTL_ANAREFCTL_ANAREFCSEL  0x4U         // Analog Reference C Select
#define ASYSCTL_ANAREFCTL_ANAREFA2P5SEL  0x100U       // Analog Reference A Select
#define ASYSCTL_ANAREFCTL_ANAREFC2P5SEL  0x400U       // Analog Reference C Select

//*****************************************************************************
//
// The following are defines for the bit fields in the VMONCTL register
//
//*****************************************************************************
#define ASYSCTL_VMONCTL_OVMONENZ  0x1U         // Over Voltage Monitor Enable
                                               // Low
#define ASYSCTL_VMONCTL_OVFNMIEN  0x2U         // Over Voltage Fault NMI Enable
#define ASYSCTL_VMONCTL_BORLVMONDIS  0x100U       // Disable BORL(ow) feature on
                                               // VDDIO

//*****************************************************************************
//
// The following are defines for the bit fields in the CMPHPMXSEL register
//
//*****************************************************************************
#define ASYSCTL_CMPHPMXSEL_CMP1HPMXSEL_S  0U
#define ASYSCTL_CMPHPMXSEL_CMP1HPMXSEL_M  0x7U         // CMP1HPMXSEL bits
#define ASYSCTL_CMPHPMXSEL_CMP2HPMXSEL_S  3U
#define ASYSCTL_CMPHPMXSEL_CMP2HPMXSEL_M  0x38U        // CMP2HPMXSEL bits
#define ASYSCTL_CMPHPMXSEL_CMP3HPMXSEL_S  6U
#define ASYSCTL_CMPHPMXSEL_CMP3HPMXSEL_M  0x1C0U       // CMP3HPMXSEL bits
#define ASYSCTL_CMPHPMXSEL_CMP4HPMXSEL_S  9U
#define ASYSCTL_CMPHPMXSEL_CMP4HPMXSEL_M  0xE00U       // CMP4HPMXSEL bits

//*****************************************************************************
//
// The following are defines for the bit fields in the CMPLPMXSEL register
//
//*****************************************************************************
#define ASYSCTL_CMPLPMXSEL_CMP1LPMXSEL_S  0U
#define ASYSCTL_CMPLPMXSEL_CMP1LPMXSEL_M  0x7U         // CMP1LPMXSEL bits
#define ASYSCTL_CMPLPMXSEL_CMP2LPMXSEL_S  3U
#define ASYSCTL_CMPLPMXSEL_CMP2LPMXSEL_M  0x38U        // CMP2LPMXSEL bits
#define ASYSCTL_CMPLPMXSEL_CMP3LPMXSEL_S  6U
#define ASYSCTL_CMPLPMXSEL_CMP3LPMXSEL_M  0x1C0U       // CMP3LPMXSEL bits
#define ASYSCTL_CMPLPMXSEL_CMP4LPMXSEL_S  9U
#define ASYSCTL_CMPLPMXSEL_CMP4LPMXSEL_M  0xE00U       // CMP4LPMXSEL bits

//*****************************************************************************
//
// The following are defines for the bit fields in the CMPHNMXSEL register
//
//*****************************************************************************
#define ASYSCTL_CMPHNMXSEL_CMP1HNMXSEL  0x1U         // CMP1HNMXSEL bits
#define ASYSCTL_CMPHNMXSEL_CMP2HNMXSEL  0x2U         // CMP2HNMXSEL bits
#define ASYSCTL_CMPHNMXSEL_CMP3HNMXSEL  0x4U         // CMP3HNMXSEL bits
#define ASYSCTL_CMPHNMXSEL_CMP4HNMXSEL  0x8U         // CMP4HNMXSEL bits

//*****************************************************************************
//
// The following are defines for the bit fields in the CMPLNMXSEL register
//
//*****************************************************************************
#define ASYSCTL_CMPLNMXSEL_CMP1LNMXSEL  0x1U         // CMP1LNMXSEL bits
#define ASYSCTL_CMPLNMXSEL_CMP2LNMXSEL  0x2U         // CMP2LNMXSEL bits
#define ASYSCTL_CMPLNMXSEL_CMP3LNMXSEL  0x4U         // CMP3LNMXSEL bits
#define ASYSCTL_CMPLNMXSEL_CMP4LNMXSEL  0x8U         // CMP4LNMXSEL bits

//*****************************************************************************
//
// The following are defines for the bit fields in the ADCDACLOOPBACK register
//
//*****************************************************************************
#define ASYSCTL_ADCDACLOOPBACK_ENLB2ADCA  0x1U         // Enable DACA loopback to ADCA
#define ASYSCTL_ADCDACLOOPBACK_ENLB2ADCC  0x4U         // Enable DACA loopback to ADCC
#define ASYSCTL_ADCDACLOOPBACK_KEY_S  16U
#define ASYSCTL_ADCDACLOOPBACK_KEY_M  0xFFFF0000U  // Key to enable writes

//*****************************************************************************
//
// The following are defines for the bit fields in the LOCK register
//
//*****************************************************************************
#define ASYSCTL_LOCK_TSNSCTL      0x1U         // TSNSCTL Register lock bit
#define ASYSCTL_LOCK_ANAREFCTL    0x2U         // ANAREFCTL Register lock bit
#define ASYSCTL_LOCK_VMONCTL      0x4U         // VMONCTL Register lock bit
#define ASYSCTL_LOCK_CMPHPMXSEL   0x20U        // CMPHPMXSEL Register lock bit
#define ASYSCTL_LOCK_CMPLPMXSEL   0x40U        // CMPLPMXSEL Register lock bit
#define ASYSCTL_LOCK_CMPHNMXSEL   0x80U        // CMPHNMXSEL Register lock bit
#define ASYSCTL_LOCK_CMPLNMXSEL   0x100U       // CMPLNMXSEL Register lock bit
#define ASYSCTL_LOCK_VREGCTL      0x200U       // VREGCTL Register lock bit

//*****************************************************************************
//
// The following are defines for the bit fields in the SYSAPLLCONFIG10 register
//
//*****************************************************************************
#define ASYSCTL_SYSAPLLCONFIG10_LDO_LO_COMP_EN  0x1U         // LDO_LO_COMP_EN Value
#define ASYSCTL_SYSAPLLCONFIG10_APLL_LOCK_MASK  0x2U         // APLL_LOCK_MASK Value
#define ASYSCTL_SYSAPLLCONFIG10_SUMMARY_LOCK_MASK  0x4U         // SUMMARY_LOCK_MASK Value
#define ASYSCTL_SYSAPLLCONFIG10_SLIP_UNMASK  0x8U         // SLIP_UNMASK Value
#define ASYSCTL_SYSAPLLCONFIG10_PLLEN_UNMASK  0x10U        // PLLEN_UNMASK Value
#endif
