epwm Configuration Diagram

%0 cluster_epwm6 EPWM6 = EPWM6AB cluster_epwm4 EPWM4 = EPWM4AB cluster_epwm7 EPWM7 = EPWM7AB cluster_epwm1 EPWM1 = SCR1_2 cluster_epwm2 EPWM2 = SCR3_4 cluster_epwm3 EPWM3 = SCR5_6 EPWMXBAR  EPWM XBAR TRIP4 TRIP5 TRIP7 TRIP8 TRIP9 TRIP10 TRIP11 TRIP12 epwm6_TB  Time Base SYNCIN Emulation Mode: EPWM_EMULATION_STOP_AFTER_NEXT_TB Time Base Clock Divider: EPWM_CLOCK_DIVIDER_1 High Speed Clock Divider: EPWM_HSCLOCK_DIVIDER_1 Time Base Period Load Mode: EPWM_PERIOD_SHADOW_LOAD Time Base Period Load Event: EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO Time Base Period: 2999 Time Base Period Link: EPWM_LINK_WITH_DISABLE Enable Time Base Period Global Load: false Initial Counter Value: 0 Counter Mode: EPWM_COUNTER_MODE_STOP_FREEZE Counter Mode After Sync: EPWM_COUNT_MODE_DOWN_AFTER_SYNC Enable Phase Shift Load: false Phase Shift Value: 0 Force a Sync Pulse: false Sync In Pulse Source: EPWM_SYNC_IN_PULSE_SRC_SYNCOUT_EPWM1 Sync Out Pulse: One-Shot Sync Out Trigger: EPWM_OSHT_SYNC_OUT_TRIG_SYNC EPWMxSYNCPER Source Select: HRPWM_PWMSYNC_SOURCE_PERIOD CTR==PRD SYNCOUT CTR==ZRO Digital Compare sync CTR_DIR epwm6_CC  EPWM Counter Compare Counter Compare A (CMPA): 0 Enable Counter Compare A (CMPA) Global Load: false Enable Shadow Counter Compare A (CMPA): true Counter Compare A Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare A (CMPA) Link: EPWM_LINK_WITH_DISABLE Counter Compare B (CMPB): 0 Enable Counter Compare B (CMPB) Global Load: false Enable Shadow Counter Compare B (CMPB): true Counter Compare B Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare B (CMPB) Link: EPWM_LINK_WITH_DISABLE Counter Compare C (CMPC): 0 Enable Counter Compare C (CMPC) Global Load: false Enable Shadow Counter Compare C (CMPC): true Counter Compare C Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare C (CMPC) Link: EPWM_LINK_WITH_DISABLE Counter Compare D (CMPD): 0 Enable Counter Compare D (CMPD) Global Load: false Enable Shadow Counter Compare D (CMPD): true Counter Compare D Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare D (CMPD) Link: EPWM_LINK_WITH_DISABLE CTR == CMPA CTR == CMPB CTR == CMPC CTR == CMPD epwm6_TB:s->epwm6_CC:n TBCTR epwm6_AQ  EPWM Action Qualifier PRD Enable Continuous SW Force Global Load: false Continuous SW Force Shadow Mode: EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO T1 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 T2 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 ePWMxA Global Load Enable: false ePWMxA Shadow Mode Enable: false ePWMxA Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxA One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxA  Time base counter equals zero: EPWM_AQ_OUTPUT_HIGH ePWMxA  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_LOW ePWMxA  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Global Load Enable: false ePWMxB Shadow Mode Enable: false ePWMxB Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxB One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxB  Time base counter equals zero: EPWM_AQ_OUTPUT_HIGH ePWMxB  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_LOW ePWMxB  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE EPWMA ZERO EPWMB DIR T1 T2 CMPA CMPB epwm6_TB:e->epwm6_AQ:w epwm6_TB:e->epwm6_AQ:w epwm6_TB:e->epwm6_AQ:w SYNCOUT_EPWM6 SYNCOUT_EPWM6 epwm6_TB:epwm6_syncout->SYNCOUT_EPWM6 epwm6_DC  EPWM Digital Compare DCAH Digital Compare A High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A High): Digital Compare A Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A Low): Condition For Digital Compare output 1 A: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 A: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCAEVT1): false Generate SYNCOUT (DCAEVT1): false Synch Mode (DCAEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCAEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare B High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B High): Digital Compare B Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B Low): Condition For Digital Compare output 1 B: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 B: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCBEVT1): false Generate SYNCOUT (DCBEVT1): false Synch Mode (DCBEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCBEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare Filter Input (DCEVTFILT event source): EPWM_DC_WINDOW_SOURCE_DCAEVT1 Use Blanking Window: false Blanking Window Start Event: EPWM_DC_WINDOW_START_TBCTR_PERIOD Blanking Window Offset from the Start Event: 0 Blanking Window Length: 0 Invert Blanking Window: false Use DC Counter Capture: false Enable DC Counter Capture Shadow Mode: false DC Counter Capture Re-Enable Event\Shadow Load Event (Blanking Window Start Event): EPWM_DC_WINDOW_START_TBCTR_PERIOD DC Counter Capture Independent Pulse Selection: false Use Edge Filter: false Edge Filter Mode: EPWM_DC_EDGEFILT_MODE_RISING Edge Filter Edge Count: EPWM_DC_EDGEFILT_EDGECNT_0 Enable Edge Filter Reset/Enable Valley Capture: false Edge Filter Counter Reset/Valley Capture Signal Source: EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE Start Valley Capture Logic: false Start Valley Capture: 0 Stop Valley Capture: 0 Select the delayed output (by HWDELVAL) of the Edge Filter: false SWVDELVAL (software valley delay value): 0 Valley Delay Divider: EPWM_VALLEY_DELAY_MODE_SW_DELAY DCAEVT1.force DCAL DCAEVT2.force DCAEVT1.sync DCAEVT2.sync DCAEVT1.inter DCAEVT1.soc DCBH DCBEVT1.force DCBL DCBEVT2.force DCBEVT1.sync DCBEVT2.sync DCBEVT1.inter DCBEVT1.soc epwm6_TZ  EPWM Trip-Zone EPWMA IN Use Advanced EPWM Trip Zone Actions: false TZA Event: EPWM_TZ_ACTION_HIGH_Z TZB Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT2 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT2 Event: EPWM_TZ_ACTION_HIGH_Z TZB_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZB_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z One-Shot Source: CBC Source: CBC Latch Clear Signal: EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO TZ Interrupt Source (ORed): Register Interrupt Handler: false EPWMA EPWMB IN EPWMB TZINT Digital Compare force epwm6_DC:n->epwm6_TZ:s epwm6_CC:e->epwm6_AQ:w epwm6_CC:e->epwm6_AQ:w epwm6_DB  EPWM Deadband EPWMA IN Active High: undefined Active Low: undefined Active High Complementary: undefined Active Low Complementary: undefined Dual Edge Delay Mode: undefined Rising Edge Delay Input: EPWM_DB_INPUT_EPWMA Falling Edge Delay Input: EPWM_DB_INPUT_EPWMA Rising Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Falling Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Enable Rising Edge Delay: false RED Shadow Load Event: EPWM_RED_LOAD_ON_CNTR_ZERO Enable RED Shadow Mode: false Rising Edge Delay Value: 0 Enable Falling Edge Delay: false FED Shadow Load Event: EPWM_FED_LOAD_ON_CNTR_ZERO Enable FED Shadow Mode: false Falling Edge Delay Value: 0 Swap Output for EPWMxA: false Swap Output for EPWMxB: false Enable Deadband Control Global Load: false Deadband Control Shadow Load Event: EPWM_DB_LOAD_ON_CNTR_ZERO Enable Deadband Control Shadow Mode: false Enable RED Global Load: false Enable FED Global Load: false Dead Band Counter Clock Rate: EPWM_DB_COUNTER_CLOCK_FULL_CYCLE EPWMA EPWMB IN EPWMB epwm6_AQ:e->epwm6_DB:w epwm6_AQ:e->epwm6_DB:w epwm6_PC  EPWM Chopper EPWMA IN Use Chopper: false Chopper Duty Cycle: 0 Chopper Frequency: 0 Chopper First Pulse Width: 0 EPWMA EPWMB IN EPWMB epwm6_DB:e->epwm6_PC:w epwm6_DB:e->epwm6_PC:w epwm6_PC:e->epwm6_TZ:w epwm6_PC:e->epwm6_TZ:w GPIO10 GPIO10 epwm6_TZ:e->GPIO10 A24 A24 epwm6_TZ:e->A24 D0 D0 epwm6_TZ:e->D0 E0 E0 epwm6_TZ:e->E0 GPIO11 GPIO11 epwm6_TZ:e->GPIO11 epwm6_ET  EPWM Event Trigger Timebase Signals Enable EPWM Interrupt: false Register Interrupt Handler: false Interrupt Event Sources: EPWM_INT_TBCTR_DISABLED Interrupt Event Count: 0 Interrupt Event Count Initial Value Load Enable: false Interrupt Event Count Initial Value: 0 Force Interrupt Event Count Initial Value: false SOCA Trigger Enable: false SOCA Trigger Source: EPWM_SOC_DCxEVT1 SOCA Trigger Event Count: 0 SOCA Trigger Event Count Initial Value Load Enable: false SOCA Trigger Event Count Initial Value: 0 Force SOCA Trigger Event Count Initial Value: false SOCB Trigger Enable: false SOCB Trigger Source: EPWM_SOC_DCxEVT1 SOCB Trigger Event Count: 0 SOCB Trigger Event Count Initial Value Load Enable: false SOCB Trigger Event Count Initial Value: 0 Force SOCB Trigger Event Count Initial Value: false INT Counter Compare Signals SOCA Digital Compare Signals SOCB epwm4_TB  Time Base SYNCIN Emulation Mode: EPWM_EMULATION_STOP_AFTER_NEXT_TB Time Base Clock Divider: EPWM_CLOCK_DIVIDER_1 High Speed Clock Divider: EPWM_HSCLOCK_DIVIDER_1 Time Base Period Load Mode: EPWM_PERIOD_SHADOW_LOAD Time Base Period Load Event: EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO Time Base Period: 2999 Time Base Period Link: EPWM_LINK_WITH_DISABLE Enable Time Base Period Global Load: false Initial Counter Value: 0 Counter Mode: EPWM_COUNTER_MODE_STOP_FREEZE Counter Mode After Sync: EPWM_COUNT_MODE_DOWN_AFTER_SYNC Enable Phase Shift Load: false Phase Shift Value: 0 Force a Sync Pulse: false Sync In Pulse Source: EPWM_SYNC_IN_PULSE_SRC_SYNCOUT_EPWM1 Sync Out Pulse: One-Shot Sync Out Trigger: EPWM_OSHT_SYNC_OUT_TRIG_SYNC EPWMxSYNCPER Source Select: HRPWM_PWMSYNC_SOURCE_PERIOD CTR==PRD SYNCOUT CTR==ZRO Digital Compare sync CTR_DIR epwm4_CC  EPWM Counter Compare Counter Compare A (CMPA): 0 Enable Counter Compare A (CMPA) Global Load: false Enable Shadow Counter Compare A (CMPA): true Counter Compare A Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare A (CMPA) Link: EPWM_LINK_WITH_DISABLE Counter Compare B (CMPB): 0 Enable Counter Compare B (CMPB) Global Load: false Enable Shadow Counter Compare B (CMPB): true Counter Compare B Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare B (CMPB) Link: EPWM_LINK_WITH_DISABLE Counter Compare C (CMPC): 0 Enable Counter Compare C (CMPC) Global Load: false Enable Shadow Counter Compare C (CMPC): true Counter Compare C Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare C (CMPC) Link: EPWM_LINK_WITH_DISABLE Counter Compare D (CMPD): 0 Enable Counter Compare D (CMPD) Global Load: false Enable Shadow Counter Compare D (CMPD): true Counter Compare D Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare D (CMPD) Link: EPWM_LINK_WITH_DISABLE CTR == CMPA CTR == CMPB CTR == CMPC CTR == CMPD epwm4_TB:s->epwm4_CC:n TBCTR epwm4_AQ  EPWM Action Qualifier PRD Enable Continuous SW Force Global Load: false Continuous SW Force Shadow Mode: EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO T1 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 T2 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 ePWMxA Global Load Enable: false ePWMxA Shadow Mode Enable: false ePWMxA Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxA One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxA  Time base counter equals zero: EPWM_AQ_OUTPUT_HIGH ePWMxA  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_LOW ePWMxA  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Global Load Enable: false ePWMxB Shadow Mode Enable: false ePWMxB Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxB One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxB  Time base counter equals zero: EPWM_AQ_OUTPUT_HIGH ePWMxB  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_LOW ePWMxB  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE EPWMA ZERO EPWMB DIR T1 T2 CMPA CMPB epwm4_TB:e->epwm4_AQ:w epwm4_TB:e->epwm4_AQ:w epwm4_TB:e->epwm4_AQ:w SYNCOUT_EPWM4 SYNCOUT_EPWM4 epwm4_TB:epwm4_syncout->SYNCOUT_EPWM4 epwm4_DC  EPWM Digital Compare DCAH Digital Compare A High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A High): Digital Compare A Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A Low): Condition For Digital Compare output 1 A: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 A: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCAEVT1): false Generate SYNCOUT (DCAEVT1): false Synch Mode (DCAEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCAEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare B High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B High): Digital Compare B Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B Low): Condition For Digital Compare output 1 B: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 B: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCBEVT1): false Generate SYNCOUT (DCBEVT1): false Synch Mode (DCBEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCBEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare Filter Input (DCEVTFILT event source): EPWM_DC_WINDOW_SOURCE_DCAEVT1 Use Blanking Window: false Blanking Window Start Event: EPWM_DC_WINDOW_START_TBCTR_PERIOD Blanking Window Offset from the Start Event: 0 Blanking Window Length: 0 Invert Blanking Window: false Use DC Counter Capture: false Enable DC Counter Capture Shadow Mode: false DC Counter Capture Re-Enable Event\Shadow Load Event (Blanking Window Start Event): EPWM_DC_WINDOW_START_TBCTR_PERIOD DC Counter Capture Independent Pulse Selection: false Use Edge Filter: false Edge Filter Mode: EPWM_DC_EDGEFILT_MODE_RISING Edge Filter Edge Count: EPWM_DC_EDGEFILT_EDGECNT_0 Enable Edge Filter Reset/Enable Valley Capture: false Edge Filter Counter Reset/Valley Capture Signal Source: EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE Start Valley Capture Logic: false Start Valley Capture: 0 Stop Valley Capture: 0 Select the delayed output (by HWDELVAL) of the Edge Filter: false SWVDELVAL (software valley delay value): 0 Valley Delay Divider: EPWM_VALLEY_DELAY_MODE_SW_DELAY DCAEVT1.force DCAL DCAEVT2.force DCAEVT1.sync DCAEVT2.sync DCAEVT1.inter DCAEVT1.soc DCBH DCBEVT1.force DCBL DCBEVT2.force DCBEVT1.sync DCBEVT2.sync DCBEVT1.inter DCBEVT1.soc epwm4_TZ  EPWM Trip-Zone EPWMA IN Use Advanced EPWM Trip Zone Actions: false TZA Event: EPWM_TZ_ACTION_HIGH_Z TZB Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT2 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT2 Event: EPWM_TZ_ACTION_HIGH_Z TZB_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZB_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z One-Shot Source: CBC Source: CBC Latch Clear Signal: EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO TZ Interrupt Source (ORed): Register Interrupt Handler: false EPWMA EPWMB IN EPWMB TZINT Digital Compare force epwm4_DC:n->epwm4_TZ:s epwm4_CC:e->epwm4_AQ:w epwm4_CC:e->epwm4_AQ:w epwm4_DB  EPWM Deadband EPWMA IN Active High: undefined Active Low: undefined Active High Complementary: undefined Active Low Complementary: undefined Dual Edge Delay Mode: undefined Rising Edge Delay Input: EPWM_DB_INPUT_EPWMA Falling Edge Delay Input: EPWM_DB_INPUT_EPWMA Rising Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Falling Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Enable Rising Edge Delay: false RED Shadow Load Event: EPWM_RED_LOAD_ON_CNTR_ZERO Enable RED Shadow Mode: false Rising Edge Delay Value: 0 Enable Falling Edge Delay: false FED Shadow Load Event: EPWM_FED_LOAD_ON_CNTR_ZERO Enable FED Shadow Mode: false Falling Edge Delay Value: 0 Swap Output for EPWMxA: false Swap Output for EPWMxB: false Enable Deadband Control Global Load: false Deadband Control Shadow Load Event: EPWM_DB_LOAD_ON_CNTR_ZERO Enable Deadband Control Shadow Mode: false Enable RED Global Load: false Enable FED Global Load: false Dead Band Counter Clock Rate: EPWM_DB_COUNTER_CLOCK_FULL_CYCLE EPWMA EPWMB IN EPWMB epwm4_AQ:e->epwm4_DB:w epwm4_AQ:e->epwm4_DB:w epwm4_PC  EPWM Chopper EPWMA IN Use Chopper: false Chopper Duty Cycle: 0 Chopper Frequency: 0 Chopper First Pulse Width: 0 EPWMA EPWMB IN EPWMB epwm4_DB:e->epwm4_PC:w epwm4_DB:e->epwm4_PC:w epwm4_PC:e->epwm4_TZ:w epwm4_PC:e->epwm4_TZ:w GPIO6 GPIO6 epwm4_TZ:e->GPIO6 GPIO7 GPIO7 epwm4_TZ:e->GPIO7 epwm4_ET  EPWM Event Trigger Timebase Signals Enable EPWM Interrupt: false Register Interrupt Handler: false Interrupt Event Sources: EPWM_INT_TBCTR_DISABLED Interrupt Event Count: 0 Interrupt Event Count Initial Value Load Enable: false Interrupt Event Count Initial Value: 0 Force Interrupt Event Count Initial Value: false SOCA Trigger Enable: false SOCA Trigger Source: EPWM_SOC_DCxEVT1 SOCA Trigger Event Count: 0 SOCA Trigger Event Count Initial Value Load Enable: false SOCA Trigger Event Count Initial Value: 0 Force SOCA Trigger Event Count Initial Value: false SOCB Trigger Enable: false SOCB Trigger Source: EPWM_SOC_DCxEVT1 SOCB Trigger Event Count: 0 SOCB Trigger Event Count Initial Value Load Enable: false SOCB Trigger Event Count Initial Value: 0 Force SOCB Trigger Event Count Initial Value: false INT Counter Compare Signals SOCA Digital Compare Signals SOCB epwm7_TB  Time Base SYNCIN Emulation Mode: EPWM_EMULATION_STOP_AFTER_NEXT_TB Time Base Clock Divider: EPWM_CLOCK_DIVIDER_1 High Speed Clock Divider: EPWM_HSCLOCK_DIVIDER_1 Time Base Period Load Mode: EPWM_PERIOD_SHADOW_LOAD Time Base Period Load Event: EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO Time Base Period: 2999 Time Base Period Link: EPWM_LINK_WITH_DISABLE Enable Time Base Period Global Load: false Initial Counter Value: 0 Counter Mode: EPWM_COUNTER_MODE_STOP_FREEZE Counter Mode After Sync: EPWM_COUNT_MODE_DOWN_AFTER_SYNC Enable Phase Shift Load: false Phase Shift Value: 0 Force a Sync Pulse: false Sync In Pulse Source: EPWM_SYNC_IN_PULSE_SRC_SYNCOUT_EPWM1 Sync Out Pulse: One-Shot Sync Out Trigger: EPWM_OSHT_SYNC_OUT_TRIG_SYNC EPWMxSYNCPER Source Select: HRPWM_PWMSYNC_SOURCE_PERIOD CTR==PRD SYNCOUT CTR==ZRO Digital Compare sync CTR_DIR epwm7_CC  EPWM Counter Compare Counter Compare A (CMPA): 0 Enable Counter Compare A (CMPA) Global Load: false Enable Shadow Counter Compare A (CMPA): true Counter Compare A Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare A (CMPA) Link: EPWM_LINK_WITH_DISABLE Counter Compare B (CMPB): 0 Enable Counter Compare B (CMPB) Global Load: false Enable Shadow Counter Compare B (CMPB): true Counter Compare B Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare B (CMPB) Link: EPWM_LINK_WITH_DISABLE Counter Compare C (CMPC): 0 Enable Counter Compare C (CMPC) Global Load: false Enable Shadow Counter Compare C (CMPC): true Counter Compare C Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare C (CMPC) Link: EPWM_LINK_WITH_DISABLE Counter Compare D (CMPD): 0 Enable Counter Compare D (CMPD) Global Load: false Enable Shadow Counter Compare D (CMPD): true Counter Compare D Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare D (CMPD) Link: EPWM_LINK_WITH_DISABLE CTR == CMPA CTR == CMPB CTR == CMPC CTR == CMPD epwm7_TB:s->epwm7_CC:n TBCTR epwm7_AQ  EPWM Action Qualifier PRD Enable Continuous SW Force Global Load: false Continuous SW Force Shadow Mode: EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO T1 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 T2 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 ePWMxA Global Load Enable: false ePWMxA Shadow Mode Enable: false ePWMxA Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxA One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxA  Time base counter equals zero: EPWM_AQ_OUTPUT_HIGH ePWMxA  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_LOW ePWMxA  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Global Load Enable: false ePWMxB Shadow Mode Enable: false ePWMxB Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxB One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxB  Time base counter equals zero: EPWM_AQ_OUTPUT_HIGH ePWMxB  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_LOW ePWMxB  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE EPWMA ZERO EPWMB DIR T1 T2 CMPA CMPB epwm7_TB:e->epwm7_AQ:w epwm7_TB:e->epwm7_AQ:w epwm7_TB:e->epwm7_AQ:w SYNCOUT_EPWM7 SYNCOUT_EPWM7 epwm7_TB:epwm7_syncout->SYNCOUT_EPWM7 epwm7_DC  EPWM Digital Compare DCAH Digital Compare A High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A High): Digital Compare A Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A Low): Condition For Digital Compare output 1 A: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 A: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCAEVT1): false Generate SYNCOUT (DCAEVT1): false Synch Mode (DCAEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCAEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare B High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B High): Digital Compare B Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B Low): Condition For Digital Compare output 1 B: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 B: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCBEVT1): false Generate SYNCOUT (DCBEVT1): false Synch Mode (DCBEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCBEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare Filter Input (DCEVTFILT event source): EPWM_DC_WINDOW_SOURCE_DCAEVT1 Use Blanking Window: false Blanking Window Start Event: EPWM_DC_WINDOW_START_TBCTR_PERIOD Blanking Window Offset from the Start Event: 0 Blanking Window Length: 0 Invert Blanking Window: false Use DC Counter Capture: false Enable DC Counter Capture Shadow Mode: false DC Counter Capture Re-Enable Event\Shadow Load Event (Blanking Window Start Event): EPWM_DC_WINDOW_START_TBCTR_PERIOD DC Counter Capture Independent Pulse Selection: false Use Edge Filter: false Edge Filter Mode: EPWM_DC_EDGEFILT_MODE_RISING Edge Filter Edge Count: EPWM_DC_EDGEFILT_EDGECNT_0 Enable Edge Filter Reset/Enable Valley Capture: false Edge Filter Counter Reset/Valley Capture Signal Source: EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE Start Valley Capture Logic: false Start Valley Capture: 0 Stop Valley Capture: 0 Select the delayed output (by HWDELVAL) of the Edge Filter: false SWVDELVAL (software valley delay value): 0 Valley Delay Divider: EPWM_VALLEY_DELAY_MODE_SW_DELAY DCAEVT1.force DCAL DCAEVT2.force DCAEVT1.sync DCAEVT2.sync DCAEVT1.inter DCAEVT1.soc DCBH DCBEVT1.force DCBL DCBEVT2.force DCBEVT1.sync DCBEVT2.sync DCBEVT1.inter DCBEVT1.soc epwm7_TZ  EPWM Trip-Zone EPWMA IN Use Advanced EPWM Trip Zone Actions: false TZA Event: EPWM_TZ_ACTION_HIGH_Z TZB Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT2 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT2 Event: EPWM_TZ_ACTION_HIGH_Z TZB_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZB_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z One-Shot Source: CBC Source: CBC Latch Clear Signal: EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO TZ Interrupt Source (ORed): Register Interrupt Handler: false EPWMA EPWMB IN EPWMB TZINT Digital Compare force epwm7_DC:n->epwm7_TZ:s epwm7_CC:e->epwm7_AQ:w epwm7_CC:e->epwm7_AQ:w epwm7_DB  EPWM Deadband EPWMA IN Active High: undefined Active Low: undefined Active High Complementary: undefined Active Low Complementary: undefined Dual Edge Delay Mode: undefined Rising Edge Delay Input: EPWM_DB_INPUT_EPWMA Falling Edge Delay Input: EPWM_DB_INPUT_EPWMA Rising Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Falling Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Enable Rising Edge Delay: false RED Shadow Load Event: EPWM_RED_LOAD_ON_CNTR_ZERO Enable RED Shadow Mode: false Rising Edge Delay Value: 0 Enable Falling Edge Delay: false FED Shadow Load Event: EPWM_FED_LOAD_ON_CNTR_ZERO Enable FED Shadow Mode: false Falling Edge Delay Value: 0 Swap Output for EPWMxA: false Swap Output for EPWMxB: false Enable Deadband Control Global Load: false Deadband Control Shadow Load Event: EPWM_DB_LOAD_ON_CNTR_ZERO Enable Deadband Control Shadow Mode: false Enable RED Global Load: false Enable FED Global Load: false Dead Band Counter Clock Rate: EPWM_DB_COUNTER_CLOCK_FULL_CYCLE EPWMA EPWMB IN EPWMB epwm7_AQ:e->epwm7_DB:w epwm7_AQ:e->epwm7_DB:w epwm7_PC  EPWM Chopper EPWMA IN Use Chopper: false Chopper Duty Cycle: 0 Chopper Frequency: 0 Chopper First Pulse Width: 0 EPWMA EPWMB IN EPWMB epwm7_DB:e->epwm7_PC:w epwm7_DB:e->epwm7_PC:w epwm7_PC:e->epwm7_TZ:w epwm7_PC:e->epwm7_TZ:w A20 A20 epwm7_TZ:e->A20 B20 B20 epwm7_TZ:e->B20 C20 C20 epwm7_TZ:e->C20 GPIO12 GPIO12 epwm7_TZ:e->GPIO12 A19 A19 epwm7_TZ:e->A19 B19 B19 epwm7_TZ:e->B19 C19 C19 epwm7_TZ:e->C19 GPIO13 GPIO13 epwm7_TZ:e->GPIO13 epwm7_ET  EPWM Event Trigger Timebase Signals Enable EPWM Interrupt: false Register Interrupt Handler: false Interrupt Event Sources: EPWM_INT_TBCTR_DISABLED Interrupt Event Count: 0 Interrupt Event Count Initial Value Load Enable: false Interrupt Event Count Initial Value: 0 Force Interrupt Event Count Initial Value: false SOCA Trigger Enable: false SOCA Trigger Source: EPWM_SOC_DCxEVT1 SOCA Trigger Event Count: 0 SOCA Trigger Event Count Initial Value Load Enable: false SOCA Trigger Event Count Initial Value: 0 Force SOCA Trigger Event Count Initial Value: false SOCB Trigger Enable: false SOCB Trigger Source: EPWM_SOC_DCxEVT1 SOCB Trigger Event Count: 0 SOCB Trigger Event Count Initial Value Load Enable: false SOCB Trigger Event Count Initial Value: 0 Force SOCB Trigger Event Count Initial Value: false INT Counter Compare Signals SOCA Digital Compare Signals SOCB epwm1_TB  Time Base SYNCIN Emulation Mode: EPWM_EMULATION_STOP_AFTER_NEXT_TB Time Base Clock Divider: EPWM_CLOCK_DIVIDER_4 High Speed Clock Divider: EPWM_HSCLOCK_DIVIDER_10 Time Base Period Load Mode: EPWM_PERIOD_SHADOW_LOAD Time Base Period Load Event: EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO Time Base Period: 31250 Time Base Period Link: EPWM_LINK_WITH_DISABLE Enable Time Base Period Global Load: false Initial Counter Value: 0 Counter Mode: EPWM_COUNTER_MODE_UP_DOWN Counter Mode After Sync: EPWM_COUNT_MODE_UP_AFTER_SYNC Enable Phase Shift Load: true Phase Shift Value: 0 Force a Sync Pulse: false Sync In Pulse Source: EPWM_SYNC_IN_PULSE_SRC_INPUTXBAR_OUT5 Sync Out Pulse: One-Shot Sync Out Trigger: EPWM_OSHT_SYNC_OUT_TRIG_SYNC EPWMxSYNCPER Source Select: HRPWM_PWMSYNC_SOURCE_PERIOD CTR==PRD SYNCOUT CTR==ZRO Digital Compare sync CTR_DIR epwm1_CC  EPWM Counter Compare Counter Compare A (CMPA): 22500 Enable Counter Compare A (CMPA) Global Load: false Enable Shadow Counter Compare A (CMPA): true Counter Compare A Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare A (CMPA) Link: EPWM_LINK_WITH_DISABLE Counter Compare B (CMPB): 15625 Enable Counter Compare B (CMPB) Global Load: false Enable Shadow Counter Compare B (CMPB): true Counter Compare B Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare B (CMPB) Link: EPWM_LINK_WITH_DISABLE Counter Compare C (CMPC): 0 Enable Counter Compare C (CMPC) Global Load: false Enable Shadow Counter Compare C (CMPC): true Counter Compare C Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare C (CMPC) Link: EPWM_LINK_WITH_DISABLE Counter Compare D (CMPD): 0 Enable Counter Compare D (CMPD) Global Load: false Enable Shadow Counter Compare D (CMPD): true Counter Compare D Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare D (CMPD) Link: EPWM_LINK_WITH_DISABLE CTR == CMPA CTR == CMPB CTR == CMPC CTR == CMPD epwm1_TB:s->epwm1_CC:n TBCTR epwm1_AQ  EPWM Action Qualifier PRD Enable Continuous SW Force Global Load: false Continuous SW Force Shadow Mode: EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO T1 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 T2 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 ePWMxA Global Load Enable: false ePWMxA Shadow Mode Enable: false ePWMxA Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxA One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxA  Time base counter equals zero: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter equals period: EPWM_AQ_OUTPUT_LOW ePWMxA  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_HIGH ePWMxA  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Global Load Enable: false ePWMxB Shadow Mode Enable: false ePWMxB Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxB One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxB  Time base counter equals zero: EPWM_AQ_OUTPUT_LOW ePWMxB  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_HIGH ePWMxB  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE EPWMA ZERO EPWMB DIR T1 T2 CMPA CMPB epwm1_TB:e->epwm1_AQ:w epwm1_TB:e->epwm1_AQ:w epwm1_TB:e->epwm1_AQ:w SYNCOUT_EPWM1 SYNCOUT_EPWM1 epwm1_TB:epwm1_syncout->SYNCOUT_EPWM1 epwm1_DC  EPWM Digital Compare DCAH Digital Compare A High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A High): Digital Compare A Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A Low): Condition For Digital Compare output 1 A: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 A: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCAEVT1): false Generate SYNCOUT (DCAEVT1): true Synch Mode (DCAEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCAEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare B High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B High): Digital Compare B Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B Low): Condition For Digital Compare output 1 B: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 B: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCBEVT1): false Generate SYNCOUT (DCBEVT1): false Synch Mode (DCBEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCBEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare Filter Input (DCEVTFILT event source): EPWM_DC_WINDOW_SOURCE_DCAEVT1 Use Blanking Window: false Blanking Window Start Event: EPWM_DC_WINDOW_START_TBCTR_PERIOD Blanking Window Offset from the Start Event: 0 Blanking Window Length: 0 Invert Blanking Window: false Use DC Counter Capture: false Enable DC Counter Capture Shadow Mode: false DC Counter Capture Re-Enable Event\Shadow Load Event (Blanking Window Start Event): EPWM_DC_WINDOW_START_TBCTR_PERIOD DC Counter Capture Independent Pulse Selection: false Use Edge Filter: false Edge Filter Mode: EPWM_DC_EDGEFILT_MODE_RISING Edge Filter Edge Count: EPWM_DC_EDGEFILT_EDGECNT_0 Enable Edge Filter Reset/Enable Valley Capture: false Edge Filter Counter Reset/Valley Capture Signal Source: EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE Start Valley Capture Logic: false Start Valley Capture: 0 Stop Valley Capture: 0 Select the delayed output (by HWDELVAL) of the Edge Filter: false SWVDELVAL (software valley delay value): 0 Valley Delay Divider: EPWM_VALLEY_DELAY_MODE_SW_DELAY DCAEVT1.force DCAL DCAEVT2.force DCAEVT1.sync DCAEVT2.sync DCAEVT1.inter DCAEVT1.soc DCBH DCBEVT1.force DCBL DCBEVT2.force DCBEVT1.sync DCBEVT2.sync DCBEVT1.inter DCBEVT1.soc epwm1_TZ  EPWM Trip-Zone EPWMA IN Use Advanced EPWM Trip Zone Actions: false TZA Event: EPWM_TZ_ACTION_HIGH_Z TZB Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT2 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT2 Event: EPWM_TZ_ACTION_HIGH_Z TZB_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZB_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z One-Shot Source: CBC Source: CBC Latch Clear Signal: EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO TZ Interrupt Source (ORed): Register Interrupt Handler: false EPWMA EPWMB IN EPWMB TZINT Digital Compare force epwm1_DC:n->epwm1_TZ:s epwm1_CC:e->epwm1_AQ:w epwm1_CC:e->epwm1_AQ:w epwm1_DB  EPWM Deadband EPWMA IN Active High: undefined Active Low: undefined Active High Complementary: undefined Active Low Complementary: undefined Dual Edge Delay Mode: undefined Rising Edge Delay Input: EPWM_DB_INPUT_EPWMA Falling Edge Delay Input: EPWM_DB_INPUT_EPWMA Rising Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Falling Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Enable Rising Edge Delay: false RED Shadow Load Event: EPWM_RED_LOAD_ON_CNTR_ZERO Enable RED Shadow Mode: false Rising Edge Delay Value: 0 Enable Falling Edge Delay: false FED Shadow Load Event: EPWM_FED_LOAD_ON_CNTR_ZERO Enable FED Shadow Mode: false Falling Edge Delay Value: 0 Swap Output for EPWMxA: false Swap Output for EPWMxB: false Enable Deadband Control Global Load: false Deadband Control Shadow Load Event: EPWM_DB_LOAD_ON_CNTR_ZERO Enable Deadband Control Shadow Mode: false Enable RED Global Load: false Enable FED Global Load: false Dead Band Counter Clock Rate: EPWM_DB_COUNTER_CLOCK_FULL_CYCLE EPWMA EPWMB IN EPWMB epwm1_AQ:e->epwm1_DB:w epwm1_AQ:e->epwm1_DB:w epwm1_PC  EPWM Chopper EPWMA IN Use Chopper: false Chopper Duty Cycle: 0 Chopper Frequency: 0 Chopper First Pulse Width: 0 EPWMA EPWMB IN EPWMB epwm1_DB:e->epwm1_PC:w epwm1_DB:e->epwm1_PC:w epwm1_PC:e->epwm1_TZ:w epwm1_PC:e->epwm1_TZ:w GPIO0 GPIO0 epwm1_TZ:e->GPIO0 GPIO1 GPIO1 epwm1_TZ:e->GPIO1 epwm1_ET  EPWM Event Trigger Timebase Signals Enable EPWM Interrupt: false Register Interrupt Handler: false Interrupt Event Sources: EPWM_INT_TBCTR_DISABLED Interrupt Event Count: 0 Interrupt Event Count Initial Value Load Enable: false Interrupt Event Count Initial Value: 0 Force Interrupt Event Count Initial Value: false SOCA Trigger Enable: false SOCA Trigger Source: EPWM_SOC_DCxEVT1 SOCA Trigger Event Count: 0 SOCA Trigger Event Count Initial Value Load Enable: false SOCA Trigger Event Count Initial Value: 0 Force SOCA Trigger Event Count Initial Value: false SOCB Trigger Enable: false SOCB Trigger Source: EPWM_SOC_DCxEVT1 SOCB Trigger Event Count: 0 SOCB Trigger Event Count Initial Value Load Enable: false SOCB Trigger Event Count Initial Value: 0 Force SOCB Trigger Event Count Initial Value: false INT Counter Compare Signals SOCA Digital Compare Signals SOCB epwm2_TB  Time Base SYNCIN Emulation Mode: EPWM_EMULATION_STOP_AFTER_NEXT_TB Time Base Clock Divider: EPWM_CLOCK_DIVIDER_4 High Speed Clock Divider: EPWM_HSCLOCK_DIVIDER_10 Time Base Period Load Mode: EPWM_PERIOD_SHADOW_LOAD Time Base Period Load Event: EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO Time Base Period: 31250 Time Base Period Link: EPWM_LINK_WITH_DISABLE Enable Time Base Period Global Load: false Initial Counter Value: 0 Counter Mode: EPWM_COUNTER_MODE_UP_DOWN Counter Mode After Sync: EPWM_COUNT_MODE_UP_AFTER_SYNC Enable Phase Shift Load: true Phase Shift Value: 0 Force a Sync Pulse: false Sync In Pulse Source: EPWM_SYNC_IN_PULSE_SRC_INPUTXBAR_OUT6 Sync Out Pulse: One-Shot Sync Out Trigger: EPWM_OSHT_SYNC_OUT_TRIG_SYNC EPWMxSYNCPER Source Select: HRPWM_PWMSYNC_SOURCE_PERIOD CTR==PRD SYNCOUT CTR==ZRO Digital Compare sync CTR_DIR SYNCOUT_EPWM1->epwm2_TB:epwm2_syncin epwm2_CC  EPWM Counter Compare Counter Compare A (CMPA): 15625 Enable Counter Compare A (CMPA) Global Load: false Enable Shadow Counter Compare A (CMPA): true Counter Compare A Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare A (CMPA) Link: EPWM_LINK_WITH_DISABLE Counter Compare B (CMPB): 15625 Enable Counter Compare B (CMPB) Global Load: false Enable Shadow Counter Compare B (CMPB): true Counter Compare B Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare B (CMPB) Link: EPWM_LINK_WITH_DISABLE Counter Compare C (CMPC): 0 Enable Counter Compare C (CMPC) Global Load: false Enable Shadow Counter Compare C (CMPC): true Counter Compare C Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare C (CMPC) Link: EPWM_LINK_WITH_DISABLE Counter Compare D (CMPD): 0 Enable Counter Compare D (CMPD) Global Load: false Enable Shadow Counter Compare D (CMPD): true Counter Compare D Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare D (CMPD) Link: EPWM_LINK_WITH_DISABLE CTR == CMPA CTR == CMPB CTR == CMPC CTR == CMPD epwm2_TB:s->epwm2_CC:n TBCTR epwm2_AQ  EPWM Action Qualifier PRD Enable Continuous SW Force Global Load: false Continuous SW Force Shadow Mode: EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO T1 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 T2 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 ePWMxA Global Load Enable: false ePWMxA Shadow Mode Enable: false ePWMxA Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxA One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxA  Time base counter equals zero: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter equals period: EPWM_AQ_OUTPUT_LOW ePWMxA  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_HIGH ePWMxA  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Global Load Enable: false ePWMxB Shadow Mode Enable: false ePWMxB Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxB One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxB  Time base counter equals zero: EPWM_AQ_OUTPUT_LOW ePWMxB  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_HIGH ePWMxB  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE EPWMA ZERO EPWMB DIR T1 T2 CMPA CMPB epwm2_TB:e->epwm2_AQ:w epwm2_TB:e->epwm2_AQ:w epwm2_TB:e->epwm2_AQ:w SYNCOUT_EPWM2 SYNCOUT_EPWM2 epwm2_TB:epwm2_syncout->SYNCOUT_EPWM2 epwm2_DC  EPWM Digital Compare DCAH Digital Compare A High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A High): Digital Compare A Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A Low): Condition For Digital Compare output 1 A: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 A: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCAEVT1): false Generate SYNCOUT (DCAEVT1): false Synch Mode (DCAEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCAEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare B High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B High): Digital Compare B Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B Low): Condition For Digital Compare output 1 B: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 B: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCBEVT1): false Generate SYNCOUT (DCBEVT1): false Synch Mode (DCBEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCBEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare Filter Input (DCEVTFILT event source): EPWM_DC_WINDOW_SOURCE_DCAEVT1 Use Blanking Window: false Blanking Window Start Event: EPWM_DC_WINDOW_START_TBCTR_PERIOD Blanking Window Offset from the Start Event: 0 Blanking Window Length: 0 Invert Blanking Window: false Use DC Counter Capture: false Enable DC Counter Capture Shadow Mode: false DC Counter Capture Re-Enable Event\Shadow Load Event (Blanking Window Start Event): EPWM_DC_WINDOW_START_TBCTR_PERIOD DC Counter Capture Independent Pulse Selection: false Use Edge Filter: false Edge Filter Mode: EPWM_DC_EDGEFILT_MODE_RISING Edge Filter Edge Count: EPWM_DC_EDGEFILT_EDGECNT_0 Enable Edge Filter Reset/Enable Valley Capture: false Edge Filter Counter Reset/Valley Capture Signal Source: EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE Start Valley Capture Logic: false Start Valley Capture: 0 Stop Valley Capture: 0 Select the delayed output (by HWDELVAL) of the Edge Filter: false SWVDELVAL (software valley delay value): 0 Valley Delay Divider: EPWM_VALLEY_DELAY_MODE_SW_DELAY DCAEVT1.force DCAL DCAEVT2.force DCAEVT1.sync DCAEVT2.sync DCAEVT1.inter DCAEVT1.soc DCBH DCBEVT1.force DCBL DCBEVT2.force DCBEVT1.sync DCBEVT2.sync DCBEVT1.inter DCBEVT1.soc epwm2_TZ  EPWM Trip-Zone EPWMA IN Use Advanced EPWM Trip Zone Actions: false TZA Event: EPWM_TZ_ACTION_HIGH_Z TZB Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT2 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT2 Event: EPWM_TZ_ACTION_HIGH_Z TZB_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZB_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z One-Shot Source: CBC Source: CBC Latch Clear Signal: EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO TZ Interrupt Source (ORed): Register Interrupt Handler: false EPWMA EPWMB IN EPWMB TZINT Digital Compare force epwm2_DC:n->epwm2_TZ:s epwm2_CC:e->epwm2_AQ:w epwm2_CC:e->epwm2_AQ:w epwm2_DB  EPWM Deadband EPWMA IN Active High: undefined Active Low: undefined Active High Complementary: undefined Active Low Complementary: undefined Dual Edge Delay Mode: undefined Rising Edge Delay Input: EPWM_DB_INPUT_EPWMA Falling Edge Delay Input: EPWM_DB_INPUT_EPWMA Rising Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Falling Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Enable Rising Edge Delay: false RED Shadow Load Event: EPWM_RED_LOAD_ON_CNTR_ZERO Enable RED Shadow Mode: false Rising Edge Delay Value: 0 Enable Falling Edge Delay: false FED Shadow Load Event: EPWM_FED_LOAD_ON_CNTR_ZERO Enable FED Shadow Mode: false Falling Edge Delay Value: 0 Swap Output for EPWMxA: false Swap Output for EPWMxB: false Enable Deadband Control Global Load: false Deadband Control Shadow Load Event: EPWM_DB_LOAD_ON_CNTR_ZERO Enable Deadband Control Shadow Mode: false Enable RED Global Load: false Enable FED Global Load: false Dead Band Counter Clock Rate: EPWM_DB_COUNTER_CLOCK_FULL_CYCLE EPWMA EPWMB IN EPWMB epwm2_AQ:e->epwm2_DB:w epwm2_AQ:e->epwm2_DB:w epwm2_PC  EPWM Chopper EPWMA IN Use Chopper: false Chopper Duty Cycle: 0 Chopper Frequency: 0 Chopper First Pulse Width: 0 EPWMA EPWMB IN EPWMB epwm2_DB:e->epwm2_PC:w epwm2_DB:e->epwm2_PC:w epwm2_PC:e->epwm2_TZ:w epwm2_PC:e->epwm2_TZ:w GPIO2 GPIO2 epwm2_TZ:e->GPIO2 GPIO3 GPIO3 epwm2_TZ:e->GPIO3 epwm2_ET  EPWM Event Trigger Timebase Signals Enable EPWM Interrupt: false Register Interrupt Handler: false Interrupt Event Sources: EPWM_INT_TBCTR_DISABLED Interrupt Event Count: 0 Interrupt Event Count Initial Value Load Enable: false Interrupt Event Count Initial Value: 0 Force Interrupt Event Count Initial Value: false SOCA Trigger Enable: false SOCA Trigger Source: EPWM_SOC_DCxEVT1 SOCA Trigger Event Count: 0 SOCA Trigger Event Count Initial Value Load Enable: false SOCA Trigger Event Count Initial Value: 0 Force SOCA Trigger Event Count Initial Value: false SOCB Trigger Enable: false SOCB Trigger Source: EPWM_SOC_DCxEVT1 SOCB Trigger Event Count: 0 SOCB Trigger Event Count Initial Value Load Enable: false SOCB Trigger Event Count Initial Value: 0 Force SOCB Trigger Event Count Initial Value: false INT Counter Compare Signals SOCA Digital Compare Signals SOCB epwm3_TB  Time Base SYNCIN Emulation Mode: EPWM_EMULATION_STOP_AFTER_NEXT_TB Time Base Clock Divider: EPWM_CLOCK_DIVIDER_4 High Speed Clock Divider: EPWM_HSCLOCK_DIVIDER_10 Time Base Period Load Mode: EPWM_PERIOD_SHADOW_LOAD Time Base Period Load Event: EPWM_SHADOW_LOAD_MODE_COUNTER_ZERO Time Base Period: 31250 Time Base Period Link: EPWM_LINK_WITH_DISABLE Enable Time Base Period Global Load: false Initial Counter Value: 0 Counter Mode: EPWM_COUNTER_MODE_UP_DOWN Counter Mode After Sync: EPWM_COUNT_MODE_UP_AFTER_SYNC Enable Phase Shift Load: true Phase Shift Value: 0 Force a Sync Pulse: false Sync In Pulse Source: EPWM_SYNC_IN_PULSE_SRC_DISABLE Sync Out Pulse: One-Shot Sync Out Trigger: EPWM_OSHT_SYNC_OUT_TRIG_SYNC EPWMxSYNCPER Source Select: HRPWM_PWMSYNC_SOURCE_PERIOD CTR==PRD SYNCOUT CTR==ZRO Digital Compare sync CTR_DIR SYNCOUT_EPWM2->epwm3_TB:epwm3_syncin epwm3_CC  EPWM Counter Compare Counter Compare A (CMPA): 15625 Enable Counter Compare A (CMPA) Global Load: false Enable Shadow Counter Compare A (CMPA): true Counter Compare A Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare A (CMPA) Link: EPWM_LINK_WITH_DISABLE Counter Compare B (CMPB): 15625 Enable Counter Compare B (CMPB) Global Load: false Enable Shadow Counter Compare B (CMPB): true Counter Compare B Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare B (CMPB) Link: EPWM_LINK_WITH_DISABLE Counter Compare C (CMPC): 0 Enable Counter Compare C (CMPC) Global Load: false Enable Shadow Counter Compare C (CMPC): true Counter Compare C Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare C (CMPC) Link: EPWM_LINK_WITH_DISABLE Counter Compare D (CMPD): 0 Enable Counter Compare D (CMPD) Global Load: false Enable Shadow Counter Compare D (CMPD): true Counter Compare D Shadow Load Event: EPWM_COMP_LOAD_ON_CNTR_ZERO Counter Compare D (CMPD) Link: EPWM_LINK_WITH_DISABLE CTR == CMPA CTR == CMPB CTR == CMPC CTR == CMPD epwm3_TB:s->epwm3_CC:n TBCTR epwm3_AQ  EPWM Action Qualifier PRD Enable Continuous SW Force Global Load: false Continuous SW Force Shadow Mode: EPWM_AQ_SW_SH_LOAD_ON_CNTR_ZERO T1 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 T2 Trigger Source: EPWM_AQ_TRIGGER_EVENT_TRIG_DCA_1 ePWMxA Global Load Enable: false ePWMxA Shadow Mode Enable: false ePWMxA Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxA One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxA  Time base counter equals zero: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter equals period: EPWM_AQ_OUTPUT_LOW ePWMxA  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_HIGH ePWMxA  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxA  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Global Load Enable: false ePWMxB Shadow Mode Enable: false ePWMxB Shadow Load Event: EPWM_AQ_LOAD_ON_CNTR_ZERO ePWMxB One-Time SW Force Action: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB Continuous SW Force Action: EPWM_AQ_SW_DISABLED ePWMxB  Time base counter equals zero: EPWM_AQ_OUTPUT_LOW ePWMxB  Time base counter equals period: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPA: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter up equals COMPB: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  Time base counter down equals COMPB: EPWM_AQ_OUTPUT_HIGH ePWMxB  T1 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T1 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count up: EPWM_AQ_OUTPUT_NO_CHANGE ePWMxB  T2 event on count down: EPWM_AQ_OUTPUT_NO_CHANGE EPWMA ZERO EPWMB DIR T1 T2 CMPA CMPB epwm3_TB:e->epwm3_AQ:w epwm3_TB:e->epwm3_AQ:w epwm3_TB:e->epwm3_AQ:w SYNCOUT_EPWM3 SYNCOUT_EPWM3 epwm3_TB:epwm3_syncout->SYNCOUT_EPWM3 epwm3_DC  EPWM Digital Compare DCAH Digital Compare A High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A High): Digital Compare A Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare A Low): Condition For Digital Compare output 1 A: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 A: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCAEVT1): false Generate SYNCOUT (DCAEVT1): false Synch Mode (DCAEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCAEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCAEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCAEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCAEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare B High: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B High): Digital Compare B Low: EPWM_DC_TRIP_TRIPIN1 Combination Input Sources (Digital Compare B Low): Condition For Digital Compare output 1 B: EPWM_TZ_EVENT_DC_DISABLED Condition For Digital Compare output 2 B: EPWM_TZ_EVENT_DC_DISABLED Generate ADC SOC (DCBEVT1): false Generate SYNCOUT (DCBEVT1): false Synch Mode (DCBEVT1): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT1): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT1): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT1): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Synch Mode (DCBEVT2): EPWM_DC_EVENT_INPUT_SYNCED Signal Source (DCBEVT2): EPWM_DC_EVENT_SOURCE_ORIG_SIGNAL CBC Latch Mode (DCBEVT2): EPWM_DC_CBC_LATCH_DISABLED CBC Latch Clear Event (DCBEVT2): EPWM_DC_CBC_LATCH_CLR_CNTR_ZERO Digital Compare Filter Input (DCEVTFILT event source): EPWM_DC_WINDOW_SOURCE_DCAEVT1 Use Blanking Window: false Blanking Window Start Event: EPWM_DC_WINDOW_START_TBCTR_PERIOD Blanking Window Offset from the Start Event: 0 Blanking Window Length: 0 Invert Blanking Window: false Use DC Counter Capture: false Enable DC Counter Capture Shadow Mode: false DC Counter Capture Re-Enable Event\Shadow Load Event (Blanking Window Start Event): EPWM_DC_WINDOW_START_TBCTR_PERIOD DC Counter Capture Independent Pulse Selection: false Use Edge Filter: false Edge Filter Mode: EPWM_DC_EDGEFILT_MODE_RISING Edge Filter Edge Count: EPWM_DC_EDGEFILT_EDGECNT_0 Enable Edge Filter Reset/Enable Valley Capture: false Edge Filter Counter Reset/Valley Capture Signal Source: EPWM_VALLEY_TRIGGER_EVENT_SOFTWARE Start Valley Capture Logic: false Start Valley Capture: 0 Stop Valley Capture: 0 Select the delayed output (by HWDELVAL) of the Edge Filter: false SWVDELVAL (software valley delay value): 0 Valley Delay Divider: EPWM_VALLEY_DELAY_MODE_SW_DELAY DCAEVT1.force DCAL DCAEVT2.force DCAEVT1.sync DCAEVT2.sync DCAEVT1.inter DCAEVT1.soc DCBH DCBEVT1.force DCBL DCBEVT2.force DCBEVT1.sync DCBEVT2.sync DCBEVT1.inter DCBEVT1.soc epwm3_TZ  EPWM Trip-Zone EPWMA IN Use Advanced EPWM Trip Zone Actions: false TZA Event: EPWM_TZ_ACTION_HIGH_Z TZB Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCAEVT2 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT1 Event: EPWM_TZ_ACTION_HIGH_Z DCBEVT2 Event: EPWM_TZ_ACTION_HIGH_Z TZB_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZB_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z TZA_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCAEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT1_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_U Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z DCBEVT2_D Event (Adv): EPWM_TZ_ADV_ACTION_HIGH_Z One-Shot Source: CBC Source: CBC Latch Clear Signal: EPWM_TZ_CBC_PULSE_CLR_CNTR_ZERO TZ Interrupt Source (ORed): Register Interrupt Handler: false EPWMA EPWMB IN EPWMB TZINT Digital Compare force epwm3_DC:n->epwm3_TZ:s epwm3_CC:e->epwm3_AQ:w epwm3_CC:e->epwm3_AQ:w epwm3_DB  EPWM Deadband EPWMA IN Active High: undefined Active Low: undefined Active High Complementary: undefined Active Low Complementary: undefined Dual Edge Delay Mode: undefined Rising Edge Delay Input: EPWM_DB_INPUT_EPWMA Falling Edge Delay Input: EPWM_DB_INPUT_EPWMA Rising Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Falling Edge Delay Polarity: EPWM_DB_POLARITY_ACTIVE_HIGH Enable Rising Edge Delay: false RED Shadow Load Event: EPWM_RED_LOAD_ON_CNTR_ZERO Enable RED Shadow Mode: false Rising Edge Delay Value: 0 Enable Falling Edge Delay: false FED Shadow Load Event: EPWM_FED_LOAD_ON_CNTR_ZERO Enable FED Shadow Mode: false Falling Edge Delay Value: 0 Swap Output for EPWMxA: false Swap Output for EPWMxB: false Enable Deadband Control Global Load: false Deadband Control Shadow Load Event: EPWM_DB_LOAD_ON_CNTR_ZERO Enable Deadband Control Shadow Mode: false Enable RED Global Load: false Enable FED Global Load: false Dead Band Counter Clock Rate: EPWM_DB_COUNTER_CLOCK_FULL_CYCLE EPWMA EPWMB IN EPWMB epwm3_AQ:e->epwm3_DB:w epwm3_AQ:e->epwm3_DB:w epwm3_PC  EPWM Chopper EPWMA IN Use Chopper: false Chopper Duty Cycle: 0 Chopper Frequency: 0 Chopper First Pulse Width: 0 EPWMA EPWMB IN EPWMB epwm3_DB:e->epwm3_PC:w epwm3_DB:e->epwm3_PC:w epwm3_PC:e->epwm3_TZ:w epwm3_PC:e->epwm3_TZ:w GPIO4 GPIO4 epwm3_TZ:e->GPIO4 GPIO5 GPIO5 epwm3_TZ:e->GPIO5 epwm3_ET  EPWM Event Trigger Timebase Signals Enable EPWM Interrupt: false Register Interrupt Handler: false Interrupt Event Sources: EPWM_INT_TBCTR_DISABLED Interrupt Event Count: 0 Interrupt Event Count Initial Value Load Enable: false Interrupt Event Count Initial Value: 0 Force Interrupt Event Count Initial Value: false SOCA Trigger Enable: false SOCA Trigger Source: EPWM_SOC_DCxEVT1 SOCA Trigger Event Count: 0 SOCA Trigger Event Count Initial Value Load Enable: false SOCA Trigger Event Count Initial Value: 0 Force SOCA Trigger Event Count Initial Value: false SOCB Trigger Enable: false SOCB Trigger Source: EPWM_SOC_DCxEVT1 SOCB Trigger Event Count: 0 SOCB Trigger Event Count Initial Value Load Enable: false SOCB Trigger Event Count Initial Value: 0 Force SOCB Trigger Event Count Initial Value: false INT Counter Compare Signals SOCA Digital Compare Signals SOCB SYNCOUT_EPWM5 SYNCOUT_EPWM5 SYNCOUT_EPWM5->epwm6_TB:epwm6_syncin