/**
 *****************************************************************************************
 * @file F28335Port.h
 * @brief  Header file for DSP GPIO
 * @author ASa, PP (original)
 * @n	   Eric J. Zimmerman (modification)
 * @ingroup Controls
 * @copyright 2020 Eaton Corporation. All Rights Reserved.
 *
 *****************************************************************************************
 */
#ifndef _F28335Port_H
   #define _F28335Port_H

#include "Constants.h"
#include "DSP28x_Project.h"

#ifdef __cplusplus
extern "C" {
#endif

/**
 * @brief GPIO structure
 */
typedef struct
{
	uint16_t LoWord;
	uint16_t HiWord;
} GPIO_WORD;

/**
 * @brief Output port A shadow registers
 */
typedef struct
{
	uint16_t reservedA0           : 1;			// ePWM1A
	uint16_t reservedA1           : 1;			// ePWM1B
	uint16_t reservedA2           : 1;			// ePWM2A
	uint16_t reservedA3           : 1;			// ePWM2B

	uint16_t reservedA4           : 1;			// ePWM3A
	uint16_t reservedA5           : 1;			// ePWM3B
	uint16_t reservedA6           : 1;			// ePWM4A
	uint16_t reservedA7           : 1;			// ePWM4B

	uint16_t reservedA8           : 1;			// ePWM5A
	uint16_t reservedA9           : 1;			// ePWM5B
	uint16_t reservedA10          : 1;			// ePWM6A
	uint16_t reservedA11          : 1;			// ePWM6B

	uint16_t reservedA12          : 1;			// TZ1
	uint16_t reservedA13          : 1;			// TZ2
	uint16_t reservedA14          : 1;			// TZ3
	uint16_t reservedA15          : 1;			// TZ4

	uint16_t reservedA16          : 1;			// TZ5
	uint16_t reservedA17          : 1;			// TZ6
	uint16_t Rec_Disconnect       : 1;			// GPO18
	uint16_t Inv_Disconnect_A     : 1;			// GPO19

	uint16_t reservedA20          : 1;			// CanBTx
	uint16_t reservedA21          : 1;			// CanARx
	uint16_t spareGPIO22          : 1;			// GPO22
	uint16_t spareGPIO23          : 1;			// GPO23

	uint16_t IO_Good_Set          : 1;			// GPO24
	uint16_t Spare_CPLD1          : 1;			// GPO25
	uint16_t MUX_AD0              : 1;			// GPO26
	uint16_t DebugOut             : 1;			// GPO27

	uint16_t reservedA28          : 1;			// SciARx
	uint16_t Feel_Good_LED        : 1;			// GPO29
	uint16_t reservedA30          : 1;			// CanARx
	uint16_t reservedA31          : 1;			// CanATx
} st_OutRegA;

/**
 * @brief GPIOA outputs Bit Defines
 */
#define REC_DISCONNECT_BIT              BIT_18
#define INV_DISCONNECT_BIT              BIT_19
#define IOGOODSET_BIT                   BIT_24
#define SPARE_CPLD1_BIT                 BIT_25
#define MUX_AD0_BIT                     BIT_26
#define DEBUGOUTPUT_BIT                 BIT_27
#define FEELGOODLED_BIT                 BIT_29

/**
 * @brief Mask for configuring GPIOA outputs
 */
#define OUTREGA_OUTPUT_MASK ( REC_DISCONNECT_BIT |    \
							  INV_DISCONNECT_BIT |    \
							  IOGOODSET_BIT |         \
							  SPARE_CPLD1_BIT |       \
							  MUX_AD0_BIT |           \
							  DEBUGOUTPUT_BIT |       \
							  FEELGOODLED_BIT         \
							  )

/**
 * @brief Defines for DSP Output Register B
 */
typedef struct
{
	uint16_t reservedB32         : 1;			// SPICS2
	uint16_t reservedB33         : 1;			// SPICS3
	uint16_t Spare_PWM3          : 1;			// GPIO34
	uint16_t reservedB35         : 1;			// SciATx

	uint16_t spareGPIO36         : 1;			// GPO36
	uint16_t Spare_PWM4          : 1;			// GPO37/eCap2
	uint16_t Iref_Inv            : 1;			// GPO38
	uint16_t reservedB39         : 1;			// GPO39

	uint16_t DSP_WD              : 1;			// GPO40
	uint16_t AD_Mux_1_2          : 2;			// GPO41,GPIO42
	uint16_t reservedB43         : 1;			// GP043

	uint16_t InvGate_Enable_C    : 1;			// GPO44
	uint16_t Tap_Change_Relay    : 1;			// GPO45
	uint16_t reservedB46         : 1;			// PLD TDI
	uint16_t reservedB47         : 1;			// PLD TMS

	uint16_t Spare_PWM1          : 1;			// ecap5/spare pwm
	uint16_t Spare_PWM2          : 1;			// ecap
	uint16_t Rec_Gate_Enable     : 1;			// GPO50
	uint16_t reservedB51         : 1;			// GPO51

	uint16_t Inv_Gate_Enable_A   : 1;			// GPO52
	uint16_t DC_Charge           : 1;			// GPO53
	uint16_t reservedB54         : 1;			// SPIA SIMO
	uint16_t reservedB55         : 1;			// SPIA SOMI

	uint16_t reservedB56         : 1;			// SPIA CLK
	uint16_t EepromSpiCSNot      : 1;			// EEPROM chip select not
	uint16_t spareGPIO58         : 1;			// GPIO58
	uint16_t spareGPIO59         : 1;			// GPO59

	uint16_t Fan_Control         : 1;			// GPO60
	uint16_t spareGPIO61         : 1;			// GPO61
	uint16_t spareGPIO62         : 1;			// GPO62
	uint16_t reservedB63         : 1;			// GPI63
} st_OutRegB;

/**
 * @brief GPIOB outputs Bit Defines
 */
#define SPARE_PWM3_BIT        BIT_3
#define SPARE_PWM4_BIT        BIT_5
#define IREF_INV_BIT          BIT_6
#define DSPWATCHDOG_BIT       BIT_8
#define ADMUX12_BIT           ( BIT_9 | BIT_10 )
#define InvGate_Enable_C_BIT  BIT_12
#define TAP_CHANGE_RELAY      BIT_13
#define SPARE_PWM1_BIT        BIT_16
#define SPARE_PWM2_BIT        BIT_17
#define REC_GATE_ENABLE_BIT   BIT_18
#define INV_GATE_ENABLE_A     BIT_20
#define DC_CHARGE_BIT         BIT_22
#define EEPROMSPICSNOT_BIT    BIT_25
#define FAN_CONTROL_BIT       BIT_28


/**
 * @brief Mask for configuring GPIOB outputs
 */
#define OUTREGB_OUTPUT_MASK ( SPARE_PWM4_BIT |       \
							  DSPWATCHDOG_BIT |      \
							  ADMUX12_BIT |          \
							  EEPROMSPICSNOT_BIT |   \
							  IREF_INV_BIT |         \
							  REC_GATE_ENABLE_BIT |  \
							  INV_GATE_ENABLE_A |    \
							  InvGate_Enable_C_BIT | \
							  TAP_CHANGE_RELAY |     \
							  FAN_CONTROL_BIT |      \
							  SPARE_PWM1_BIT |       \
							  SPARE_PWM2_BIT |       \
							  SPARE_PWM3_BIT |       \
							  DC_CHARGE_BIT         \
							  )

/**
 * @brief Defines for DSP Output Register C
 */
typedef struct
{
	uint16_t V12_ON_OFF          : 1;			// GPO64
	uint16_t PRECHGR_ON_OFF      : 1;			// GPO65
	uint16_t Rec_P2P3_Enable     : 1;			// GPO66
	uint16_t xxx_P2P3_Enable     : 1;			// GPO67

	uint16_t Iref_Rec            : 1;			// GPO68
	uint16_t Gate_Enable         : 1;			// GPO69
	uint16_t reservedC70         : 1;			// GPI70
	uint16_t Online_Offline      : 1;			// GPO71

	uint16_t Spare_DSP_IO1       : 1;			// GPO72
	uint16_t Spare_DSP_IO2       : 1;			// GPO73
	uint16_t Spare_DSP_IO3       : 1;			// GPO74
	uint16_t spareGPIO75         : 1;			// GPO75

	uint16_t spareGPIO76         : 1;			// GPO76
	uint16_t Inv_Disconnect_C    : 1;			// GPO77
	uint16_t Spare_CPLD4         : 1;			// GPO78
	uint16_t reservedC79         : 1;			// GPO79

	uint16_t reservedC80         : 1;			// PLD TDO
	uint16_t reservedC81         : 1;			// PLDTCK
	uint16_t reservedC82         : 1;			// GPO82
	uint16_t Spare_CPLD3         : 1;			// GPO83

	uint16_t Pre_Charge          : 1;			// GPO84
	uint16_t reservedC85         : 1;			// GPO85
	uint16_t Bypass_B            : 1;			// GPO86
	uint16_t Bypass_C            : 1;			// GPO87

	uint16_t rsvd1               : 8;			// 88-95  reserved
} st_OutRegC;

/**
 * @brief GPIOC Output bit define
 */
#define V12_ON_OFF_BIT              BIT_0
#define PRECHGR_ON_OFF_BIT          BIT_1
#define SPARE_CPLD2_BIT             BIT_3
#define IREF_REC_BIT                BIT_4
#define GATE_ENABLE_BIT             BIT_5
#define ONLINE_OFFLINE              BIT_7
#define SPARE_DSP_IO1_BIT           BIT_8
#define SPARE_DSP_IO2_BIT           BIT_9
#define SPARE_DSP_IO3_BIT           BIT_10
#define SPARE_GPIO75_BIT            BIT_11
#define SPARE_GPIO76_BIT			BIT_12
#define INV_DISCONNECT_C_BIT		BIT_13
#define SPARE_CPLD4_BIT    		    BIT_14
#define SPARE_CPLD3_BIT				BIT_19
#define PRE_CHARGE_BIT              BIT_20
#define BYPASS_B                    BIT_22
#define BYPASS_C                    BIT_23


/**
 * @brief GPIOC outputs Mask
 */
#define OUTREGC_OUTPUT_MASK ( SPARE_CPLD2_BIT |       \
							  IREF_REC_BIT |          \
							  GATE_ENABLE_BIT |       \
							  ONLINE_OFFLINE |        \
							  SPARE_DSP_IO1_BIT |     \
							  SPARE_DSP_IO2_BIT |     \
							  SPARE_DSP_IO3_BIT |     \
							  SPARE_GPIO75_BIT |      \
							  SPARE_GPIO76_BIT |	  \
							  INV_DISCONNECT_C_BIT |  \
							  SPARE_CPLD4_BIT |       \
							  SPARE_CPLD3_BIT |       \
							  PRE_CHARGE_BIT |      \
							  V12_ON_OFF_BIT |      \
							  PRECHGR_ON_OFF_BIT |  \
							  BYPASS_B |              \
							  BYPASS_C                \
							  )

/**
 * @brief Structure define for DSP Output register
 */
typedef struct
{
	union
	{
		st_OutRegA bit;
		GPIO_WORD word;
		uint32_t all;
	} GpoA;
	union
	{
		st_OutRegB bit;
		GPIO_WORD word;
		uint32_t all;
	} GpoB;
	union
	{
		st_OutRegC bit;
		GPIO_WORD word;
		uint32_t all;
	} GpoC;
} stDSPOutRegister;

/*
 *****************************************************************************************
 *		DSP Input Register defines
 *****************************************************************************************
 */

/**
 * @brief  Input port A shadow registers
 */
typedef struct
{
	uint16_t reservedA0          : 1;			// ePWM1A
	uint16_t reservedA1          : 1;			// ePWM1B
	uint16_t reservedA2          : 1;			// ePWM2A
	uint16_t reservedA3          : 1;			// ePWM2B

	uint16_t reservedA4          : 1;			// ePWM3A
	uint16_t reservedA5          : 1;			// ePWM3B
	uint16_t reservedA6          : 1;			// ePWM4A
	uint16_t reservedA7          : 1;			// ePWM4B

	uint16_t reservedA8          : 1;			// ePWM5A
	uint16_t reservedA9          : 1;			// ePWM5B
	uint16_t reservedA10         : 1;			// ePWM6A
	uint16_t reservedA11         : 1;			// ePWM6B

	uint16_t Raise_A             : 1;			// GPIO12
	uint16_t Lower_A             : 1;			// GPIO13
	uint16_t Raise_B             : 1;			// GPIO14
	uint16_t Lower_B             : 1;			// GPIO15

	uint16_t Raise_C             : 1;			// GPIO16
	uint16_t Lower_C             : 1;			// GPIO17
	uint16_t reservedA18         : 1;			// GPIO18
	uint16_t reservedA19         : 1;			// GPIO19

	uint16_t reservedA20         : 1;			// CanBTx
	uint16_t reservedA21         : 1;			// CanARx
	uint16_t reservedA22         : 1;			// GPIO22
	uint16_t reservedA23         : 1;			// SciBRx

	uint16_t reservedA24         : 1;			// GPO24
	uint16_t reservedA25         : 1;			// GPO25
	uint16_t reservedA26         : 1;			// GPO26
	uint16_t reservedA27         : 1;			// GPO27

	uint16_t reservedA28         : 1;			// SciARx
	uint16_t reservedA29         : 1;			// GPO29
	uint16_t reservedA30         : 1;			// CanARx
	uint16_t reservedA31         : 1;			// CanATx
} st_InRegA;

/**
 * @brief  GPIOA inputs Bit define
 */

#define RAISE_A_BIT               BIT_11
#define LOWER_A_BIT               BIT_12
#define RAISE_B_BIT               BIT_13
#define LOWER_B_BIT               BIT_14
#define RAISE_C_BIT               BIT_15
#define LOWER_C_BIT               BIT_16


/**
 * @brief  GPIOA inputs
 */
#define INREGA_INPUT_MASK    ( RAISE_A_BIT |           \
							   LOWER_A_BIT |           \
							   RAISE_B_BIT |           \
							   LOWER_B_BIT |           \
							   RAISE_C_BIT |           \
							   LOWER_C_BIT             \
							   )

/**
 * @brief  Input port B shadow registers
 */
typedef struct
{
	uint16_t I2CSDA              : 1;			// SDAA
	uint16_t I2CSCL              : 1;			// SCLA
	uint16_t reservedB34         : 1;			// Ecap1
	uint16_t reservedB35         : 1;			// SciATx

	uint16_t InvBRK_A_FB         : 1;			// GPO36
	uint16_t reservedB37         : 1;			// GPO37
	uint16_t reservedB38         : 1;			// GPO38
	uint16_t DSP_In              : 1;			// GPO39

	uint16_t reservedB40         : 1;			// GPO40
	uint16_t reservedB41         : 1;			// GPO41
	uint16_t reservedB42         : 1;			// GPO42
	uint16_t InvBRK_C_FB         : 1;			// GPI43

	uint16_t reservedB44         : 1;			// GPO44
	uint16_t reservedB45         : 1;			// GPO45
	uint16_t reservedB46         : 1;			// GPO46
	uint16_t reservedB47         : 1;			// GPO47

	uint16_t reservedB48         : 1;			// GPO48
	uint16_t reservedB49         : 1;			// GPO49
	uint16_t reservedB50         : 1;			// GPO50
	uint16_t Precharge_FB        : 1;			// GPO51

	uint16_t reservedB52         : 1;			// GPO52
	uint16_t reservedB53         : 1;			// GPO53
	uint16_t reservedB54         : 1;			// SPIA SIMO
	uint16_t reservedB55         : 1;			// SPIA SOMI

	uint16_t reservedB56         : 1;			// SPIA CLK
	uint16_t reservedB57         : 1;			// SPIA CS
	uint16_t Bridging_A          : 1;			// GPO58
	uint16_t Bridging_B          : 1;			// GPO59

	uint16_t reservedB60         : 1;			// GPO60
	uint16_t Main_Contactor_Status : 1;			// GPO61
	uint16_t Mode                : 1;			// GPO62
	uint16_t Bridging_C          : 1;			// GPI63

} st_InRegB;

/**
 * @brief  GPIOB inputs Bit define
 */
#define INVBRK_A_FB_BIT         BIT_4
#define EPLD_WATCHDOG_IN        BIT_5
#define DSP_IN                  BIT_7
#define PS5VSTATUS_BIT          BIT_11
#define PRECHARGE_FB_BIT        BIT_19
#define INVBRK_C_FB_BIT         BIT_11
#define MAIN_CONTACTOR_STATUS   BIT_29
#define BRIDGING_A_BIT          BIT_26
#define BRIDGING_B_BIT          BIT_27
#define MODE_BIT                BIT_30
#define BRIDGING_C_BIT          BIT_31

/**
 * @brief  GPIOB inputs
 */
#define INREGB_INPUT_MASK       ( PRECHARGE_FB_BIT | 		\
								  EPLD_WATCHDOG_IN |  		\
								  PS5VSTATUS_BIT |   		\
								  INVBRK_A_FB_BIT |  		\
								  INVBRK_C_FB_BIT |         \
								  MAIN_CONTACTOR_STATUS |   \
								  BRIDGING_A_BIT |          \
								  BRIDGING_B_BIT |          \
								  BRIDGING_C_BIT |          \
								  MODE_BIT |          \
								  DSP_IN                    \
								  )

/**
 * @brief  Input port C shadow registers
 */
typedef struct
{
	uint16_t reservedC64         : 1;			// GPO64
	uint16_t reservedC65         : 1;			// GPO65
	uint16_t reservedC66         : 1;			// GPO66
	uint16_t reservedC67         : 1;			// GPO67

	uint16_t reservedC68         : 1;			// GPO68
	uint16_t reservedC69         : 1;			// GPO69
	uint16_t reservedC70         : 1;			// GPI70
	uint16_t reservedC71         : 1;			// GPO71

	uint16_t reservedC72         : 1;			// GPO72
	uint16_t reservedC73         : 1;			// GPO73
	uint16_t reservedC74         : 1;			// GPO74
	uint16_t reservedC75         : 1;			// GPO75

	uint16_t reservedC76         : 1;			// GPO76
	uint16_t reservedC77         : 1;			// GPO77
	uint16_t reservedC78         : 1;			// GPI78
	uint16_t Inv_OC_C            : 1;			// GPO79

	uint16_t reservedC80         : 1;			// PLD TDO
	uint16_t reservedC81         : 1;			// PLDTCK
	uint16_t Rec_OC              : 1;			// GPO82
	uint16_t reservedC83         : 1;			// GPO83

	uint16_t reservedC84         : 1;			// GPO84
	uint16_t Inv_OC_A            : 1;			// GPO85
	uint16_t reservedC86         : 1;			// GPO86
	uint16_t reservedC87         : 1;			// GPO87

	uint16_t rsvd1               : 8;			// 88-95  reserved
} st_InRegC;


/**
 * @brief  GPIOC inputs Bit define
 */
#define REC_OC_BIT      BIT_18
#define INV_OC_A_BIT    BIT_21
#define INV_OC_C_BIT    BIT_15

/**
 * @brief GPIOC inputs
 */
#define INREGC_INPUT_MASK     ( REC_OC_BIT |  \
								INV_OC_A_BIT | \
								INV_OC_C_BIT \
								)

/**
 * @brief  DSP Input structure define
 */
typedef struct
{
	union
	{
		st_InRegA bit;
		GPIO_WORD word;
		uint32_t all;
	} GpiA;
	union
	{
		st_InRegB bit;
		GPIO_WORD word;
		uint32_t all;
	} GpiB;
	union
	{
		st_InRegC bit;
		GPIO_WORD word;
		uint32_t all;
	} GpiC;

} stDSPInRegister;

/*
 *****************************************************************************************
 *		Globals
 *****************************************************************************************
 */
extern volatile stDSPOutRegister DSPOutRegister;
extern volatile stDSPInRegister DSPInRegister;

/*
 * @brief Initialises the DSP registers and GPIO pins
 * @return None
 */
void InitDSP_IORegs( void );

/*
 * @brief Write RAM copy of GPIO output registers to actual ports
 * @return None
 * @details Executed once per ADC ISR
 */
void WriteDSPOutputs_ISR( void );

/*
 * @brief Update RAM copy of GPIO input registers
 * @return None
 */
void ReadDSPInputs( void );

/*
 * @brief Enables the gating of the IGBT's
 * @return None
 */
void InverterPWMOn( void );

/*
 * @brief Disables the gating of the IGBT's
 * @return None
 */
void InverterPWMOff( void );

/*
 * @brief Disables the PWMs that are nort being used
 * @return None
 */
void DisableUnusedPWMs( void );

/*
 * @brief Sets IO_Good_set to 1 or 0
 * @param[in] good : Value to be set
 * @return None
 */
void SetIOGood( uint16_t good );

/**
 * @brief Test Output
 */
inline void ToggleLED( void )
{
	DSPOutRegister.GpoA.bit.Feel_Good_LED = ~DSPOutRegister.GpoA.bit.Feel_Good_LED;
}

/**
 * @brief Toggles DSP Watch dog timer pin
 * @param[in] None
 * @return None
 */
inline void ToggleDSPWatchDog( void )
{
	DSPOutRegister.GpoB.bit.DSP_WD = ~DSPOutRegister.GpoB.bit.DSP_WD;
}

/**
 * @brief Sets gate enable pin low
 * @param[in] None
 * @return None
 */
inline void MasterPWMOn( void )
{
	DSPOutRegister.GpoC.bit.Gate_Enable = 0;
}

/**
 * @brief Sets gate enable pin high
 * @param[in] None
 * @return None
 */
inline void MasterPWMOff( void )
{
	DSPOutRegister.GpoC.bit.Gate_Enable = 1;
}

/**
 * @brief Checks state of Gate_Enable pin
 * @param[in] None
 * @return True if Gate_Enable is set low
 */
inline bool_t IsMasterPWMOn()
{
	return ( DSPOutRegister.GpoC.bit.Gate_Enable == 0 );
}

/*
 * @brief Sets Pre_Charge Contactor Status
 * @param[in] value : The value to be set
 * @return None
 */
inline void Set_Pre_Chg_Cont( uint16_t value )
{
	// Active High
	DSPOutRegister.GpoC.bit.Pre_Charge = ( value ) ? 1 : 0;
}

/**
 * @brief Checks state of Pre_Charge pin
 * @param[in] None
 * @return True if Pre_Charge is high
 */
inline bool_t Get_Pre_Chg_Cont( void )
{
	// Active Low
	return ( DSPOutRegister.GpoC.bit.Pre_Charge );
}

/*
 * @brief Sets Iref_Rec Status
 * @param[in] value : The value to be set
 * @return None
 */
inline void Set_Iref_Rec( uint16_t value )
{
	// Active Low
	DSPOutRegister.GpoC.bit.Iref_Rec = ( value ) ? 0 : 1;
}

/*
 * @brief Sets PRECHGR_ON_OFF Status
 * @param[in] value : The value to be set
 * @return None
 */
inline void Set_PRECHGR_ON_OFF( uint16_t value )
{
	// Active Low
	DSPOutRegister.GpoC.bit.PRECHGR_ON_OFF = ( value ) ? 0 : 1;
}

/*
 * @brief Sets V12_ON_OFF Status
 * @param[in] value : The value to be set
 * @return None
 */
inline void Set_12V_On_Off( uint16_t value )
{
	// Active Low
	DSPOutRegister.GpoC.bit.V12_ON_OFF = ( value ) ? 0 : 1;
}

/*
 * @brief Read status of PRECHGR_ON_OFF
 * @param[in] None
 * @return The status of the PRECHGR_ON_OFF pin.
 */
inline bool_t Get_PRECHGR_ON_OFF( void )
{
	// Active Low
	return ( DSPOutRegister.GpoC.bit.PRECHGR_ON_OFF );
}

/*
 * @brief Read status of V12_ON_OFF
 * @param[in] None
 * @return The status of the V12_ON_OFF pin.
 */
inline bool_t Get_12V_On_Off( void )
{
	// Active Low
	return ( DSPOutRegister.GpoC.bit.V12_ON_OFF );
}

/*
 * @brief Read status of Iref_Rec
 * @param[in] None
 * @return The status of the Iref_Rec pin.
 */
inline bool_t Get_Iref_Rec( void )
{
	// Active Low
	return ( DSPOutRegister.GpoC.bit.Iref_Rec );
}

/*
 * @brief Read status of InvBRK_C_FB
 * @param[in] None
 * @return The status of the InvBRK_C_FB pin.
 */
inline bool_t Get_InvBRK_C_FB( void )
{
	// active low
	return ( DSPInRegister.GpiB.bit.InvBRK_C_FB );
}

/*
 * @brief Read status of Rec_Disconnect
 * @param[in] None
 * @return The status of the Rec_Disconnect pin.
 */
inline void Set_Rec_Disconnect( uint16_t value )
{
	// Active High
	DSPOutRegister.GpoA.bit.Rec_Disconnect = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Inv_Disconnect_A
 * @param[in] None
 * @return The status of the Inv_Disconnect_A pin.
 */
inline void Set_Inv_Disconnect_A( uint16_t value )
{
	// Active High
	DSPOutRegister.GpoA.bit.Inv_Disconnect_A = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Spare_CPLD1
 * @param[in] None
 * @return The status of the Spare_CPLD1 pin.
 */
inline void Set_Spare_CPLD1( uint16_t value )
{
	// Active High
	DSPOutRegister.GpoA.bit.Spare_CPLD1 = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of MUX_AD0
 * @param[in] None
 * @return The status of the MUX_AD0 pin.
 */
inline void SetMUX_AD0( uint16_t value )
{
	// Active High
	DSPOutRegister.GpoA.bit.MUX_AD0 = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of DebugOut
 * @param[in] None
 * @return The status of the DebugOut pin.
 */
inline void SetDebugOut( uint16_t value )
{
	// Active High
	DSPOutRegister.GpoA.bit.DebugOut = ( value ) ? 1 : 0;
}

/*
 *****************************************************************************************
 *		PE System Pin Map : Version 9
 *****************************************************************************************
 */

/*
 * @brief Function to set the value of A1_2
 * @param[in] value : The value to be set
 * @return None
 */
inline void Write_ADMUX_1_2( uint16_t value )
{
	DSPOutRegister.GpoB.bit.AD_Mux_1_2 = value;
}

/*
 * @brief Reads Rectifier hardware current limit fault
 * @param[in] None
 * @return The status of the fault.(Rec.OC/Inv.OC.B)
 */
inline bool_t Get_Rec_OC( void )
{
	return ( DSPInRegister.GpiC.bit.Rec_OC );
}

/*
 * @brief Function to enable Rectifier gate
 * @param[in] value : Active high Gate enable
 * @return None
 */
inline void Set_Rec_Gate_Enable( uint16_t value )
{
	if(value == 1)
	{
		Set_Spare_CPLD1( 0 ); //Proxy Signal Rectifier Gate Enabled
	}
	else
	{
		Set_Spare_CPLD1( 1 );
	}

	//Active High
	DSPOutRegister.GpoB.bit.Rec_Gate_Enable = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read status of Rec Gate Enable
 * @param[in] None
 * @return The status of the Rec Gate Enable pin.
 */
inline bool_t Get_Rec_Gate_Enable( void )
{
	return ( DSPOutRegister.GpoB.bit.Rec_Gate_Enable );
}

/*
 * @brief Function to Enable Inverter gate
 * @param[in] value : Value to be set
 * @return None
 */
inline void Set_Inv_Gate_Enable_A( uint16_t value )
{
	DSPOutRegister.GpoC.bit.xxx_P2P3_Enable = ( value ) ? 0 : 1; //Proxy Signal Inverter Gate Enable //Inverted Signal
	DSPOutRegister.GpoB.bit.Inv_Gate_Enable_A = ( value ) ? 1 : 0;

}

/*
 * @brief returns the status of inverter gate enable Signal
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Inv_Gate_Enable_A( void )
{
	return ( DSPOutRegister.GpoB.bit.Inv_Gate_Enable_A );
}

/*
 * @brief returns the status of inverter hardware current limit
 * @param[in] None
 * @return The status of the inverter current fault.
 */
inline bool_t Get_Inv_OC_A( void )
{
	return ( DSPInRegister.GpiC.bit.Inv_OC_A );
}

/*
 * @brief returns the status of Inv_OC_C
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Inv_OC_C( void )
{
	return ( DSPInRegister.GpiC.bit.Inv_OC_C );
}

/*
 * @brief Function to turn on/off fan
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Fan_Control( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Fan_Control = ( value ) ? 1 : 0;
}

/*
 * @brief Function to read the status of Fan Control
 * @param[in] None
 * @return The status of fan control.
 */
inline bool_t Get_Fan_Control( void )
{
	return ( DSPOutRegister.GpoB.bit.Fan_Control );
}

/*********************PE System Pin Map :CL7 GPIO Interface ********************/


/*
 * @brief Function to set DSP State
 * @param[in] value : State of the DSP
 * @return None
 */
inline void Set_Online_Offline( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Online_Offline = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read DSP Status
 * @param[in] None
 * @return status of the DSP
 */
inline bool_t Get_Online_Offline( void )
{
	return ( DSPOutRegister.GpoC.bit.Online_Offline );
}

/*
 * @brief Read status of Raise pin
 * @param[in] None
 * @return The status of the Raise_A fault.
 */
inline bool_t Get_Raise_A( void )
{
	return ( DSPInRegister.GpiA.bit.Raise_A );
}

/*
 * @brief Set Raise_A status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Raise_A( uint16_t value )
{
	DSPInRegister.GpiA.bit.Raise_A = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Lower pin
 * @param[in] None
 * @return The status of the Lower_A fault.
 */
inline bool_t Get_Lower_A( void )
{
	return ( DSPInRegister.GpiA.bit.Lower_A );
}

/*
 * @brief Set Lower_A status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Lower_A( uint16_t value )
{
	DSPInRegister.GpiA.bit.Lower_A = ( value ) ? 1 : 0;
}

/*
 * @brief Function to read the DSP Mode
 * @param[in] None
 * @return Online/Offline
 */
inline bool_t Get_Mode( void )
{
	return ( DSPInRegister.GpiB.bit.Mode );
}

/*
 * @brief Set Mode status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Mode( uint16_t value )
{
	DSPInRegister.GpiB.bit.Mode = ( value ) ? 1 : 0;
}

/*
 * @brief Function to read the Bridging command from CL7
 * @param[in] None
 * @return bridging/non bridging
 */
inline bool_t Get_Bridging_A( void )
{
	return ( DSPInRegister.GpiB.bit.Bridging_A );
}

/*
 * @brief Set Bridging A status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Bridging_A( uint16_t value )
{
	DSPInRegister.GpiB.bit.Bridging_A = ( value ) ? 1 : 0;
}

/*
 * @brief Set Tap Change Relay status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Tap_Change_Relay( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Tap_Change_Relay = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read status of Tap Change Relay
 * @param[in] None
 * @return The status of the Tap_Change_Relay.
 */
inline bool_t Get_Tap_Change_Relay( void )
{
	return ( DSPOutRegister.GpoB.bit.Tap_Change_Relay );
}

/****************************** End of CL7 GPIO Interface ***************************************************/



/****************************** Spare PWM Pin map BEGIN ***************************************************/

/*
 * @brief Function to Read Spare_PWM1
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_PWM1( void )
{
	return ( DSPOutRegister.GpoB.bit.Spare_PWM1 );
}

/*
 * @brief Function to Set Spare_PWM1
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_PWM1( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Spare_PWM1 = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read Spare_PWM2
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_PWM2( void )
{
	return ( DSPOutRegister.GpoB.bit.Spare_PWM2 );
}

/*
 * @brief Function to Set Spare_PWM2
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_PWM2( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Spare_PWM2 = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read Spare_PWM3
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_PWM3( void )
{
	return ( DSPOutRegister.GpoB.bit.Spare_PWM3 );
}

/*
 * @brief Function to Set Spare_PWM3
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_PWM3( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Spare_PWM3 = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read Spare_PWM4
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_PWM4( void )
{
	return ( DSPOutRegister.GpoB.bit.Spare_PWM4 );
}

/*
 * @brief Function to Set Spare_PWM4
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_PWM4( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Spare_PWM4 = ( value ) ? 0 : 1;
}

/****************************** Spare PWM Pin map END ***************************************************/



/****************************** Spare Pin map BEGIN ***************************************************/

/*
 * @brief Function to Read Spare_GPIO72
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_DSP_IO1( void )
{
	return ( DSPOutRegister.GpoC.bit.Spare_DSP_IO1 );
}

/*
 * @brief Function to Set Spare_GPIO72
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_DSP_IO1( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Spare_DSP_IO1 = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read Spare_GPIO73
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_DSP_IO2( void )
{
	return ( DSPOutRegister.GpoC.bit.Spare_DSP_IO2 );
}

/*
 * @brief Function to Set Spare_GPIO73
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_DSP_IO2( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Spare_DSP_IO2 = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read Spare_GPIO74
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_DSP_IO3( void )
{
	return ( DSPOutRegister.GpoC.bit.Spare_DSP_IO3 );
}

/*
 * @brief Function to Set Spare_GPIO74
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_DSP_IO3( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Spare_DSP_IO3 = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Read Spare_GPIO75
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_GPIO75( void )
{
	return ( DSPOutRegister.GpoC.bit.spareGPIO75 );
}

/*
 * @brief Function to Set Spare_GPIO75
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_GPIO75( uint16_t value )
{
	DSPOutRegister.GpoC.bit.spareGPIO75 = ( value ) ? 1 : 0;
}


/*
 * @brief Function to Read Spare_GPIO75
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_GPIO76( void )
{
	return ( DSPOutRegister.GpoC.bit.spareGPIO76 );
}

/*
 * @brief Function to Set Spare_GPIO75
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_GPIO76( uint16_t value )
{
	DSPOutRegister.GpoC.bit.spareGPIO76 = ( value ) ? 1 : 0;
}

/****************************** Spare Pin map END ***************************************************/

/*
 * @brief Function to Read inverter current limit trigger
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Iref_Inv( void )
{
	return ( DSPOutRegister.GpoB.bit.Iref_Inv );
}

/*
 * @brief Function to Set pin inverter current limit trigger
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Iref_Inv( uint16_t value )
{
	DSPOutRegister.GpoB.bit.Iref_Inv = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Get status of DC Link precharge
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_DC_Charge( void )
{
	return ( DSPOutRegister.GpoB.bit.DC_Charge );
}

/*
 * @brief Function to turn on/off DC Link Precharge
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_DC_Charge( uint16_t value )
{
	DSPOutRegister.GpoB.bit.DC_Charge = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Get status of Precharge.FB
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Precharge_FB( void )
{
	return ( DSPInRegister.GpiB.bit.Precharge_FB );
}

/*
 * @brief Function to Get status of the Main Contactor
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Main_Contactor_Status( void )
{
	return ( DSPInRegister.GpiB.bit.Main_Contactor_Status );
}

/*
 * @brief Function to Get status of InvBRK.A.FB
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_InvBRK_A_FB( void )
{
	return ( DSPInRegister.GpiB.bit.InvBRK_A_FB );
}

/*********************PE System Pin Map : Updated Pins ********************/

/*
 * @brief Function to set pin Bypass B
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Bypass_B( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Bypass_B = ( value ) ? 1 : 0;
}

/*
 * @brief Function to read the status of Bypass B
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Bypass_B( void )
{
	return ( DSPOutRegister.GpoC.bit.Bypass_B );
}

/*
 * @brief Function to set pin Bypass C
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Bypass_C( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Bypass_C = ( value ) ? 1 : 0;
}

/*
 * @brief Function to read the status of Bypass C
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Bypass_C( void )
{
	return ( DSPOutRegister.GpoC.bit.Bypass_C );
}

/*
 * @brief Function to set pin DSP.In
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_DSP_In( uint16_t value )
{
	DSPInRegister.GpiB.bit.DSP_In = ( value ) ? 1 : 0;
}

/*
 * @brief Function to Get status of DSP.In
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_DSP_In( void )
{
	return ( DSPInRegister.GpiB.bit.DSP_In );
}

/*
 * @brief Read status of Raise_B pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Raise_B( void )
{
	return ( DSPInRegister.GpiA.bit.Raise_B );
}

/*
 * @brief Set Raise_B status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Raise_B( uint16_t value )
{
	DSPInRegister.GpiA.bit.Raise_B = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Lower_B pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Lower_B( void )
{
	return ( DSPInRegister.GpiA.bit.Lower_B );
}

/*
 * @brief Set Lower_B status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Lower_B( uint16_t value )
{
	DSPInRegister.GpiA.bit.Lower_B = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Raise_C pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Raise_C( void )
{
	return ( DSPInRegister.GpiA.bit.Raise_C );
}

/*
 * @brief Set Raise_C status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Raise_C( uint16_t value )
{
	DSPInRegister.GpiA.bit.Raise_C = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Lower_C pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Lower_C( void )
{
	return ( DSPInRegister.GpiA.bit.Lower_C );
}

/*
 * @brief Set Lower_C status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Lower_C( uint16_t value )
{
	DSPInRegister.GpiA.bit.Lower_C = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Bridging_B pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Bridging_B( void )
{
	return ( DSPInRegister.GpiB.bit.Bridging_B );
}

/*
 * @brief Set Bridging_B status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Bridging_B( uint16_t value )
{
	DSPInRegister.GpiB.bit.Bridging_B = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Bridging_C pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Bridging_C( void )
{
	return ( DSPInRegister.GpiB.bit.Bridging_C );
}

/*
 * @brief Set Bridging_C status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Bridging_C( uint16_t value )
{
	DSPInRegister.GpiB.bit.Bridging_C = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Spare_CPLD1 pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_CPLD1( void )
{
	return ( DSPOutRegister.GpoA.bit.Spare_CPLD1 );
}

/*
 * @brief Read status of Spare_CPLD3 pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_CPLD3( void )
{
	return ( DSPOutRegister.GpoC.bit.Spare_CPLD3 );
}

/*
 * @brief Set Spare_CPLD3 status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_CPLD3( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Spare_CPLD3 = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Spare_CPLD4 pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Spare_CPLD4( void )
{
	return ( DSPOutRegister.GpoC.bit.Spare_CPLD4 );
}

/*
 * @brief Set Spare_CPLD4 status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Spare_CPLD4( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Spare_CPLD4 = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of Inv_Disconnect_C pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_Inv_Disconnect_C( void )
{
	return ( DSPOutRegister.GpoC.bit.Inv_Disconnect_C );
}

/*
 * @brief Set Inv_Disconnect_C status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_Inv_Disconnect_C( uint16_t value )
{
	DSPOutRegister.GpoC.bit.Inv_Disconnect_C = ( value ) ? 1 : 0;
}

/*
 * @brief Read status of InvGate_Enable_C pin
 * @param[in] None
 * @return The status of the GPIO.
 */
inline bool_t Get_InvGate_Enable_C( void )
{
	return ( DSPOutRegister.GpoB.bit.InvGate_Enable_C );
}

/*
 * @brief Set InvGate_Enable_C status
 * @param[in] value : Value to be set.
 * @return None
 */
inline void Set_InvGate_Enable_C( uint16_t value )
{
	DSPOutRegister.GpoB.bit.InvGate_Enable_C = ( value ) ? 1 : 0;
}

/*
 * @brief Defined in PeriodicTSKs.cpp
 */
#ifdef __cplusplus
void WriteDSPOutputs_TSK( void );

}
#endif

#endif

/**
 * END OF F28335.h
 */
