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{"sheet":"InputSheet","index":0,"n_rows":57,"n_cols":8,"rows_kept":57,"cut":false,"hidden":false,"merged":[]}
["Parameter","Units","Type","Default",null,"*selected*","end"]
["Rail Name",null,"Req",null,"Example","Use this column"]
["Part Number",null,"Req",null,"TPS54824"]
["Vin_min","V","Opt","Vin_nom*0.8",8]
["Vin_nom","V","Req",null,12,null,null,"Directions:"]
["Vin_max","V","Opt","Vin_nom*1.1",15,null,null,"Check/Calculate Selected Column"]
["Vout","V","Req",null,1.8,null,null,"Select any cell in the column of the design you would like to check."]
["Iout","A","Opt","Io_max_IC",8,null,null,"Click on the Check/Calculate to send the input values to the DeviceCalculator worksheet."]
["dVo_trans","V","Opt","Vout*0.04",7.2000000000000008E-2,null,null,"The calculated results on the DeviceCalculator worksheet are then pulled back to check the design."]
["dVo_dc","V","Opt","Vout*0.01",1.7999999999999999E-2,null,null,"The default values shown by the equation in Column D are only used if the cell is empty."]
["Io_step","A","Opt","Iout*0.5",4]
["Rt","kΩ","Opt","Rt_std",69.8,null,null,"Insert New Design"]
["fsw_calculated","kHz","Calc",null,701.47533503199588,null,null,"Click on Insert New Design to add another column to check another design."]
["Lout","µH","Opt","L_rec",1,null,null,"To delete a design that is no longer needed, right click on the column letter then select delete."]
["DCR","mΩ","Opt","Rdson_LS",6]
["Tol_L",null,"Opt",0.2,0.2,null,null,"Pull Values from DeviceCalculator Sheet"]
["Cin","µF","Opt","Cin_min",30,null,null,"The DeviceCalculator worksheet has more details to aid in the design."]
["Cin_derating",null,"Opt",0.5,0.6,null,null,"Updates to the design can be mode in the DeviceCalculator sheet."]
["Vi_ripple","mV","Calc",null,110.48143267427221,null,null,"After making updates, click on Pull Values to use the values on the DeviceCalculator sheet and check them."]
["N_Co_cer",null,"Opt",1,4]
["Co_cer","µF","Opt","Cout_min",47,null,null,"Check/Calculate All Columns"]
["ESR_cer","mΩ","Opt",1,3,null,null,"This will run Check/Calculate Selected Column on all designs"]
["Co_derate_cer",null,"Opt",0.8,0.7]
["N_Co_bulk",null,"Opt",0,0]
["Co_bulk","µF","Opt",0.1,0.1]
["ESR_bulk","mΩ","Opt",1,1]
["Co_total","µF","Calc",null,131.60000099999999]
["Vo_trans","mV","Calc",null,48.468295564897893]
["Vo_ripple","mV","Calc",null,5.3068870370119452]
["Rls","kΩ","Opt","Rls_std",6.04]
["Rhs","kΩ","Opt","Rhs_std",12.1]
["Vout_calc","V","Calc",null,1.8019867549668873]
["fco_target","kHz","Opt","fco_3",89.94]
["Rcomp","kΩ","Opt","Rcomp_std",9.5299999999999994]
["Ccomp","nF","Opt","Ccomp_rec_std",2.2000000000000002]
["Cpole","pF","Opt","Cpole_rec_std",22]
["Cff","pF","Opt","Cff_rec_std",100]
["fco","kHz","Calc",null,100]
["phaseMargin","°","Calc",null,64.645035870920495]
["gainMargin","dB","Calc",null,-15.834507721392708]
["Css","nF","Opt","Css_std",8.1999999999999993]
["tss","ms","Calc",null,0.98399999999999976]
["Ren_b","kΩ","Opt",10000,10000]
["Ren_t","kΩ","Opt",0,0]
["Vstart_typ","V","Calc",null,1.2]
["Vstop_typ","V","Calc",null,1.1499999999999999]
["Cboot","µF","Opt","Cboot_req",0.1]
["Rpg","kΩ","Opt","Rpg_rec",100]
["Rt_check",null,"Check",null,"Pass"]
["Lout_check",null,"Check",null,"Pass"]
["Cout_check",null,"Check",null,"Pass"]
["Cin_check",null,"Check",null,"Pass"]
["FB_network_check",null,"Check",null,"Pass"]
["Compensation_check",null,"Check",null,"Pass"]
["Stability_check",null,"Check",null,"Pass"]
["EN_divider_check",null,"Check",null,"Pass"]
["Cboot_Rpg_check",null,"Check",null,"Pass"]

{"sheet":"DeviceCalculator","index":1,"n_rows":160,"n_cols":11,"rows_kept":160,"cut":false,"hidden":false,"merged":[[138,1,138,7],[145,1,145,7],[155,1,155,7],[39,1,39,7],[52,1,52,7],[53,1,53,7],[84,1,84,7],[85,1,85,7],[94,1,94,7],[102,1,102,7],[103,1,103,7],[110,1,110,7],[130,1,130,7],[76,1,76,7],[38,1,38,7],[0,1,0,7],[2,1,2,7],[24,1,24,7],[30,1,30,7]]}
[null,"Design Calculations"]
[null,"Parameter","Input","Recommended","Selected Value","Calculated with Selected Value","Units","Description"]
[null,"Choose Device"]
[null,"Part Number","TPS54824",null,null,null,null,"Select IC part number",null,"Key"]
[null,"Vin_min_IC",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,2,FALSE)","v":4.5},null,null,null,"V","IC rated minimum input voltage with internal bias",null,"User Entered Value"]
[null,"Vin_max_IC",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,3,FALSE)","v":17},null,null,null,"V","IC rated maximum input voltage",null,"Fixed IC Parameter"]
[null,"Vref",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,9,FALSE)","v":0.6},null,null,null,"V","Internal voltage reference",null,"Calculated Parameter"]
[null,"Io_max_IC",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,4,FALSE)","v":8},null,null,null,"A","IC rated maximum output current",null,"Recommended Component Value"]
[null,"EN_rise",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,16,FALSE)","v":1.2},null,null,null,"V","EN rising voltage threshold",null,"Design Caution"]
[null,"EN_fall",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,17,FALSE)","v":1.1499999999999999},null,null,null,"V","EN falling voltage threshold",null,"Design Warning"]
[null,"Ven_max_IC",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,11,FALSE)","v":6.5},null,null,null,"V","Absolute max voltage on EN pin"]
[null,"Iss",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,15,FALSE)","v":5},null,null,null,"µA","Soft start charging current"]
[null,"OCF_response",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,10,FALSE)","v":"Hiccup"},null,null,null,null,"Over current fault response"]
[null,"Ilim_peak",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,7,FALSE)","v":12.9},null,null,null,"A","Typical peak current limit"]
[null,"fsw_min",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,5,FALSE)","v":200000},null,null,null,"Hz","Minimum fsw setting"]
[null,"fsw_max",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,6,FALSE)","v":1600000},null,null,null,"Hz","Maximum fsw setting"]
[null,"ton_min_max",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,8,FALSE)","v":145},null,null,null,"ns","Worst case minimum on-time"]
[null,"toff_min",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,12,FALSE)","v":100},null,null,null,"ns","Typical minimum off-time"]
[null,"Rdson_HS",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,13,FALSE)","v":14},null,null,null,"mΩ","High-side FET Rdson"]
[null,"Rdson_LS",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,14,FALSE)","v":6},null,null,null,"mΩ","Low-side FET Rdson"]
[null,"gmea",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,18,FALSE)","v":1100},null,null,null,"µA/V","Error amplifier transconductance"]
[null,"gmps",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,19,FALSE)","v":23.1},null,null,null,"A/V","Power stage transconductance"]
[null,"I1",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,25,FALSE)","v":1.2},null,null,null,"µA","EN current measured 50 mV below threshold"]
[null,"Ihysteresis",{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,26,FALSE)","v":3.6},null,null,null,"µA","Hysteresis current added measured 50 mV above turn on threshold"]
[null,"Input System Parameters"]
[null,"Vin_min",9,null,null,null,"V","Minimum input voltage"]
[null,"Vin_nom",9.5,null,null,null,"V","Nominal input voltage"]
[null,"Vin_max",10,null,null,null,"V","Maximum input voltage"]
[null,"Vout",0.77,null,null,null,"V","Output voltage"]
[null,"Iout",5.5,null,null,null,"A","Maximum output current"]
[null,"Select the Switching Frequency (RT pin)"]
[null,"fsw_max_ton",null,{"$f":"IF((1/ton_min_max_sec)*(Vout)/(Vin_max)*1/1.1>=fsw_max,fsw_max,(1/ton_min_max_sec)*(Vout)/(Vin_max)*1/1.1)*10^-3","v":482.75862068965506},null,null,"kHz","Maximum fsw limited by Vin_max and minimum on-time"]
[null,"fsw_max_toff",null,{"$f":"(Vin_min-Vout-Iout*2*(DCR_Ohm+Rdson_HS_Ohm))/(toff_min_sec*1.5*(Vin_min-Iout*2*(Rdson_HS_Ohm-Rdson_LS_Ohm)))*10^-3","v":5991.9210053859952},null,null,"kHz","Maximum fsw allowed limited by Vin_min and minimum off-time for fixed frequency operation\n(Depends on inductor DCR and includes 2x multiplier on resistance for margin)"]
[null,"fsw_select",{"$f":"fsw_max_ton","v":482.75862068965506},null,null,null,"kHz","Enter fsw"]
[null,"Rt_rec",null,{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,22,FALSE)","v":102.18650312267914},null,null,"kΩ","Recommended RT resistor to AGND"]
[null,"Rt_std",null,{"$f":"(IF((10^(LOG(D35)-INT(LOG(D35)))*100)-VLOOKUP((10^(LOG(D35)-INT(LOG(D35)))*100),E96_s:E96_f,1)<VLOOKUP((10^(LOG(D35)-INT(LOG(D35)))*100),E96_s:E96_f,2)-(10^(LOG(D35)-INT(LOG(D35)))*100),VLOOKUP((10^(LOG(D35)-INT(LOG(D35)))*100),E96_s:E96_f,1),VLOOKUP((10^(LOG(D35)-INT(LOG(D35)))*100),E96_s:E96_f,2)))*10^INT(LOG(D35))/100","v":102},null,null,"kΩ","Nearest standard E96 resistor value"]
[null,"Rt",null,null,102,null,"kΩ","Selected RT resistor value"]
[null,"fsw_calculated",null,null,null,{"$f":"VLOOKUP($C$4,partData!$A$3:$ZZ$34,23,FALSE)","v":484.97099391022454},"kHz","Estimated switching frequency based on RT resistor value"]
[null,"Choose the Output Inductor (Lout)"]
[null,"The inductance is selected based on a p-p ripple current target. Smaller L reduces solution size while larger L reduces AC loss."]
[null,"Kind",0.3,null,null,null,null,"Target ripple/Iout ratio (typically between 0.2 to 0.4)"]
[null,"L_min",null,{"$f":"((Vin_max-Vout)*Vout)/(Io_max_IC*0.5*Vin_max*fsw_Hz)*10^6","v":0.36636727192160862},null,null,"µH","Minimum recommended inductance (ripple = 50% Io_max_IC)"]
[null,"L_max",null,{"$f":"((Vin_max-Vout)*Vout)/(Io_max_IC*0.1*Vin_max*fsw_Hz)*10^6","v":1.8318363596080431},null,null,"µH","Maximum recommended inductance (ripple = 10% Io_max_IC)"]
[null,"L_target",null,{"$f":"(1/(Kind*Iout*(fsw_Hz))*(((Vin_max-Vout)*Vout)/Vin_max))*10^6","v":0.88816308344632389},null,null,"µH","Target inductor value based on Kind"]
[null,"L_rec",null,{"$f":"MIN(MAX(D42,D44),D43)","v":0.88816308344632389},null,null,"µH","Recommended inductor value"]
[null,"Lout",null,null,0.88800000000000001,null,"µH","Selected inductance"]
[null,"DCR",null,null,6,null,"mΩ","DC resistance of selected inductor"]
[null,"Tol_L",null,null,0.2,null,null,"Tolerance of inductance for selected inductor"]
[null,"Iripple_max",null,null,null,{"$f":"Vout*(Vin_max-Vout)/(Vin_max*(Lout*(1-Tol_L))*fsw)*1000","v":2.0628787833423905},"A","Inductor ripple current at Vin_max (includes Tol_L, used for DC ripple calculations)"]
[null,"Ipeak",null,null,null,{"$f":"Iout+Iripple_max/2","v":6.5314393916711957},"A","Full load peak current at Vin_max"]
[null,"Irms",null,null,null,{"$f":"(Iout^2+((1/12)*(Vout*(Vin_max-Vout))/(Vin_max*fsw*Lout))^2)^0.5","v":5.5000000017193811},"A","Inductor rms current at Vin_max"]
[null,"Iripple_min",null,null,null,{"$f":"Vout*(Vin_min-Vout)/(Vin_min*(Lout*(1-Tol_L))*fsw)*1000","v":2.0437573596855514},"A","Inductor ripple current at Vin_min (includes Tol_L)"]
[null,"Choose the Output Capacitor (Cout)"]
[null,"The output capacitance is deteremind based on the output ripple, transient and stability requirements. These calculations do not support mixed type output capacitors."]
[null,"Io_step",2.75,null,null,null,"A","Iout load transient step"]
[null,"dVo_trans",3.1E-2,null,null,null,"V","Target Vout overshoot/undershoot after load step"]
[null,"dVo_dc",8.0000000000000002E-3,null,null,null,"V","Target steady state Vout voltage ripple"]
[null,"fco_est",null,{"$f":"MIN(fsw_Hz/10,100000)/1000","v":48.497099391022452},null,null,"kHz","Estimated crossover frequency"]
[null,"Cout_ripple",null,{"$f":"1/(8*fsw*(dVo_dc/Iripple_max))*10^3","v":66.462698582941584},null,null,"µF","Min Cout for DC ripple requirement (ignores ESR)"]
[null,"Cout_trans",null,{"$f":"Io_step/(2*PI()*fco_est*dVo_trans)*10^3","v":291.12222872428896},null,null,"µF","Min Cout for transient requirement assuming fco = fsw/10"]
[null,"Cout_stability",null,{"$f":"(15/(PI()*fsw_Hz))^2*1/Lout_H*10^6","v":109.15365395643339},null,null,"µF","Min Cout for stability (f_LC < fsw/30)"]
[null,"Cout_min",null,{"$f":"(MAX(D59:D61))","v":291.12222872428896},null,null,"µF","Recommended min Cout (must include any derating due to DC/AC bias, temp and/or tolerance)"]
[null,"ESR_trans",null,{"$f":"dVo_trans/Io_step*1000","v":11.272727272727273},null,null,"mΩ","Max ESR to meet load step transient requirement"]
[null,"ESR_ripple",null,{"$f":"dVo_dc/Iripple_max*1000","v":3.8780756603826996},null,null,"mΩ","Max ESR to meet ripple requirement"]
[null,"ESR_max",null,{"$f":"MIN(D63:D64)","v":3.8780756603826996},null,null,"mΩ","Recommended max ESR"]
[null,"Co_cer",null,null,100,null,"µF","Nominal value of single output capacitor"]
[null,"ESR_cer",null,null,3,null,"mΩ","ESR of output single output capacitor"]
[null,"N_Co_cer",null,null,4,null,null,"Number of output capacitors"]
[null,"Co_derate_cer",null,null,0.8,null,null,"Remaining output capacitance after derating due to DC/AC bias, temp and/or tolerance"]
[null,"Co_cer_eff",null,null,null,{"$f":"IF(N_Co_cer=0,10^-6,Co_cer*N_Co_cer*Co_derate_cer)","v":320},"µF","Total Ceramic Output Capacitance"]
[null,"ESR_cer_eff",null,null,null,{"$f":"IF(N_Co_cer=0,10^6,ESR_cer/N_Co_cer)","v":0.75},"mΩ","Effective Ceramic Capacitance ESR"]
[null,"Co_bulk",null,null,0.1,null,"µF","Nominal value of a Single Bulk/Polymer/Electrolytic Output Capacitor"]
[null,"ESR_bulk",null,null,1,null,"mΩ","Single Bulk Capacitor ESR"]
[null,"N_Co_bulk",null,null,0,null,null,"Number of Bulk Capacitors"]
[null,"Co_bulk_eff",null,null,null,{"$f":"IF(N_Co_bulk=0,10^-6,N_Co_bulk*Co_bulk)","v":9.9999999999999995E-7},"µF","Total Bulk Output Capacitance"]
[null,"ESR_bulk_eff",null,null,null,{"$f":"IF(N_Co_bulk=0,10^6,ESR_bulk/N_Co_bulk)","v":1000000},"mΩ","Effective Bulk Capacitance ESR"]
[null,"Calculations with selected output caps"]
[null,"Co_total",null,null,null,{"$f":"(Co_cer_eff+Co_bulk_eff)","v":320.000001},"µF","Effective Cout (If red, not enough capacitance)"]
[null,"Zcer_fsw",null,null,null,{"$f":"SQRT((1/(2*PI()*fsw_Hz*Co_cer_eff_F))^2+ESR_cer_eff_Ohm^2)*10^3","v":1.2705278180974178},"mΩ","Ceramic capacitor impdance at fsw"]
[null,"Zbulk_fsw",null,null,null,{"$f":"SQRT((1/(2*PI()*fsw_Hz*Co_bulk_eff_F))^2+ESR_bulk_eff_Ohm^2)*10^3","v":328175672.3215189},"mΩ","Bulk capacitor impedance at fsw"]
[null,"Zcout_fsw",null,null,null,{"$f":"Zcer_fsw*Zbulk_fsw/(Zcer_fsw+Zbulk_fsw)","v":1.270527813178586},"mΩ","Combined output capacitor impedance at fsw"]
[null,"Vo_ripple",null,null,null,{"$f":"Zcout_fsw*Iripple_max","v":2.6209448694525093},"mV","Estimated capacitive + resistive DC ripple (ignores ESL)"]
[null,"fz_ESR_cer",null,null,null,{"$f":"IF(N_Co_cer=0,10^6,1/(2*PI()*Co_cer_eff_F*ESR_cer_eff_Ohm)*10^-3)","v":663.14559621623062},"kHz","Ceramic capacitor ESR zero frequency"]
[null,"fz_ESR_bulk",null,null,null,{"$f":"IF(N_Co_bulk=0,10^6,1/(2*PI()*Co_bulk_eff_F*ESR_bulk_eff_Ohm)*10^-3)","v":1000000},"kHz","Bulk capacitor ESR zero frequency \n(if yellow, ESR zero may limit loop bandwidth)"]
[null,"Choose the Input Capacitor (Cin)"]
[null,"The input capacitance is deteremind based on the input ripple requirements. Additional bulk input capacitance may be needed for transients. 0.1µF high frequency bypass capacitors are also required."]
[null,"Vi_ripple_rec",null,{"$f":"Vin_min*0.02*1000","v":180},null,null,"mV","Recommended DC input voltage ripple (2% min Vin)"]
[null,"Vi_ripple_target",{"$f":"D87","v":180},null,null,null,"mV","Target DC input voltage ripple"]
[null,"Cin_min",null,{"$f":"(Iout*0.25)/(Vi_ripple_target*10^-3*fsw_Hz)*10^6","v":15.751228392646844},null,null,"µF","Minimum input capacitance required (account for derating)"]
[null,"Cin",null,null,15.8,null,"µF","Total nominal input ceramic cap used"]
[null,"Cin_derating",null,null,0.5,null,null,"Remaining input capacitance after derating due to DC/AC bias, temp and/or tolerance"]
[null,"Cin_eff",null,null,null,{"$f":"Cin*Cin_derating","v":7.9},"µF","Effective input ceramic cap used"]
[null,"Vi_ripple",null,null,null,{"$f":"(Iout*Vout/Vin_min*(1-Vout/Vin_min))/(Cin_eff*fsw)*10^6","v":112.31179684617983},"mV","Input ripple with selected input capacitance"]
[null,"Iin_rms",null,null,null,{"$f":"Iout*SQRT(Vout/Vin_min*(Vin_min-Vout)/Vin_min)","v":1.5383865004254809},"A","Input RMS current"]
[null,"Determine feedback network values (FB pin)"]
[null,"Rls_rec",null,{"$f":"Vref/0.0001*10^-3","v":5.9999999999999991},null,null,"kΩ","Recommended bottom feedback resistor (targets 100µA current in FB divider)"]
[null,"Rls_std",null,{"$f":"(IF((10^(LOG(D96)-INT(LOG(D96)))*100)-VLOOKUP((10^(LOG(D96)-INT(LOG(D96)))*100),E96_s:E96_f,1)<VLOOKUP((10^(LOG(D96)-INT(LOG(D96)))*100),E96_s:E96_f,2)-(10^(LOG(D96)-INT(LOG(D96)))*100),VLOOKUP((10^(LOG(D96)-INT(LOG(D96)))*100),E96_s:E96_f,1),VLOOKUP((10^(LOG(D96)-INT(LOG(D96)))*100),E96_s:E96_f,2)))*10^INT(LOG(D96))/100","v":6.04},null,null,"kΩ","Nearest standard E96 resistor value"]
[null,"Rls",null,null,6.04,null,"kΩ","Selected bottom feedback resistor (1k-20k recommended)"]
[null,"Rhs_target",null,{"$f":"Rfb_b*(Vout/Vref-1)","v":1.711333333333334},null,null,"kΩ","Calculated top resistor"]
[null,"Rhs_std",null,{"$f":"(IF((10^(LOG(D99)-INT(LOG(D99)))*100)-VLOOKUP((10^(LOG(D99)-INT(LOG(D99)))*100),E96_s:E96_f,1)<VLOOKUP((10^(LOG(D99)-INT(LOG(D99)))*100),E96_s:E96_f,2)-(10^(LOG(D99)-INT(LOG(D99)))*100),VLOOKUP((10^(LOG(D99)-INT(LOG(D99)))*100),E96_s:E96_f,1),VLOOKUP((10^(LOG(D99)-INT(LOG(D99)))*100),E96_s:E96_f,2)))*10^INT(LOG(D99))/100","v":1.69},null,null,"kΩ","Nearest standard E96 resistor value"]
[null,"Rhs",null,null,1.69,null,"kΩ","Selected top resistor"]
[null,"Vout_calc",null,null,null,{"$f":"Vref*(1+Rfb_t/Rfb_b)","v":0.76788079470198678},"V","Calculated Vout (yellow if not within 1% of target Vout)"]
[null,"Determine Compensation network values (COMP pin)"]
[null,"Select fco target\nFor a conservative compensation design, target the minimum of fco1 or fco2\nFor more optimized transient response, target fco3"]
[null,"fpole",null,null,null,{"$f":"(Iout)/(2*PI()*Vout*Co_total_F)*10^-3","v":3.552565682913754},"kHz","fpole ps"]
[null,"fzero_ESR",null,null,null,{"$f":"MIN(fz_ESR_cer,fz_ESR_bulk)","v":663.14559621623062},"kHz","fzero ESR, uses minimum of zero from ceramic caps or bulk caps"]
[null,"fco_1",null,{"$f":"SQRT(fpole_Hz*fzero_ESR_Hz)*10^-3","v":48.537287603379347},null,null,"kHz","fco1 between ps pole and zero (DS Equation)"]
[null,"fco_2",null,{"$f":"SQRT(fpole_Hz*(fsw_Hz/2))*10^-3","v":29.350394462204754},null,null,"kHz","fco2 between ps pole and fsw/2 (DS Equation)"]
[null,"fco_3",null,{"$f":"MIN(VLOOKUP(0,'Small Signal'!I2:L212,4,FALSE),1/8*fsw_Hz)*10^-3","v":60.621374238778067},null,null,"kHz","fco3 recommended target using loop model in 'Small Signal' tab"]
[null,"fco_target",null,null,54.12,null,"kHz","Crossover Frequency Target (fco)"]
[null,"Select compensation values"]
[null,"Rcomp_rec",null,{"$f":"(2*PI()*fco_target_Hz*(Co_total_F)/gmps)*(Vout/(gmea*Vref))/1000","v":5.4956927658537849},null,null,"kΩ","Calculated compensation resistor"]
[null,"Rcomp_std",null,{"$f":"(IF((10^(LOG(D112)-INT(LOG(D112)))*100)-VLOOKUP((10^(LOG(D112)-INT(LOG(D112)))*100),E96_s:E96_f,1)<VLOOKUP((10^(LOG(D112)-INT(LOG(D112)))*100),E96_s:E96_f,2)-(10^(LOG(D112)-INT(LOG(D112)))*100),VLOOKUP((10^(LOG(D112)-INT(LOG(D112)))*100),E96_s:E96_f,1),VLOOKUP((10^(LOG(D112)-INT(LOG(D112)))*100),E96_s:E96_f,2)))*10^INT(LOG(D112))/100","v":5.49},null,null,"kΩ","Nearest standard E96 resistor value"]
[null,"Rcomp",null,null,5.49,null,"kΩ","Selected compensation resistor"]
[null,"Ccomp_ps_fpole",null,{"$f":"1/(2*PI()*Rcomp*fpole_Hz*2)*10^9","v":4.0801457322404362},null,null,"nF","Ccomp at 2x ps fpole"]
[null,"Ccomp_fco",null,{"$f":"1/(2*PI()*Rcomp*fco_target*10^3/10)*10^9","v":5.3566096487968906},null,null,"nF","Ccomp at 1/10 fco"]
[null,"Ccomp_rec_std",null,{"$f":"IF(Ccomp_rec<10000,VLOOKUP((10^(LOG(Ccomp_rec)-INT(LOG(Ccomp_rec)))),c_s1:C_f1,1),VLOOKUP((10^(LOG(Ccomp_rec)-INT(LOG(Ccomp_rec)))),C_s2:C_f2,1))*10^INT(LOG(Ccomp_rec))","v":4.7},null,null,"nF","Ccomp recommended nearest standard value"]
[null,"Ccomp",null,null,4.7,null,"nF","Ccomp chosen"]
[null,"fzero_Ccomp",null,null,null,{"$f":"1/(2*PI()*Rcomp*Ccomp)*10^-3","v":6.1680790253805888},"kHz","Compensation zero with selected Ccomp"]
[null,"Cpole_ESR_fzero",null,{"$f":"MAX(0.1,1/(2*PI()*Rcomp*fzero_ESR_Hz)*10^12-10)","v":33.715846994535518},null,null,"pF","Cpole for pole at ESR fzero"]
[null,"Cpole_fsw",null,{"$f":"MAX(0.1,1/(Rcomp*PI()*fsw*1000)*10^12-10)","v":109.55342395036209},null,null,"pF","Cpole for pole at fsw/2 "]
[null,"Cpole_fco",null,{"$f":"MAX(0.1,1/(2*PI()*Rcomp*fco_target_Hz*10)*10^12-10)","v":43.566096487968906},null,null,"pF","Cpole for pole at 10x fco"]
[null,"Cpole_rec_std",null,{"$f":"IF(Cpole_rec<10000,VLOOKUP((10^(LOG(Cpole_rec)-INT(LOG(Cpole_rec)))),c_s1:C_f1,1),VLOOKUP((10^(LOG(Cpole_rec)-INT(LOG(Cpole_rec)))),C_s2:C_f2,1))*10^INT(LOG(Cpole_rec))","v":100},null,null,"pF","Cpole recommended nearest standard value"]
[null,"Cpole",null,null,100,null,"pF","Cpole chosen"]
[null,"fpole_Cpole",null,null,null,{"$f":"1/(2*PI()*Rcomp*Cpole)*10^-3","v":289.8997141928877},"kHz","Compensation pole with selected Cpole"]
[null,"Cff_fsw",null,{"$f":"1/(2*PI()*Rfb_t*fsw/5)*10^6","v":970.92943415308855},null,null,"pF","Cff at fsw/5 and nearest STD value"]
[null,"Cff_rec_std",null,{"$f":"IF(Cff_rec<10000,VLOOKUP((10^(LOG(Cff_rec)-INT(LOG(Cff_rec)))),c_s1:C_f1,1),VLOOKUP((10^(LOG(Cff_rec)-INT(LOG(Cff_rec)))),C_s2:C_f2,1))*10^INT(LOG(Cff_rec))","v":819.99999999999989},null,null,"pF","Cpole recommended nearest standard value"]
[null,"Cff",null,null,820,null,"pF","Cff chosen (input 0 if not used)"]
[null,"fzero_ff",null,null,null,{"$f":"1/(2*PI()*Cff*Rfb_t*10^3)*10^-3","v":114.84697870680857},"kHz","Zero from feedforward capacitor"]
[null,"fpole_ff",null,null,null,{"$f":"1/(2*PI()*Cff*Rfb_t*Rfb_b/(Rfb_b+Rfb_t)*10^3)*10^-3","v":146.98131546417724},"kHz","Pole from feedforward capacitor"]
[null,"Results with selected compensation values"]
[null,"fco",null,null,null,{"$f":"fco*10^-3","v":54.116952654646454},"kHz","fco with selected compensation (Red if >fsw/5)"]
[null,"phaseMargin",null,null,null,{"$f":"phaseMargin","v":68.325411231752128},"°","Phase margin with selected compensation (Red if <60)"]
[null,"gainMargin",null,null,null,{"$f":"gainMargin","v":-14.161329461037258},"dB","Gain margin with selected compensation (Red if >-12)"]
[null,"Zcer_fco",null,null,null,{"$f":"SQRT((1/(2*PI()*fco*Co_cer_eff_F))^2+ESR_cer_eff_Ohm^2)*10^3","v":9.221002551885169},"mΩ","Ceramic capacitor impdance at fco"]
[null,"Zbulk_fco",null,null,null,{"$f":"SQRT((1/(2*PI()*fco*Co_bulk_eff_F))^2+ESR_bulk_eff_Ohm^2)*10^3","v":2940944463.5245619},"mΩ","Bulk capacitor impedance at fco",null,"Display Power Stage?","NO"]
[null,"Zout_fco",null,null,null,{"$f":"Zcer_fco*Zbulk_fco/(Zcer_fco+Zbulk_fco)","v":9.2210025229737465},"mΩ","Combined output capacitor impedance at fco",null,"Display Compensation?","NO"]
[null,"Vo_trans",null,null,null,{"$f":"Io_step*Zout_fco","v":25.357756938177804},"mV","Estimated overshoot/undershoot based on fco"]
[null,"Select the Soft-Start time (SS pin)"]
[null,"tss_target",1,null,null,null,"ms","Input target Soft Start time"]
[null,"Css_rec",null,{"$f":"tss_target*Iss/Vref","v":8.3333333333333339},null,null,"nF","Recommended Css capacitor value"]
[null,"Css_std",null,{"$f":"IF(D141*10^-3<10000,IF((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3))))-VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),c_s1:C_f1,1)<VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),c_s1:C_f1,2)-(10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),c_s1:C_f1,1),VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),c_s1:C_f1,2))*10^INT(LOG(D141*10^-3)),IF((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3))))-VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),C_s2:C_f2,1)<VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),C_s2:C_f2,2)-(10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),C_s2:C_f2,1),VLOOKUP((10^(LOG(D141*10^-3)-INT(LOG(D141*10^-3)))),C_s2:C_f2,2))*10^INT(LOG(D141*10^-3)))*10^3","v":8.1999999999999993},null,null,"nF","Recommended Css nearest standard value"]
[null,"Css",null,null,8.1999999999999993,null,"nF","Chosen Css"]
[null,"tss",null,null,null,{"$f":"Css*Vref/Iss","v":0.98399999999999976},"ms","Soft Start time chosen based on Css"]
[null,"Istart",null,null,null,{"$f":"(Co_total_F)*Vout/(tss*10^-3)","v":0.250406504847561},"A","Current needed to charge output caps during startup"]
[null,"UVLO resistor divider (EN pin)"]
[null,"UVLO start voltage",6.5,null,null,null,"V","Target turn on voltage set by EN resistor divider"]
[null,"UVLO stop voltage",6.2,null,null,null,"V","Target turn on voltage set by EN resistor divider"]
[null,"Ren_t_calc",null,{"$f":"(Vstart_target*(EN_fall/EN_rise)-Vstop_target)/(I_1*(1-EN_fall/EN_rise)+Ihys)*10^-3","v":7.990867579908465},null,null,null,"Calculated top resistor"]
[null,"Ren_t",null,null,0,null,"kΩ","Selected top resistor"]
[null,"Ren_b_calc",null,{"$f":"(Ren_t*EN_fall)/((Vstop_target-EN_fall)+Ren_t*(I_1+Ihys))*10^-3","v":0},null,null,"kΩ","Calculated bottom resistor"]
[null,"Ren_b",null,null,10000,null,"kΩ","Selected bottom resistor"]
[null,"Ven_max",null,null,null,{"$f":"Vin_max*Ren_b/(Ren_t+Ren_b)","v":10},"V","Maxiumum voltage on EN pin (Red if above absolute max, Yellow if bellow enable logic level)"]
[null,"Vstart_typ",null,null,null,{"$f":"EN_rise+Ren_t*(EN_rise-I_1*Ren_b)/Ren_b","v":1.2},"V","Estimated typical turn on voltage with selected resistors\n(Red if below Vin_min, Yellow if near Vin_min)"]
[null,"Vstop_typ",null,null,null,{"$f":"EN_fall-(Ren_t*(I_1*Ren_b-EN_fall+Ihys*Ren_b))/Ren_b","v":1.1499999999999999},"V","Estimated typical turn off voltage with selected resistors"]
[null,"BOOT bypass capacitor, PGOOD resistor"]
[null,"Cboot_req",null,0.1,null,null,"µF","0.1µF required"]
[null,"Cboot",null,null,0.1,null,"µF","Selected Cboot"]
[null,"Rpg_rec",null,100,null,null,"kΩ","1k-100k recommended"]
[null,"Rpg",null,null,100,null,"kΩ","Selected Rpg"]

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["Pin","Name","Purpose","Connection For Functional Use","Reasoning","Recommended Component Values from Calculator","Component units","Status","Comments"]
["Sensing and Control"]
[33,"DIFFO","Output of the differential sense amplifier","Ensure that the feedback divider network gives the appropriate Vout based on the VREF=0.6V (VREF can be trimmed using VREF_TRIM PMBUS command).\nThe top resistor is connected between DIFFO and FB.\nThe bottom resistor is connected between FB and AGND.","Output of the differential sense amplifier – can be thought of as Vout.",null,null,"Open"]
[34,"FB","Feedback pin for the control loop. ","Feedback divider network connected as needed.\nResistor network is between DIFFO & FB and between FB & AGND. ","Regulates to nominal 600mV if there is no trim applied to device using VREF_TRIM PMBUS command",{"$f":"CONCATENATE(partData!#REF!, partData!#REF!)","v":{"$error":"#REF!"}},{"$f":"DeviceCalculator!#REF!","v":{"$error":"#REF!"}},"Open"]
[35,"COMP","Output of the error amplifier. This regulates the D-CAP and D-CAP2 valley voltage reference for output regulation","Tied to AGND with a 10 nF capacitor, 0402, 16V rated, X5R or better dielectric if using D-CAP2",null,null,null,"Open"]
[35,"COMP","Output of the error amplifier. This regulates the D-CAP and D-CAP2 valley voltage reference for output regulation","Add a placeholder for Rcomp resistor( to use if needed). The Rcomp resistor should be connected to AGND",null,null,null,"Open"]
[32,"VOUTS-","Output voltage sensing, positive side. This sensing provides remote sensing for PMBus reporting and the voltage control loop","You can use a 10 to 100 ohm resistor in series with the trace connecting from the GND at the remote end (desired load ground point) to the VOUTS- pin of the IC. You can use a 0 ohm resistor if you don’t want to use the filter cap between the VOUTS+,VOUTS-nets","This resistor helps to break the net – so that during routing the RSP pin is connected to the remote end of the load rather than the Vout at the output of the buck converter. Also this resistor in combination with the capacitor across the RSP-RSN nets can serve as a filter to filter out the high frequency noise on the RS, RSN lines. Please see note on filter capacitor selection.",null,null,"Open"]
[31,"VOUTS+","Output voltage sensing, negative or common side. This sensing provides remote sensing for PMBus reporting and the voltage control loop","You can use a 10 to 100 ohm resistor in series with the trace connecting from the Vout at the remote end (desired regulation point) to the VOUTS+ pin of the IC. You can use a 0 ohm resistor if you don’t want to use the filter cap between the VOUTS+,VOUTS-nets",null,null,null,"Open"]
["31, 32","VOUTS+, VOUTS-",null,"If the application has ferrite beads, ensure that the output is take after the ferrite bead. This will adjust the converter for the DC drop across the ferrite bead.","It is necessary that the LC resonance of ferrite bead-cap is away from the LC resonance of inductor-Cout. If they resonate at the same frequency then a huge amount of noise can be passed through to the output.",null,null,"Open"]
["31, 32","VOUTS+, VOUTS-",null,"Connect a Cfilter of 1nF typical between the RSP- RSN pins close to the IC.\nThe Cfilt should be lower than the value mentioned in the equation below.\nCfilt = 1 / (2*PI*R*Fsw)\nR = Series resistance on RSP line + Series resistance on RSN line\nFsw = switching frequency.\n","This filter cap along with the series resistor helps filter the noise on the RSP, RSN pins. If the resistor use is 0 ohms, then this filter does not have much effect. Having the Cfilt lower than the mentioned equation ensures that the phase shift imposed by the feedback signal by the filter at the control loop cross over frequency is minimal while at the same time maximizing the filtering effect.",null,null,"Open"]
[]
[]
["Configuration"]
[39,"MODE","D-CAP and D-CAP2 control mode selection pin.","Connect to BP3 for D-CAP2\nConnect to AGND for D-CAP\n",null,null,null,"Open"]
[37,"TSNS","External temperature sense signal input","Tied to AGND when not using an external temperature sensor\nRefer to WEBENCH schematic for help with this signal.",null,null,null,"Open"]
[37,"TSNS","External temperature sense signal input","It is also recommended to use a small 1-nF capacitor from TSNS to AGND to improve the noise performance of temperature readings",null,null,null,"Open"]
[40,"RT","Frequency-setting resistor","Use the table to determine the frequency setting resistor. Use 1% tolerance resistors only and only the exact values given in the table above",null,null,null,"Open"]
[36,"PGOOD","Power good output.","Have a 100k resistor connected between the pin to BP3 or to BP6.",null,null,null,"Open"]
[]
[]
["Power Stage"]
["8, 9, 10, 11, 12","SW","Switched power output of the device.","Snubber Capacitor: 1.0nF 0603 minimum 25V\nSnubber Resistor: 0805 1-ohm resistor from SW to PGND “Snubber”",null,null,null,"Open"]
["21, 22, 23, 24, 25","VIN","Input power to the power stage","The VIN capacitor should be able to give minimum ripple voltage desired for the application. Use WEBENCH to calculate the input capacitance","\n",null,null,"Open"]
["21, 22, 23, 24, 25","VIN","Input power to the power stage","Multiple (5qty preferable) 2.2nF-10nF 0402 minimum 25V input capacitor from VIN to GND to minimize high-frequency ringing energy",null,null,null,"Open"]
["21, 22, 23, 24, 25","VIN","Input power to the power stage","If you have a LC filter at the VIN input, check the resonant frequency of the LC filter and see if that is closer to the loop bandwidth.\n\nLC filter Resonant frequency = 1/ (2 * PI* SQRT(L*C))\n\nLoop Bandwidth = Fsw * (1/5th )","For example if Lfilter is 100nH / 0.32mOhm power inductor, combined with 5x 22uF ceramic capacitors creates a high-Q L-C resonant filter at the input to the converter, which could result in ringing and oscillations at the VIN node.\nThe L-C resonance frequency for the 100nH and 110uF combo is about 50kHz, if this is close to the loop bandwidth of the converter, that is extremely dangerous as the loop and VIN could resonant with each other\nRecommend either:\na. Adding higher ESR electrolytic capacitors across the ceramic capacitors to dampen the L-C resonance\nb. Adding a resistor to help dampen the L-C resonance.\nc. Select an inductor with a higher DCR\n\nThe characteristic impedance Sqrt(L/C) is about 13mOhm so the target is to have at least 13mOhms of resistance. \n\nIf you can find an alternate input inductor with 8-15mOhms DCR, that might be the simplest approach. The example Lfilter inductor is 0.32mohm which is too low.",null,null,"Open"]
[7,"BOOT","Bootstrap pin for the internal flying high-side driver","The boot capacitor should be 0.1uF, 0402, 25V rated (for Vinmax of 18V use 50V rating), X5R.",null,null,null,"Open"]
[7,"BOOT","Bootstrap pin for the internal flying high-side driver","A 0 to 2 Ohm, 0402 size resistor can be added in series with Boot Capacitor to reduce the voltage spikes at switch by slowing down the turn-on of the high-side FET.",null,null,null,"Open"]
["N/A","Cin",null,"Cin needs to be able to handle I­PK_RIPPLE shared across all Cin. Please follow WEBENCH recommendation.",null,null,null,"Open"]
["N/A","Cout",null,"Please follow WEBENCH or datasheet recommendation to meet the ripple, transient requirements for your design",null,null,null,"Open"]
["N/A","Cout",null,"Add atleast 1X100uF and 1X47uF  and 1x10uF and 1x1uF ceramic capacitor as part of the output capacitor bank – to ensure that there are not gaps due to self-resonances. ","Output filters made of 1uF, 10uF and 100uF capacitors without capacitors between those values often have inter-capacitor resonances that result in noise peaks between the two capacitors internal self-resonance frequencies.",null,null,"Open"]
["N/A","Inductor",null,"Please follow WEBENCH or datasheet recommendations for inductor selection",null,null,null,"Open"]
["N/A","Snubber",null,"Snubber resistor needs to be able to handle C*V¬2*Fsw power across it.\nTypically if the power level is 50mW or less, then 0805 can handle. \nPlease check the power rating of the resistor",null,null,null,"Open"]
[]
[]
["Controller"]
[27,"BP3","Output of the 3.3-V on-board regulator","BP3 bypassed with a 1 µF, 0402, 10V rated or larger capacitor, X5R or better dielectric to AGND, placed as close as possible to the BP3 pin, in order to stabilize LDO.","This is the output of the 3.3V LDO regulator inside the IC. This LDO powers the controller.",null,null,"Open"]
[28,"BP6","Output of the 6-V on-board regulator","BP6 bypassed with a 4.7 µF, 0402, 16Vrated or larger ceramic capacitor to PGND and GND , placed as close as possible to the BP6 pin, in order to stabilize LDO.","Do not use 10V rated capacitors. The DC bias loss of capacitance on a 10V cap operating at 5.1V output is pretty severe and could compromise the stability of the LDO.\nThis is the output of the 6V LDO regulator inside the IC. This LDO powers the driver stage of the controller.",null,null,"Open"]
[30,"BPEXT","External BP voltage for BP crossover function.","If using BPEXT: tied to GND with a 4.7 µF or larger capacitor, placed as close as possible to the BP6 pin. \nIf not using BPEXT: tied to GND.",null,null,null,"Open"]
[30,"BPEXT","External BP voltage for BP crossover function.","The supplied voltage on BPEXT pin must be between 4.5V and 6.5V.","The absolute maximum recommended voltage on the BPEXT is 7V only. Please ensure to stay within the recommended voltage of 6.5V",null,null,"Open"]
[13,"AGNDSNS","Analog ground sense. Provides Kelvin connection point to analog ground for precise current measurement.","Kelvin Connect to AGND pin only with a low impedance, low noise path. Do not connect to Thermal PAD externally on the board.",null,null,null,"Open"]
[38,"AGND","Analog ground return for control circuitry.","Kelvin connect to AGNDSNS pin only",null,null,null,"Open"]
[38,"AGND","Analog ground return for control circuitry.","Do not connect to GND or PGND or Thermal PAD",null,null,null,"Open"]
[38,"AGND","Analog ground return for control circuitry.","Use a separate ground symbol for AGND","This is expected to be a clean ground",null,null,"Open"]
["14, 15, 16, 17, 18, 19, 20","GND","Power stage ground return","Use a separate ground symbol for GND","This ground carries the high current and is noisy",null,null,"Open"]
[29,"VDD","Input Voltage for analog control circuitry.","Bypass with a 4.7-µF capacitor parallel with a 0.1uF capacitor to GND (thermal pad or GND pins). The capacitor should be X5R or better dielectric, 25V or higher rated, 0402 or larger",null,null,null,"Open"]
[29,"VDD","Input Voltage for analog control circuitry.","VIN and VDD must be at tied together and at the same voltage for accurate short circuit protection.\nYou can use a zero ohm resistor to connect VDD to VIN",null,null,null,"Open"]
[]
[]
["PMBUS"]
[5,"CLK","PMBus CLK pin","Use a 3k effective pull up across the full Bus. DO NOT use a 10k pull-up.",null,null,null,"Open"]
[1,"CNTL","PMBus CNTL pin.","Use a 3k effective pull up across the full Bus. DO NOT use a 10k pull-up.\n\nThe abs max voltage on the CNTL pin is only 7V. It cannot be connected to VIN directly (unless VIN max is below 6.5V)",null,null,null,"Open"]
[4,"DATA","PMBus DATA pin.","Use a 3k effective pull up across the full Bus. DO NOT use a 10k pull-up.",null,null,null,"Open"]
[6,"SMBALERT","SMBus alert pin","Use a 3k effective pull up across the full Bus. DO NOT use a 10k pull-up.",null,null,null,"Open"]
["3, 2","ADDR0, ADDR1","Sets the PMBus address","ADDR0 and ADDR1 resistors should be chosen correctly based one table below.","ADDR0 sets low order 3-bits of the PMBus address\nADDR1 sets high order 3 bits of the PMBUS address\n",null,null,"Open"]
["3, 2","ADDR0, ADDR1","Sets the PMBus address","Do not use the below addresses.\n7-bit Address = 0001000  (8d)\n8-bit I2C Write Address of 0x10 (16d)\n8-bit I2C Read Address of 0x11 (17d)\na. This is the SMB Reserved Address for the SMBus Host.  While this is not an issue for the TPS544C20, other devices sharing the common PMBus could attempt to contact the Host using this Address.  In addition, some SMBus hosts may attempt to respond to transactions intended for this device due to this address selection.\nb. It is recommended considering an alternate PMBus address.",null,null,null,"Open"]
["3, 2","ADDR0, ADDR1","Sets the PMBus address","The ADDR0, ADDR1 resistors must be connected to AGND",null,null,null,"Open"]
[]
[]
["Misc"]
[null,"Boot Voltage",null,"For the TPS544C20 the feedback divider should always be set according to Vout without PMBus programming. The part always boots with Vref = 0.6V and has limited programming range from that level.",null,null,null,"Open"]
[null,"Safe Operating Area",null,"Refer to SOA curves in datasheet (Figure 10 to Figure 19) to derate based on the maximum ambient temperature of the application.",null,null,null,"Open"]

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["Pin","Name","Purpose","Placement or Routing?","Remarks","Reasoning","Status","Comments"]
["Sensing and Control"]
[33,"DIFFO","Output of the differential sense amplifier","Placement","Place the two resistors as close as possible to the pin",null,"Open"]
[34,"FB","Feedback pin for the control loop.","Routing","Route the FB trace from the DIFFO resistors to the FB pin, keeping the trace as short as possible",null,"Open"]
[35,"COMP","Output of the error amplifier. This regulates the D-CAP and D-CAP2 valley voltage reference for output regulation","Placement","COMP requires good local bypassing. Place a bypass capacitor as close as possible to the COMP pin which bypasses COMP to the low impedance analog ground (AGND). This return loop should be kept away from fast switching voltage and main current path, as well as the BP6 current path.",null,"Open"]
["31, 32","VOUTS+, VOUTS-",null,"Routing","Route the VOUTS+ and VOUTS- lines from the desired regulation point back to the device pins as a tightly coupled differential pair.  These traces must be kept away from switching or noisy areas which can add differential-mode noise.",null,"Open"]
[]
[]
["Configuration"]
[39,"MODE","D-CAP and D-CAP2 control mode selection pin.","Routing","All routing for the MODE pin should be placed away from any high voltage switch node (itself and others), such as SW and BOOT to avoid noise coupling. If using DCAP2, be sure to connect to AGND",null,"Open"]
[37,"TSNS","External temperature sense signal input.","Routing","When using TSNS, route traces away from switching areas or high current paths on the layout. Connect to AGND when not in use.",null,"Open"]
[40,"RT","Frequency-setting resistor","Placement","Keep the RT resistor local to the device and place it as close as possible to the RT pin. The resistor should be kept away from fast switching voltage and current paths. Connect the resistor to the low impedance analog ground (AGND). ",null,"Open"]
[36,"PGOOD","Power good output.","Placement","Place the pulllup resistor close to the PGOOD pin and route away from SW and other noisy areas.",null,"Open"]
[]
[]
["Power Stage"]
[8,"SW","Switched power output of the device.","Routing","The PCB trace defined as switch node, which connects the SW pins and up-stream of the output inductor should be as short and wide as possible. Use separate via or trace to connect SW node to the snubber. Do not combine these connections. ",null,"Open"]
[8,"SW","Switched power output of the device.","Routing","The PCB trace defined as switch node, which connects the SW pins and up-stream of the output inductor should be as short and wide as possible. Use separate via or trace to connect SW node to the bootstrap capacitor. Do not combine these connections. ",null,"Open"]
[9,"SW","Switched power output of the device.","Routing","Adding a space between SW and VOUT node can increase noise immunity against the SW radiating noise across the inductor.",null,"Open"]
[10,"SW","Switched power output of the device.","Routing","Minimize the SW copper area for best noise performance. Route sensitive traces away from the SW and BOOT pins as these nets contain fast switching voltages and lend easily to capacitive coupling.",null,"Open"]
[21,"Vin","Input power to the power stage","Placement","Power-stage input bypass capacitors should be as close as physically possible to the VIN and GND pins. \n",null,"Open"]
[23,"Vin","Input power to the power stage","Placement","Additionally, a high-frequency bypass capacitor in 0402 package on the VIN pins can be placed right underneath the IC on the other side of the PCB to reduce switching spikes and associated noise.",null,"Open"]
[7,"BOOT","Bootstrap pin for the internal flying high-side driver","Placement","Place the boot resistor as close to the pin, followed by the boot capacitor. Route these separate from the SW copper plane.",null,"Open"]
[]
[]
["Controller"]
[27,"BP3","Output of the 3.3-V on-board regulator","Placement","BP3 requires good local bypassing. Place a bypass capacitor as close as possible to the BP3 pin, with a minimum return loop back to AGND and this return loop should be kept away from fast switching voltage and main current path, as well as the BP6 current path.","Poor bypassing on BP3 can degrade the performance of the regulator.","Open"]
[28,"BP6","Output of the 6-V on-board regulator","Placement","BP6 bypass capacitor carries large switching current for gate driver.  Place BP6 high frequency bypass capacitors as close as possible to the device pins, with a minimum return loop back to GND.","Bypassing the BP6 pin to GND with a low-impedance path is very critical to the stable operation of the TPS544x25 devices.","Open"]
[30,"BPEXT","External BP voltage for BP crossover function.","Placement","Place the BPEXT bypass capacitor as close to the pin as possible",null,"Open"]
[38,"AGND","Analog ground return for control circuitry.","Routing","AGND is not connected to the thermal tab or internal ground plane. Kelvin connect back to AGND pin with a low impedance, low noise path.","The AGNDSNS pin must be connected to the AGND pin to ensure accurate current monitoring. This connection must be made on an internal or bottom layer. It should not segment the thermal tab copper area.","Open"]
[38,"AGND","Analog ground return for control circuitry.","Routing","Have a large solid ground plane for AGND to minimize impedance of the plane.",null,"Open"]
[38,"AGND","Analog ground return for control circuitry.","Routing","If you draw the return current flow into GND, it should not cross the AGND copper pour. ","If the high current path through GND interferes with AGND, it will cause noise to couple into AGND and cause controller to malfunction.","Open"]
[26,"PGND","Power ground return for controller device","Routing","PGND is the ground return for the controller. This pin should be connected using a short trace from the pin to the Thermal pad beneath the IC. No other power plane connection should be made between GND and PGND or AGND. ",null,"Open"]
["14, 15, 16, 17, 18, 19, 20","GND","Power stage ground return","Routing",null,null,"Open"]
["14, 15, 16, 17, 18, 19, 20","GND","Power stage ground return","Routing","It is absolutely critical that GND (pins 13, 14, 15, 16, 17, 18, 19, and 20) be connected directly to the thermal pad underneath the device using a plane. ",null,"Open"]
[26,"PGND","Power ground return for controller device","Routing","Connect to GND at the thermal tab with a minimum of 8 mil wide PCB trace",null,"Open"]
[29,"VDD","Input Voltage for analog control circuitry.","Routing","VDD should be connected to VIN through a trace from the input copper area. To avoid high frequency noise on VDD, it is recommended to keep the VDD to VIN connection as short as possible to keep the parasitic inductance low. Optionally form a small low-pass R-C between VIN and VDD, with the VDD bypass capacitor (0.1 μF to 1.0 μF) and a 0-Ω to 2-Ω resistor between VIN and VDD.",null,"Open"]
[29,"VDD","Input Voltage for analog control circuitry.","Placement","VDD requires good local bypassing. Place bypass capacitors as close as possible to the VDD pin, with a minimum return loop back to GND. Route this loop away from fast switching voltage and main current path, as well as BP6 current path.","Poor bypassing on VDD can degrade the performance of the regulator.","Open"]
[]
[]
["PMBUS"]
["1, 4, 5","CNTL, DATA, CLK, SMBALERT","PMBus CNTL, DATA, CLK, SMBus Alert pins","Placement","Keep the pullup resistors close to the pin and route these signals away from noisy areas and other noise sensitive traces.",null,"Open"]
[3,"ADDR0","Sets low order 3-bits of the PMBus address","Placement","Keep the ADDR0 resistor local to the device and place it as close as possible to the ADDR0 pin. The resistor should be kept away from fast switching voltage and current paths.",null,"Open"]
[2,"ADDR1","Sets high order 3-bits of the PMBus address","Placement","Keep the ADDR1 resistor local to the device and place it as close as possible to the ADDR1 pin. The resistor should be kept away from fast switching voltage and current paths.",null,"Open"]
[]
[]
["Misc"]
[null,"Thermal Pad","Power ground pad","Routing","Connect to PCB ground plane using multiple vias for good thermal and electrical performance.",null,"Open"]
[null,"Cin, Cout, L, IC",null,"Placement","Place the power components (including input/output capacitors, output inductor, and IC device) on one side of the PCB (solder side). At least one or two inner layers/planes should be inserted, connecting to power ground, in order to shield and isolate the small signal traces from noisy power lines.",null,"Open"]
[null,"VDD, BP, VIN, GND, AGND, PGND",null,"Routing","Ensure to provide GND vias for each decoupling capacitor and make the loop as small as possible","If this loop area is large, it can sometimes manifest as ground bounce leading to load regulation issues.","Open"]

{"sheet":"Small Signal","index":4,"n_rows":212,"n_cols":47,"rows_kept":212,"cut":false,"hidden":true,"merged":[]}
[null,"Values for plotting","From design equations","Units",{"$f":"AND(E2:E17)","v":true},null,"Anticipated type 3 ea phase","Anticipated type 2 ea phase","find phase >65","find gain > 0","find phase > 0","freq","s=2*pi*freq*i","power stage gain","power stage phase","overall gain","overall phase","Gain-dB","Phase Degrees","DCM Peak CMC complex","DCM Gain-dB","DCM Phase-Degrees","Compensation Complex","Comp Gain","Comp Phase","Cff Complex","CCM Full Loop Complex","CCM Full Loop Gain-dB","CCM Full Loop Phase-Degrees","DCM Full Loop Complex","DCM Full Loop Gain-dB","DCM Full Loop Phase-Degrees",null,"Zcer(s)","Zload(s)","Zesr(s)","Zcr(s)","Ze(s)","Zl(s)","Vo(s)/Vc(s) New Equivalent Circuit","Gain New Equivalent Circuit","Phase New Equivalent Circuit",null,"Ze(s) Vin_max","Vo(s)/Vc(s) New Equivalent Circuit Vin_max","Gain New Equivalent Circuit Vin_max","Phase New Equivalent Circuit Vin_max"]
["Vin",{"$f":"C2","v":9.5},{"$f":"Vin_nom","v":9.5},"V",{"$f":"B2=C2","v":true},0,{"$f":"DEGREES((ATAN(10)+ATAN(L2/(fsw_ss/6))-ATAN(L2/(fsw_ss/6*Vo_ss/Vref))-ATAN(MAX(1/10,L2/(fsw_ss/2)))))+90","v":168.57897022571163},{"$f":"DEGREES((ATAN(10)-ATAN(MAX(1/10,L2/(fsw_ss/2)))))+90","v":168.57881372500071},{"$f":"IF(fz_cff>fsw_ss/4,IF(AU2+H2>65,1,0),IF(AU2+G2>65,1,0))","v":1},{"$f":"IF(P2>0,1,0)","v":1},{"$f":"IF(Q2>0,1,0)","v":1},{"$f":"10^('Small Signal'!F2/30)","v":1},{"$f":"COMPLEX(0,L2*2*PI())","v":"6.28318530717959i"},{"$f":"IF(D$32=1, IF(AND('Small Signal'!$B$63>=1,FCCM=0),U2+0,R2+0), 0)","v":0},{"$f":"IF(D$32=1, IF(AND('Small Signal'!$B$63>=1,FCCM=0),V2,S2), 0)","v":0},{"$f":"IF(AND('Small Signal'!$B$63>=1,FCCM=0),AE2+0,AB2+0)","v":66.895064892012627},{"$f":"IF(AND('Small Signal'!$B$63>=1,FCCM=0),AF2,AC2)","v":178.40937579403175},{"$f":"AO2","v":9.0412410715600569},{"$f":"AP2","v":-1.4499276456687514E-2},{"$f":"IMDIV(IMSUM('Small Signal'!$B$76,IMPRODUCT(M2,'Small Signal'!$B$77)),IMSUM(IMPRODUCT('Small Signal'!$B$80,IMPOWER(M2,2)),IMSUM(IMPRODUCT(M2,'Small Signal'!$B$79),'Small Signal'!$B$78)))","v":"4.27268360522576-0.000737371265922736i"},{"$f":"20*LOG(IMABS(T2))","v":12.614014814185705},{"$f":"(180/PI())*IMARGUMENT(T2)","v":-9.8879919403557365E-3},{"$f":"IMPRODUCT(IMDIV(IMSUM(IMPRODUCT(M2,'Small Signal'!$B$59*'Small Signal'!$B$6*'Small Signal'!$B$51*'Small Signal'!$B$7*'Small Signal'!$B$8),'Small Signal'!$B$59*'Small Signal'!$B$6*'Small Signal'!$B$51),IMSUM(IMSUM(IMPRODUCT(M2,('Small Signal'!$B$5+'Small Signal'!$B$6)*('Small Signal'!$B$58*'Small Signal'!$B$59)+'Small Signal'!$B$5*'Small Signal'!$B$59*('Small Signal'!$B$8+'Small Signal'!$B$9)+'Small Signal'!$B$6*'Small Signal'!$B$59*('Small Signal'!$B$8+'Small Signal'!$B$9)+'Small Signal'!$B$7*'Small Signal'!$B$8*('Small Signal'!$B$5+'Small Signal'!$B$6)),'Small Signal'!$B$6+'Small Signal'!$B$5),IMPRODUCT(IMPOWER(M2,2),'Small Signal'!$B$58*'Small Signal'!$B$59*'Small Signal'!$B$8*'Small Signal'!$B$7*('Small Signal'!$B$5+'Small Signal'!$B$6)+('Small Signal'!$B$5+'Small Signal'!$B$6)*('Small Signal'!$B$9*'Small Signal'!$B$8*'Small Signal'!$B$59*'Small Signal'!$B$7)))),-1)","v":"-780.776669391438+21.4849559554042i"},{"$f":"IF(D$33=1, 20*LOG(IMABS(Z2))+20*LOG(IMABS(W2)), 0)","v":0},{"$f":"IF(D$33=1, (180/PI())*IMARGUMENT(Z2)+(180/PI())*IMARGUMENT(W2), 0)","v":0},{"$f":"IMDIV(COMPLEX(1,IMABS(M2)/(2*PI()*fz_cff)),COMPLEX(1,IMABS(M2)/(2*PI()*fp_cff)))","v":"1.00000000001295+1.90365233571851E-06i"},{"$f":"IMPRODUCT(AN2,W2,Z2)","v":"-2210.98535517208+61.3963300771209i"},{"$f":"20*LOG(IMABS(AA2))","v":66.895064892012627},{"$f":"(180/PI())*IMARGUMENT(AA2)","v":178.40937579403175},{"$f":"IMPRODUCT(T2,W2)","v":"-3335.9958322624+92.3741413507652i"},{"$f":"20*LOG(IMABS(AD2))","v":70.467838634510059},{"$f":"(180/PI())*IMARGUMENT(AD2)","v":178.41387800730362},null,{"$f":"IMSUM(ESR_ss,IMDIV(1,IMPRODUCT(Co_ss,M2)))","v":"0.00075-497.359197162172i"},{"$f":"Ro","v":0.14000000000000001},{"$f":"IMSUM(ESR2_ss,IMDIV(1,IMPRODUCT(Co2_ss,M2)))","v":"1000-159154943091.895i"},{"$f":"IMDIV(1,(IMSUM(IMDIV(1,AH2),IMDIV(1,AI2),IMDIV(1,AJ2))))","v":"0.139999988847708-0.0000394081352137418i"},{"$f":"IMDIV(IMPRODUCT(Re,IMDIV(1,IMPRODUCT(Ce,M2))),IMSUM(Re,IMDIV(1,IMPRODUCT(Ce,M2))))","v":"1.02794354386595-0.0000032208771114733i"},{"$f":"IMSUM(Rdc_ss,IMPRODUCT(Lo_ss,M2))","v":"0.006+5.57946855277548E-06i"},{"$f":"IMDIV(IMPRODUCT(AK2,AL2),IMPRODUCT(Ri,IMSUM(AL2,AK2,AM2)))","v":"2.83179649363496-0.000716614756892897i"},{"$f":"20*LOG(IMABS(AN2))","v":9.0412410715600569},{"$f":"(180/PI())*IMARGUMENT(AN2)","v":-1.4499276456687514E-2},null,{"$f":"IMDIV(IMPRODUCT(Re_vimax,IMDIV(1,IMPRODUCT(Ce,M2))),IMSUM(Re_vimax,IMDIV(1,IMPRODUCT(Ce,M2))))","v":"1.01809513614215-0.0000031594563086865i"},{"$f":"IMDIV(IMPRODUCT(AK2,AR2),IMPRODUCT(Ri,IMSUM(AR2,AK2,AM2)))","v":"2.82839379780539-0.0007150628127936i"},{"$f":"20*LOG(IMABS(AS2))","v":9.0307978023394497},{"$f":"(180/PI())*IMARGUMENT(AS2)","v":-1.4485281511625725E-2}]
["Vout",{"$f":"C3","v":0.77},{"$f":"Vout","v":0.77},"V",{"$f":"B3=C3","v":true},1,168.57898271058124,168.57881372500071,1,{"$f":"IF(P3>0,1,0)","v":1},1,{"$f":"10^('Small Signal'!F3/30)","v":1.0797751623277096},{"$f":"COMPLEX(0,L3*2*PI())","v":"6.78442743499492i"},{"$f":"IF(D$32=1, IF(AND('Small Signal'!$B$63>=1,FCCM=0),U3+0,R3+0), 0)","v":0},{"$f":"IF(D$32=1, IF(AND('Small Signal'!$B$63>=1,FCCM=0),V3,S3), 0)","v":0},{"$f":"IF(AND('Small Signal'!$B$63>=1,FCCM=0),AE3+0,AB3+0)","v":66.894513415852046},{"$f":"IF(AND('Small Signal'!$B$63>=1,FCCM=0),AF3,AC3)","v":178.2825559474264},{"$f":"AO3","v":9.0412410268331787},-1.5655958536731896E-2,{"$f":"IMDIV(IMSUM('Small Signal'!$B$76,IMPRODUCT(M3,'Small Signal'!$B$77)),IMSUM(IMPRODUCT('Small Signal'!$B$80,IMPOWER(M3,2)),IMSUM(IMPRODUCT(M3,'Small Signal'!$B$79),'Small Signal'!$B$78)))","v":"4.2726835883705-0.000796195176017008i"},{"$f":"20*LOG(IMABS(T3))","v":12.614014801381314},{"$f":"(180/PI())*IMARGUMENT(T3)","v":-1.0676808095639539E-2},{"$f":"IMPRODUCT(IMDIV(IMSUM(IMPRODUCT(M3,'Small Signal'!$B$59*'Small Signal'!$B$6*'Small Signal'!$B$51*'Small Signal'!$B$7*'Small Signal'!$B$8),'Small Signal'!$B$59*'Small Signal'!$B$6*'Small Signal'!$B$51),IMSUM(IMSUM(IMPRODUCT(M3,('Small Signal'!$B$5+'Small Signal'!$B$6)*('Small Signal'!$B$58*'Small Signal'!$B$59)+'Small Signal'!$B$5*'Small Signal'!$B$59*('Small Signal'!$B$8+'Small Signal'!$B$9)+'Small Signal'!$B$6*'Small Signal'!$B$59*('Small Signal'!$B$8+'Small Signal'!$B$9)+'Small Signal'!$B$7*'Small Signal'!$B$8*('Small Signal'!$B$5+'Small Signal'!$B$6)),'Small Signal'!$B$6+'Small Signal'!$B$5),IMPRODUCT(IMPOWER(M3,2),'Small Signal'!$B$58*'Small Signal'!$B$59*'Small Signal'!$B$8*'Small Signal'!$B$7*('Small Signal'!$B$5+'Small Signal'!$B$6)+('Small Signal'!$B$5+'Small Signal'!$B$6)*('Small Signal'!$B$9*'Small Signal'!$B$8*'Small Signal'!$B$59*'Small Signal'!$B$7)))),-1)","v":"-780.678102830831+23.1959762841502i"},0,0,"1.0000000000151+2.05551650980019E-06i",{"$f":"IMPRODUCT(AN3,W3,Z3)","v":"-2210.70367877224+66.2858147782105i"},{"$f":"20*LOG(IMABS(AA3))","v":66.894513415852046},{"$f":"(180/PI())*IMARGUMENT(AA3)","v":178.2825559474264},{"$f":"IMPRODUCT(T3,W3)","v":"-3335.57204924109+99.7306393250159i"},{"$f":"20*LOG(IMABS(AD3))","v":70.467287190250687},178.2874173254468,null,"0.00075-460.61366709899i",0.14000000000000001,"1000-147396373471.677i","0.139999986997382-0.0000425519250320449i",{"$f":"IMDIV(IMPRODUCT(Re,IMDIV(1,IMPRODUCT(Ce,M3))),IMSUM(Re,IMDIV(1,IMPRODUCT(Ce,M3))))","v":"1.02794354386428-3.47782310587303E-06i"},"0.006+6.02457156227549E-06i",{"$f":"IMDIV(IMPRODUCT(AK3,AL3),IMPRODUCT(Ri,IMSUM(AL3,AK3,AM3)))","v":"2.83179646400898-0.00077378280748008i"},{"$f":"20*LOG(IMABS(AN3))","v":9.0412410268331787},{"$f":"(180/PI())*IMARGUMENT(AN3)","v":-1.5655958536731896E-2},null,"1.01809513614053-3.41150244857383E-06i",{"$f":"IMDIV(IMPRODUCT(AK3,AR3),IMPRODUCT(Ri,IMSUM(AR3,AK3,AM3)))","v":"2.82839376827851-0.000772107056824443i"},{"$f":"20*LOG(IMABS(AS3))","v":9.030797757718549},{"$f":"(180/PI())*IMARGUMENT(AS3)","v":-1.5640847142844569E-2}]
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["TPS54020 (ILIM=NC)",4.5,17,10,200000,1200000,15.1,165,0.6,"Hiccup/Cycle-by-cycle",6,100,8,6,2.2999999999999998,1.22,1.17,1300,20,0,10000000,{"$f":"10^((LOG(fsw_select)-LOG(42533.5))/-0.964356)","v":103.96595611598944},{"$f":"42533.5*(Rt)^-(0.964356)","v":491.72862906623999},9,1.1499999999999999,3.3]
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["TPS54320",4.5,17,3,200000,1600000,6.2,135,0.8,"Hiccup",6,100,57,50,2.2999999999999998,1.21,1.17,1300,12,1,10000000,{"$f":"48000*(fsw_select)^-(0.997)-2","v":99.289024776090073},{"$f":"43660*(Rt)^-(0.973)+2","v":486.97099391022454},6.75,1.1499999999999999,3.4]
["TPS54418",2.95,6,4,200000,2000000,6.4,120,0.80300000000000005,"Frequency Foldback",7,60,30,30,1.8,1.25,1.18,225,13,1,7000000,{"$f":"311890/((fsw_select)^(1.0793))","v":395.7779736306623},{"$f":"133870*(Rt)^-(0.9393)","v":1737.8213244259935},8.4,0.65,{"$f":"3.2-0.65","v":2.5500000000000003}]
["TPS54424",4.5,17,4,200000,1600000,6.8,130,0.6,"Hiccup",6.5,200,14,6,5,1.2,1.1499999999999999,1100,{"$f":"16.52*1.4","v":23.127999999999997},1,10000000,{"$f":"58650*(fsw_select)^-(1.028)","v":102.18650312267914},{"$f":"43660*(Rt)^-(0.973)","v":484.97099391022454},6,1.2,3.6]
["TPS54478",2.95,6,4,200000,2000000,6.5,120,0.6,"Hiccup",6,110,30,30,2.2000000000000002,1.3,1.21,225,14,1,7000000,{"$f":"90066/((fsw_select)^(1.135))","v":81.00788293844397},{"$f":"23439*(Rt)^-(0.8813)","v":397.88699798819499},8.4,0.6,{"$f":"3.4-Y9","v":2.8}]
["TPS54521",4.5,17,5,200000,900000,9,135,0.8,"Hiccup",6,100,57,50,2.2999999999999998,1.21,1.17,1300,12,1,10000000,{"$f":"60728*(fsw_select)^-(1.033)","v":102.58783140285695},{"$f":"43660*(Rt)^-(0.973)+2","v":486.97099391022454},6.75,{"$f":"Y6","v":1.1499999999999999},{"$f":"Z6","v":3.4}]
["TPS54620",4.5,17,6,200000,1600000,11,135,0.8,"Cycle-by-cycle",6,100,26,19,2.2999999999999998,1.21,1.17,1300,16,1,10000000,{"$f":"48000*(fsw_select)^-(0.997)-2","v":99.289024776090073},{"$f":"43660*(Rt)^-(0.973)+2","v":486.97099391022454},9,1.1499999999999999,3.4]
["TPS54622",4.5,17,6,200000,1600000,11,145,0.6,"Hiccup",6,100,26,19,2.2999999999999998,1.21,1.17,1300,16,1,10000000,{"$f":"48000*(fsw_select)^-(0.997)-2","v":99.289024776090073},{"$f":"43660*(Rt)^-(0.973)+2","v":486.97099391022454},9,1.1499999999999999,3.3]
["TPS54622-EP",4.5,17,6,200000,1600000,11,145,0.6,"Hiccup",6,100,26,19,2.2999999999999998,1.21,1.17,1300,16,1,10000000,67.932409419235967,703.47533503199588,9,1.1499999999999999,3.3]
["TPS54623",4.5,17,6,200000,1600000,11,145,0.6,"Hiccup",6,100,26,19,2.2999999999999998,1.21,1.17,1300,16,0,10000000,{"$f":"48000*(fsw_select)^-(0.997)-2","v":99.289024776090073},{"$f":"43660*(Rt)^-(0.973)+2","v":486.97099391022454},9,1.1499999999999999,3.3]
["TPS54678",2.95,6,6,200000,2000000,10.5,110,0.6,"Hiccup",7,70,12,12,2.2000000000000002,1.3,1.18,245,20,1,7000000,{"$f":"56183/((fsw_select)^(1.052))","v":84.39581777288916},{"$f":"23439*(Rt)^-(0.8813)","v":397.88699798819499},10,0.7,2.8]
["TPS54821",4.5,17,8,200000,1600000,14.5,145,0.6,"Hiccup",6,100,26,19,2.2999999999999998,1.21,1.17,1300,21,1,10000000,{"$f":"48000*(fsw_select)^-(0.997)-2","v":99.289024776090073},{"$f":"43660*(Rt)^-(0.973)+2","v":486.97099391022454},9,1.1499999999999999,3.3]
["TPS54824",4.5,17,8,200000,1600000,12.9,145,0.6,"Hiccup",6.5,100,14,6,5,1.2,1.1499999999999999,1100,23.1,1,10000000,{"$f":"58650*(fsw_select)^-(1.028)","v":102.18650312267914},{"$f":"43660*(Rt)^-(0.973)","v":484.97099391022454},8,1.2,3.6]
["TPS54A24",4.5,17,10,200000,1600000,14.6,145,0.6,"Hiccup",6.5,200,21,8,5,1.2,1.1499999999999999,1100,23.1,1,10000000,{"$f":"58650*(fsw_select)^-(1.028)","v":102.18650312267914},{"$f":"43660*(Rt)^-(0.973)","v":484.97099391022454},10,1.2,3.6]

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[null,"Enter resistor value",100,null,"E6",null,"E96",null,null,"Cap value",8.2000000000000006E-8,"pF"]
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[null,"Closest E6 Value",{"$f":"(IF((10^(LOG(C3)-INT(LOG(C3)))*100)-VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E6_s:E6_f,1)<VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E6_s:E6_f,2)-(10^(LOG(C3)-INT(LOG(C3)))*100),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E6_s:E6_f,1),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E6_s:E6_f,2)))*10^INT(LOG(C3))/100","v":100},null,150,220,102,105]
[null,"Closest E12 Value",{"$f":"(IF((10^(LOG(C3)-INT(LOG(C3)))*100)-VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E12_s:E12_f,1)<VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E12_s:E12_f,2)-(10^(LOG(C3)-INT(LOG(C3)))*100),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E12_s:E12_f,1),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E12_s:E12_f,2)))*10^INT(LOG(C3))/100","v":100},null,220,330,105,107,null,"C values up to 10nF"]
[null,"Closest E24 Value",{"$f":"(IF((10^(LOG(C3)-INT(LOG(C3)))*100)-VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E24_s:E24_f,1)<VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E24_s:E24_f,2)-(10^(LOG(C3)-INT(LOG(C3)))*100),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E24_s:E24_f,1),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E24_s:E24_f,2)))*10^INT(LOG(C3))/100","v":100},null,330,470,107,110,null,1,1.2,{"$f":"IF((10^(LOG(K3)-INT(LOG(K3))))-VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),c_s1:C_f1,1)<VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),c_s1:C_f1,2)-(10^(LOG(K3)-INT(LOG(K3)))),VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),c_s1:C_f1,1),VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),c_s1:C_f1,2))","v":8.1999999999999993}]
[null,"Closest E48 Value",{"$f":"(IF((10^(LOG(C3)-INT(LOG(C3)))*100)-VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E48_s:E48_f,1)<VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E48_s:E48_f,2)-(10^(LOG(C3)-INT(LOG(C3)))*100),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E48_s:E48_f,1),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E48_s:E48_f,2)))*10^INT(LOG(C3))/100","v":100},null,470,680,110,113,null,1.2,1.5]
[null,"Closest E96 Value",{"$f":"(IF((10^(LOG(C3)-INT(LOG(C3)))*100)-VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E96_s:E96_f,1)<VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E96_s:E96_f,2)-(10^(LOG(C3)-INT(LOG(C3)))*100),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E96_s:E96_f,1),VLOOKUP((10^(LOG(C3)-INT(LOG(C3)))*100),E96_s:E96_f,2)))*10^INT(LOG(C3))/100","v":100},null,680,1000,113,115,null,1.5,1.8,null,null,null,null,"Notes:","If I use the value in column K it rounds up"]
[null,null,null,null,"E12",null,115,118,null,1.8,2.2000000000000002,null,null,null,null,null,"If I use the value in column J it rounds down"]
[null,null,null,null,100,120,118,121,null,2.2000000000000002,2.7]
[null,null,null,null,120,150,121,124,null,2.7,3.3]
[null,null,null,null,150,180,124,127,null,3.3,3.9]
[null,null,null,null,180,220,127,130,null,3.9,4.7]
[null,null,null,null,220,270,130,133,null,4.7,5.6]
[null,null,null,null,270,330,133,137,null,5.6,6.8]
[null,null,null,null,330,390,137,140,null,6.8,8.1999999999999993]
[null,null,null,null,390,470,140,143,null,8.1999999999999993,10]
[null,null,null,null,470,560,143,147,null,"C values greater than 10nF"]
[null,null,null,null,560,680,147,150,null,1,1.5,{"$f":"IF((10^(LOG(K3)-INT(LOG(K3))))-VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),C_s2:C_f2,1)<VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),C_s2:C_f2,2)-(10^(LOG(K3)-INT(LOG(K3)))),VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),C_s2:C_f2,1),VLOOKUP((10^(LOG(K3)-INT(LOG(K3)))),C_s2:C_f2,2))","v":6.8}]
[null,null,null,null,680,820,150,154,null,1.5,2.2000000000000002]
[null,null,null,null,820,1000,154,158,null,2.2000000000000002,3.3]
[null,null,null,null,"E24",null,158,162,null,3.3,4.7]
[null,null,null,null,100,110,162,165,null,4.7,6.8]
[null,null,null,null,110,120,165,169,null,6.8,10]
[null,null,null,null,120,130,169,174]
[null,null,null,null,130,150,174,178]
[null,null,null,null,150,160,178,182]
[null,null,null,null,160,180,182,187]
[null,null,null,null,180,200,187,191]
[null,null,null,null,200,220,191,196]
[null,null,null,null,220,240,196,200]
[null,null,null,null,240,270,200,205]
[null,null,null,null,270,300,205,210]
[null,null,null,null,300,330,210,215]
[null,null,null,null,330,360,215,221]
[null,null,null,null,360,390,221,226]
[null,null,null,null,390,430,226,232]
[null,null,null,null,430,470,232,237]
[null,null,null,null,470,510,237,243]
[null,null,null,null,510,560,243,249]
[null,null,null,null,560,620,249,255]
[null,null,null,null,620,680,255,261]
[null,null,null,null,680,750,261,267]
[null,null,null,null,750,820,267,274]
[null,null,null,null,820,910,274,280]
[null,null,null,null,910,1000,280,287]
[null,null,null,null,"E48",null,287,294]
[null,null,null,null,100,105,294,301]
[null,null,null,null,105,110,301,309]
[null,null,null,null,110,115,309,316]
[null,null,null,null,115,121,316,324]
[null,null,null,null,121,127,324,332]
[null,null,null,null,127,133,332,340]
[null,null,null,null,133,140,340,348]
[null,null,null,null,140,147,348,357]
[null,null,null,null,147,154,357,365]
[null,null,null,null,154,162,365,374]
[null,null,null,null,162,169,374,383]
[null,null,null,null,169,178,383,392]
[null,null,null,null,178,187,392,402]
[null,null,null,null,187,196,402,412]
[null,null,null,null,196,205,412,422]
[null,null,null,null,205,215,422,432]
[null,null,null,null,215,226,432,442]
[null,null,null,null,226,237,442,453]
[null,null,null,null,237,249,453,464]
[null,null,null,null,249,261,464,475]
[null,null,null,null,261,274,475,487]
[null,null,null,null,274,287,487,499]
[null,null,null,null,287,301,499,511]
[null,null,null,null,301,316,511,523]
[null,null,null,null,316,332,523,536]
[null,null,null,null,332,348,536,549]
[null,null,null,null,348,365,549,562]
[null,null,null,null,365,383,562,576]
[null,null,null,null,383,402,576,590]
[null,null,null,null,402,422,590,604]
[null,null,null,null,422,442,604,619]
[null,null,null,null,442,464,619,634]
[null,null,null,null,464,487,634,649]
[null,null,null,null,487,511,649,665]
[null,null,null,null,511,536,665,681]
[null,null,null,null,536,562,681,698]
[null,null,null,null,562,590,698,715]
[null,null,null,null,590,619,715,732]
[null,null,null,null,619,649,732,750]
[null,null,null,null,649,681,750,768]
[null,null,null,null,681,715,768,787]
[null,null,null,null,715,750,787,806]
[null,null,null,null,750,787,806,825]
[null,null,null,null,787,825,825,845]
[null,null,null,null,825,866,845,866]
[null,null,null,null,866,909,866,887]
[null,null,null,null,909,953,887,909]
[null,null,null,null,953,1000,909,931]
[null,null,null,null,null,null,931,953]
[null,null,null,null,null,null,953,976]
[null,null,null,null,null,null,976,1000]

{"sheet":"Extra","index":7,"n_rows":5,"n_cols":2,"rows_kept":5,"cut":false,"hidden":true,"merged":[]}
[]
[null,"Validation Options"]
[null,"Open"]
[null,"Complete"]
[null,"Not Applicable"]

{"sheet":"revisionNotes","index":8,"n_rows":5,"n_cols":2,"rows_kept":5,"cut":false,"hidden":false,"merged":[]}
["Date","Comment"]
["2020-08-13","Correct en divider calculations"]
["2020-09-03","Clarified recommended inductor value"]
["2020-09-30","Added macros to use single excel sheet for multiple schematics"]
["2021-10-14","Updated TPS54521 max fsw to 900kHz"]

{"sheet":"Disclaimer","index":9,"n_rows":6,"n_cols":1,"rows_kept":6,"cut":false,"hidden":false,"merged":[]}
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