.ALIASES
X_U1            U1(VIN=N02622 UVLO=N04985 OVLO=N06654 TIMER=N01002 GND=0 PWR=N00904 PGD=N10275 OUT=N02548 GATE=N02984 SENSE=N03768
+) CN @LM5069.SCHEMATIC1(sch_1):INS46@LM5069.LM5069-2_TRANS_2.Normal(chips)
R_R1            R1(1=N00904 2=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS137@ANALOG.R.Normal(chips)
C_C1            C1(1=N01002 2=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS204@ANALOG.C.Normal(chips)
D_D2            D2(1=0 2=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS378@EDIODE.BAV20.Normal(chips)
D_D3            D3(1=0 2=N02984 ) CN @LM5069.SCHEMATIC1(sch_1):INS415@BREAKOUT.DbreakZ.Normal(chips)
R_R2            R2(1=N02622 2=N03768 ) CN @LM5069.SCHEMATIC1(sch_1):INS1905@ANALOG.R.Normal(chips)
C_C2            C2(1=N02622 2=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS2596@ANALOG.C.Normal(chips)
X_U5            U5(D=N03768 G=N02984 S=N02548 ) CN @LM5069.SCHEMATIC1(sch_1):INS2829@SUP70060E_PS_REV_A.SUP70060E.Normal(chips)
D_D4            D4(1=N03620 2=N02622 ) CN @LM5069.SCHEMATIC1(sch_1):INS3355@EDIODE.BAV20.Normal(chips)
R_R3            R3(1=N03620 2=N02984 ) CN @LM5069.SCHEMATIC1(sch_1):INS3452@ANALOG.R.Normal(chips)
C_C3            C3(1=0 2=N04130 ) CN @LM5069.SCHEMATIC1(sch_1):INS4054@ANALOG.C.Normal(chips)
C_C4            C4(+=N04130 -=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS4081@ANALOG.C_elect.Normal(chips)
C_C5            C5(+=N04130 -=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS4101@ANALOG.C_elect.Normal(chips)
R_R4            R4(1=N04985 2=N02622 ) CN @LM5069.SCHEMATIC1(sch_1):INS4965@ANALOG.R.Normal(chips)
R_R5            R5(1=N06654 2=N09204 ) CN @LM5069.SCHEMATIC1(sch_1):INS6618@ANALOG.R.Normal(chips)
R_R6            R6(1=0 2=N06654 ) CN @LM5069.SCHEMATIC1(sch_1):INS6634@ANALOG.R.Normal(chips)
C_C6            C6(1=0 2=N02622 ) CN @LM5069.SCHEMATIC1(sch_1):INS6839@ANALOG.C.Normal(chips)
V_V1            V1(+=N02622 -=0 ) CN @LM5069.SCHEMATIC1(sch_1):INS7568@SOURCE.VDC.Normal(chips)
X_U6            U6(D=N04130 G=N02984 S=N02548 ) CN @LM5069.SCHEMATIC1(sch_1):INS9246@SIDR870ADP_PS_REVA.SIDR870ADP.Normal(chips)
.ENDALIASES
