.ALIASES
R_R9            R9(1=N128094 2=N128090 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS128042@ANALOG.R.Normal(chips)
R_R10           R10(1=0 2=N128094 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS128064@ANALOG.R.Normal(chips)
R_R8            R8(1=N128090 2=IIN ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS128022@ANALOG.R.Normal(chips)
C_C1            C1(1=0 2=IIN ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135298@ANALOG.C.Normal(chips)
V_V1            V1(+=IIN -=0 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135323@SOURCE.VDC.Normal(chips)
C_C2            C2(1=0 2=VTIMER  ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135348@ANALOG.C.Normal(chips)
R_R11           R11(1=0 2=N135483 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135373@ANALOG.R.Normal(chips)
D_D1            D1(1=N136012 2=IIN ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135407@EDIODE.1N4148.Normal(chips)
D_D2            D2(1=0 2=0 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135423@EDIODE.1N4148.Normal(chips)
R_R12           R12(1=IIN 2=N136091 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135898@ANALOG.R.Normal(chips)
R_R13           R13(1=N136012 2=VGATE ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS135914@ANALOG.R.Normal(chips)
R_R14           R14(1=N136544 2=N136506 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS136490@ANALOG.R.Normal(chips)
C_C3            C3(1=0 2=VOUT ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS136740@ANALOG.C.Normal(chips)
C_C4            C4(1=0 2=VOUT ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS136756@ANALOG.C.Normal(chips)
R_R15           R15(1=VOUT 2=0 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS137189@ANALOG.R.Normal(chips)
X_U4            U4(D=N136091 G=VGATE S=N136506 ) CN
+@LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS137677@SUP70060E_PS_REV_A.SUP70060E.Normal(chips)
X_U5            U5(D=VOUT G=VGATE S=N136506 ) CN
+@LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS138687@SIDR870ADP_PS_RC_REVA.SiDR870ADP_PS_RC.Normal(chips)
X_U6            U6(VIN=IIN UVLO=N128090 OVLO=N128094 TIMER=VTIMER  GND=0 PWR=N135483 PGD=N136544 OUT=N136506 GATE=VGATE
+SENSE=N136091 ) CN @LM5069_CAPACITOR.SCHEMATIC1(sch_1):INS140880@LM5069-2_TRANS.LM5069-2_TRANS.Normal(chips)
_    _(Iin=IIN)
_    _(Vgate=VGATE)
_    _(Vout=VOUT)
_    _(Vtimer =VTIMER )
.ENDALIASES
