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PD2 Communication Engine Tests

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1

TDA.2.1.1.1

TDA.2.1.1.1 BMC PHY TX EYE

2

TDA.2.1.1.2

TDA.2.1.1.2 BMC PHY TX BIT

3

TDA.2.1.2.2

TDA.2.1.2.2 BMC PHY RX INT REJ

4

TDA.2.1.2.1

TDA.2.1.2.1 BMC PHY RX BUSIDL

5

TDA.2.1.3.1

TDA.2.1.3.1 BMC PHY TERM

6

TDA.2.1.3.2

TDA.2.1.3.2 BMC PHY MSG

7

TDA.2.2.1

TDA.2.2.1 BMC PROT SEQ GETCAPS

8

TDA.2.2.3

TDA.2.2.3 BMC PROT SEQ DRSWAP

9

TDA.2.2.4

TDA.2.2.4 BMC PROT SEQ VCSWAP DFP

10

TDA.2.2.6

TDA.2.2.6 BMC PROT SEQ PRSWAP

11

TDA.2.2.7

TDA.2.2.7 BMC PROT BIST NOT 5V SRC

12

TDA.2.2.8

TDA.2.2.8 BMC PROT REV NUM

13

TDA.2.2.9

TDA.2.2.9 BMC PROT GSC REC

14

TDA.2.3.1.1

TDA.2.3.1.1 POW SRC LOAD P PC

15

TDA.2.3.2.1

TDA.2.3.2.1 POW SRC TRANS P PC

  FAIL

   1. TDA.2.1.1.1 BMC PHY TX EYE (Click to View Protocol Trace)

  PASS

 TDA.2.1.1.1 BMC PHY TX EYE-1:

                    Valid Protocol response for BIST Request

  PASS

 TDA.2.1.1.1 BMC PHY TX EYE-2:

                    Valid BIST response pattern

  FAIL

 TDA.2.1.1.1 BMC PHY TX EYE-3:

                    Failed at all crossing points.

  PASS

 TDA.2.1.1.1 BMC PHY TX EYE-4:

                    BIST pattern duration 45.2698241 mS [Limit : (30 ~ 60)ms]

  PASS

 BMC_PHY_TX_EYE_5:

                    Rise time:
                    Average value = 462.792161 nS
                    Minimum value = 458.501623 nS
                    Maximum value = 466.726935 nS
                    Minimum Limit = 300 ns
                    
                    Fall time:
                    Average value = 424.262774 nS
                    Minimum value = 421.197101 nS
                    Maximum value = 427.953571 nS
                    Minimum Limit = 300 ns
                    

  PASS

   2. TDA.2.1.1.2 BMC PHY TX BIT (Click to View Protocol Trace)

  PASS

 TDA.2.1.1.2 BMC PHY TX BIT-1:

                    Valid Protocol response for BIST Request

  PASS

 TDA.2.1.1.2 BMC PHY TX BIT-2:

                    Valid BIST response pattern

  PASS

 TDA.2.1.1.2 BMC PHY TX BIT-3:

                    Bit Rate is 300.821 Kbps. Test limit (270 ~ 330) Kbps
                    

  PASS

 TDA.2.1.1.2 BMC PHY TX BIT-4:

                    Bit Rate is 0.154 %. Test limit: X < 0.25%
                    

  PASS

 TDA.2.1.1.2 BMC PHY TX BIT-5:

                    BIST pattern duration 45.2698238 mS [Limit : (30 ~ 60)ms]

  FAIL

  3. TDA.2.1.2.2 BMC PHY RX INT REJ

  PASS

 TDA.2.1.2.2 BMC PHY RX INT REJ_4_TstrSink:

  PASS

 TDA.2.1.2.2 BMC PHY RX INT REJ_2_TstrSinkNoiseGrp1:

                    Total Sent BIST Test Data messages Count: 13362; Received GoodCRC: = 13362 )

  FAIL

 TDA.2.1.2.2 BMC PHY RX INT REJ_5_TstrSinkNoiseGrp3:

                    Total Sent BIST Test Data messages Count: 30; Received GoodCRC: = 0 )

  PASS

   4. TDA.2.1.2.1 BMC PHY RX BUSIDL (Click to View Protocol Trace)

  PASS

 TDA.2.1.2.1 BMC PHY RX BUSIDL1_TstrSink:

  PASS

 TDA.2.1.2.1 BMC PHY RX BUSIDL2_TstrSink:

  PASS

 TDA.2.1.2.1 BMC PHY RX BUSIDL3_TstrSink:

  PASS

   5. TDA.2.1.3.1 BMC PHY TERM (Click to View Protocol Trace)

  PASS

 TDA.2.1.3.1 BMC PHY TERM_1:

  PASS

 TDA.2.1.3.1 BMC PHY TERM_2:

                     CC-line voltage = 1.828V

  PASS

   6. TDA.2.1.3.2 BMC PHY MSG (Click to View Protocol Trace)

  NA

 TDA.2.1.3.2 BMC PHY MSG_SOPs_BIST_1:

  PASS

                               BMC_PHY_MSG_1:

  NA

                               BMC_PHY_MSG_2:

                                        Vendor Specifies DUT responds to SOP' when DFP mode, Hence skipped this test.

  NA

                               BMC_PHY_MSG_3:

                                        Vendor Specifies DUT responds to SOP'' when DFP mode, Hence skipped this test.

  PASS

                               BMC_PHY_MSG_4:

  PASS

                               BMC_PHY_MSG_5:

  PASS

 TDA.2.1.3.2 BMC PHY MSG_PHY_ERR_2:

  PASS

                               BMC_PHY_MSG_6:

  PASS

                               BMC_PHY_MSG_7:

  PASS

                               BMC_PHY_MSG_8:

  PASS

                               BMC_PHY_MSG_9:

  PASS

                               BMC_PHY_MSG_10:

  PASS

                               BMC_PHY_MSG_11:

  PASS

 TDA.2.1.3.2 BMC PHY MSG_MsgID_init_3:

                    Message-ID initialization for Get_Sink_Cap is incremented.
                    Message-ID initialization for Get_Sink_Cap is incremented.

  PASS

                               BMC_PHY_MSG_12:

                                        Message-ID initialization for Get_Sink_Cap is incremented.

  PASS

                               BMC_PHY_MSG_13:

                                        Message-ID initialization for Get_Sink_Cap is incremented.

  PASS

 TDA.2.1.3.2 BMC PHY MSG_MsgID_Cable_Reset_4:

  PASS

                               BMC_PHY_MSG_15:

  PASS

 TDA.2.1.3.2 BMC PHY MSG_MsgID_Rpt_5:

  PASS

                               BMC_PHY_MSG_18:

  PASS

 TDA.2.1.3.2 BMC PHY MSG_MsgID_HardRst_6:

  PASS

                               BMC_PHY_MSG_16:

  PASS

 TDA.2.1.3.2 BMC PHY MSG_MsgID_SoftRst_7:

  PASS

                               BMC_PHY_MSG_14:

  PASS

 TDA.2.1.3.2 BMC PHY MSG_CRCCheck_8:

  PASS

                               BMC_PHY_MSG_19:

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

   7. TDA.2.2.1 BMC PROT SEQ GETCAPS (Click to View Protocol Trace)

  PASS

 TDA.2.2.1 BMC PROT SEQ GETCAPS_GetSourceCap_UUT_Type-(Source):

  PASS

                               TDA.2.2.1 BMC PROT SEQ GETCAPS_GetSourceCap_UUT_Type-(Source)_(1):

                                        Protocol Index # #31

  PASS

                               TDA.2.2.1 BMC PROT SEQ GETCAPS_GetSourceCap_UUT_Type-(Source)_(2):

  PASS

 TDA.2.2.1 BMC PROT SEQ GETCAPS_GetSinkCap_UUT-Type-(Source):

  PASS

                               TDA.2.2.1 BMC PROT SEQ GETCAPS_GetSinkCap_UUT-Type-(Source)_(3):

                                        DUT responded with reject message at protocol index # #43

  PASS

                               TDA.2.2.1 BMC PROT SEQ GETCAPS_GetSinkCap_UUT-Type-(Source)_(4):

  FAIL

   8. TDA.2.2.3 BMC PROT SEQ DRSWAP (Click to View Protocol Trace)

  FAIL

 TDA.2.2.3 BMC PROT SEQ DRSWAP_DR-SwapDUTSrc_1_2:

                    DUT accepted data role swap message
                    DUT accepted data role swap message

  FAIL

 TDA.2.2.3 BMC PROT SEQ DRSWAP_DRSwapDUTSrc_3_4:

                    DUT accepted data role swap message
                    DUT accepted data role swap message

  PASS

   9. TDA.2.2.4 BMC PROT SEQ VCSWAP DFP (Click to View Protocol Trace)

  PASS

 PT_TDA_2_2_4_BMC_PROT_SEQ_VCSWAP_DFP_DUT_Src_1_2:

  PASS

 PT_TDA_2_2_4_BMC_PROT_SEQ_VCSWAP_DFP_DUT_Src_3_4:

  PASS

 TDA_2_2_4_BMC_PROT_SEQ_VCSWAP_DFPDUT_Src_7:

  PASS

   10. TDA.2.2.6 BMC PROT SEQ PRSWAP (Click to View Protocol Trace)

  PASS

 BMC_PROT_SEQ_SWAP_REJ_1:

  FAIL

   11. TDA.2.2.7 BMC PROT BIST NOT 5V SRC (Click to View Protocol Trace)

                    DUT responded with Accept message for Request message. Actual time interval is: 4.738ms
                    DUT sent unexpected message(Hard Reset ). Please verify the protocol capture and confirm failure

  PASS

                               PROT_PROC_GCRC_UUT_1:

  NA

   12. TDA.2.2.8 BMC PROT REV NUM (Click to View Protocol Trace)

                     This test is not applicable for DUT's with Spec Rev 3 and above

  PASS

   13. TDA.2.2.9 BMC PROT GSC REC (Click to View Protocol Trace)

  PASS

 TDA.2.2.9 BMC PROT GSC REC_Get_SrcCap:

  FAIL

   14. TDA.2.3.1.1 POW SRC LOAD P PC (Click to View Protocol Trace)

                    DUT message response missing. Verify protocol capture and confirm the failure
                    

  FAIL

 Power Rules Check:

                    PDOs not matched with VIF
                    DUT advertised source power profile (PDP) : (19.98) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (19.95) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (20) was higher than the claimed source power(15 W )
                    Maximum offered power by DUT (20 W) is higher than the maximum power claimed by vendor in VIF(15 w)

  WARNING

 Power Source Load test - PDO#1, 5.0V @ 3.00A:

  WARNING

 Tester sends Request message for PDO#1 transition:

                    DUT responded with Accept message for Request message. Actual time interval is: 4.714ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 85.058ms
                    PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].
                    PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]

  WARNING

                               PROT_PROC_REQ_TSTR_6:

                                        Validate the slew rate manually

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

 Load set to 0.00A: PASS Vbus voltage before load 5.125V, and after Load: 5.125V , Limit:[4.750-5.500V] at Protocol index #41[ Measurement after timestamp37.8082093S]:

  PASS

 Load set to 750. mA: PASS Vbus voltage before load 5.128V, and after load 5.030V, Limit:[4.75-5.5V] at Protocol index #48 [Measurement after timestamp :38.5581299S]:

  PASS

 Load set to 1.50A: PASS Vbus voltage before load 5.009V, and after load 4.936V, Limit:[4.75-5.5V] at Protocol index #55 [Measurement after timestamp :39.3081761S]:

  PASS

 Load set to 2.25A: PASS Vbus voltage before load 4.923V, and after load 4.850V, Limit:[4.75-5.5V] at Protocol index #62 [Measurement after timestamp :40.0584195S]:

  PASS

 Load set to 3.00A: PASS Vbus voltage before load 4.831V, and after load 4.763V, Limit:[4.75-5.5V] at Protocol index #69 [Measurement after timestamp :40.8084124S]:

  PASS

 Load set to 2.25A: PASS Vbus voltage before load 4.772V, and after load 4.833V, Limit:[4.75-5.5V] at Protocol index #77 [Measurement after timestamp :41.5583712S]:

  PASS

 Load set to 1.50A: PASS Vbus voltage before load 4.861V, and after load 4.920V, Limit:[4.75-5.5V] at Protocol index #85 [Measurement after timestamp :42.3083038S]:

  PASS

 Load set to 750. mA: PASS Vbus voltage before load 4.951V, and after load 5.009V, Limit:[4.75-5.5V] at Protocol index #93 [Measurement after timestamp :43.0582330S]:

  PASS

 Load set to 0.00A: PASS Vbus voltage before load 5.051V, and after Load: 5.129V , Limit:[4.750-5.500V] at Protocol index #101[ Measurement after timestamp43.8084113S]:

  PASS

 Power Source Load test - PDO#2, 9.0V @ 2.22A:

  PASS

 Tester sends Request message for PDO#2 transition from 5.0V to 9.0V:

                    DUT responded with Accept message for Request message. Actual time interval is: 4.708ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 104.063ms
                    PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].
                    PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 26.4mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

 Load set to 0.00A: PASS Vbus voltage before load 9.230V, and after Load: 9.230V , Limit:[8.550-9.450V] at Protocol index #116[ Measurement after timestamp69.6751797S]:

  PASS

 Load set to 555. mA: PASS Vbus voltage before load 9.231V, and after load 9.050V, Limit:[8.55-9.45V] at Protocol index #123 [Measurement after timestamp :70.4252140S]:

  PASS

 Load set to 1.11A: PASS Vbus voltage before load 9.018V, and after load 8.940V, Limit:[8.55-9.45V] at Protocol index #130 [Measurement after timestamp :71.1751902S]:

  PASS

 Load set to 1.67A: PASS Vbus voltage before load 8.929V, and after load 8.859V, Limit:[8.55-9.45V] at Protocol index #137 [Measurement after timestamp :71.9252467S]:

  PASS

 Load set to 2.22A: PASS Vbus voltage before load 8.841V, and after load 8.839V, Limit:[8.55-9.45V] at Protocol index #144 [Measurement after timestamp :72.6752801S]:

  PASS

 Load set to 1.67A: PASS Vbus voltage before load 8.871V, and after load 8.950V, Limit:[8.55-9.45V] at Protocol index #152 [Measurement after timestamp :73.4254308S]:

  PASS

 Load set to 1.11A: PASS Vbus voltage before load 8.944V, and after load 8.928V, Limit:[8.55-9.45V] at Protocol index #160 [Measurement after timestamp :74.1753018S]:

  PASS

 Load set to 555. mA: PASS Vbus voltage before load 8.964V, and after load 9.019V, Limit:[8.55-9.45V] at Protocol index #168 [Measurement after timestamp :74.9251993S]:

  PASS

 Load set to 0.00A: PASS Vbus voltage before load 9.095V, and after Load: 9.233V , Limit:[8.550-9.450V] at Protocol index #176[ Measurement after timestamp75.6753447S]:

  WARNING

 Power Source Load test - PDO#3, 15.V @ 1.33A:

  WARNING

 Tester sends Request message for PDO#3 transition from 9.0V to 15.V:

                    DUT responded with Accept message for Request message. Actual time interval is: 4.712ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 99.846ms
                    PASS: Measured VBUS voltage at request message: 9.23V. Expected range[8.55V ~ 9.45V].
                    PASS: Measured VBUS voltage at Accept message: 9.23V. Expected range[8.55V ~ 9.45V]
                    PASS: Measured VBUS voltage at PS_RDY 15.19V. Expected range[14.25V ~ 15.75V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 9.23V. Expected range[8.55V ~ 9.45V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 9.23V. Expected range[8.55V ~ 9.45V]

  WARNING

                               PROT_PROC_REQ_TSTR_6:

                                        Validate the slew rate manually

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 15.19V. Expected range[14.25V ~ 15.75V]

  PASS

 Load set to 0.00A: PASS Vbus voltage before load 15.19V, and after Load: 15.19V , Limit:[14.25-15.75V] at Protocol index #191[ Measurement after timestamp101.526340S]:

  PASS

 Load set to 333. mA: PASS Vbus voltage before load 15.19V, and after load 14.99V, Limit:[14.25-15.75V] at Protocol index #198 [Measurement after timestamp :102.276402S]:

  PASS

 Load set to 665. mA: PASS Vbus voltage before load 14.94V, and after load 14.89V, Limit:[14.25-15.75V] at Protocol index #205 [Measurement after timestamp :103.026421S]:

  PASS

 Load set to 998. mA: PASS Vbus voltage before load 14.89V, and after load 14.85V, Limit:[14.25-15.75V] at Protocol index #212 [Measurement after timestamp :103.776263S]:

  PASS

 Load set to 1.33A: PASS Vbus voltage before load 14.83V, and after load 14.79V, Limit:[14.25-15.75V] at Protocol index #219 [Measurement after timestamp :104.526311S]:

  PASS

 Load set to 998. mA: PASS Vbus voltage before load 14.80V, and after load 14.83V, Limit:[14.25-15.75V] at Protocol index #227 [Measurement after timestamp :105.276436S]:

  PASS

 Load set to 665. mA: PASS Vbus voltage before load 14.86V, and after load 14.89V, Limit:[14.25-15.75V] at Protocol index #235 [Measurement after timestamp :106.026282S]:

  PASS

 Load set to 333. mA: PASS Vbus voltage before load 14.91V, and after load 14.94V, Limit:[14.25-15.75V] at Protocol index #243 [Measurement after timestamp :106.776391S]:

  PASS

 Load set to 0.00A: PASS Vbus voltage before load 15.01V, and after Load: 15.19V , Limit:[14.25-15.75V] at Protocol index #251[ Measurement after timestamp107.526262S]:

  FAIL

 Power Source Load test - PDO#4, 20.V @ 1.00A:

                    DUT message response missing. Verify protocol capture and confirm the failure
                    

  FAIL

 Tester sends HardReset message and expects DUT to recover PD negotiation:

  FAIL

                               PROT_PROC_HR_TSTR_1:

                                        VBUS was out of range at Hardreset. Measured VBUS voltage: 0.163108579037473V. Limit[>19V.

  PASS

                               PROT_PROC_HR_TSTR_3:

                                        Vbus reached to Vsafe0V at :22.4977400 mS, Limit [<=650mS]

  FAIL

                               PROT_PROC_HR_TSTR_4:

                                        Vbus Voltage after 660ms is :5.12771V. Measured at 136.68034353s. Expected limit[<2V].

  PASS

                               PROT_PROC_HR_TSTR_5:

                                        Vbus voltage at >1s after HardReset is:5.12677V

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

 Tester sends Request message with current higher than DUT's max supported current and expects Reject response from DUT:

  PASS

 PDO#4: Max supported current 1.00A, but tester sends 1.01A and expects Reject message:

  FAIL

   15. TDA.2.3.2.1 POW SRC TRANS P PC (Click to View Protocol Trace)

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_1:

                    PDOs not matched with VIF
                    DUT advertised source power profile (PDP) : (19.98) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (19.95) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (20) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (19.98) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (19.95) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (19.98) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (20) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (19.95) was higher than the claimed source power(15 W )
                    DUT advertised source power profile (PDP) : (20) was higher than the claimed source power(15 W )
                    Maximum offered power by DUT (20 W) is higher than the maximum power claimed by vendor in VIF(15 w)

  WARNING

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_1_2_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.716ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 103.967ms
                    PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].
                    PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]

  WARNING

                               PROT_PROC_REQ_TSTR_6:

                                        Validate the slew rate manually

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_2_1_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.713ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 115.589ms
                    PASS: Measured VBUS voltage at request message: 9.23V. Expected range[8.55V ~ 9.45V].
                    PASS: Measured VBUS voltage at Accept message: 9.23V. Expected range[8.55V ~ 9.45V]
                    Vbus max measured slew rate for is 11935.66mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 9.23V. Expected range[8.55V ~ 9.45V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 11935.66mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_1_3_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.73ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 105.921ms
                    PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].
                    PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]
                    Vbus max measured slew rate for is 31087.7mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 15.19V. Expected range[14.25V ~ 15.75V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 31087.7mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 15.19V. Expected range[14.25V ~ 15.75V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_3_1_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.712ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 128.803ms
                    PASS: Measured VBUS voltage at request message: 15.18V. Expected range[14.25V ~ 15.75V].
                    PASS: Measured VBUS voltage at Accept message: 15.19V. Expected range[14.25V ~ 15.75V]
                    Vbus max measured slew rate for is 5557.23mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 15.18V. Expected range[14.25V ~ 15.75V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 15.19V. Expected range[14.25V ~ 15.75V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 5557.23mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_1_4_cSnkBulk_Min(1µF):

                    DUT sent unexpected message(Hard Reset ). Please verify the protocol capture and confirm failure

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_4_2_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.722ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 315.945ms
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[19V ~ 21V]
                    Vbus max measured slew rate for is 3681.19mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[19V ~ 21V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 3681.19mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_2_3_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.742ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 400.001ms
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[8.55V ~ 9.45V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[8.55V ~ 9.45V]
                    Vbus max measured slew rate for is 3263.83mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 15.18V. Expected range[14.25V ~ 15.75V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[8.55V ~ 9.45V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[8.55V ~ 9.45V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 3263.83mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 15.18V. Expected range[14.25V ~ 15.75V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_3_2_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.717ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 408.136ms
                    FAIL: Measured VBUS voltage at request message: 9.23V. Expected range[14.25V ~ 15.75V].
                    FAIL: Measured VBUS voltage at Accept message: 9.23V. Expected range[14.25V ~ 15.75V]
                    Vbus max measured slew rate for is 3217.39mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 9.23V. Expected range[14.25V ~ 15.75V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 9.23V. Expected range[14.25V ~ 15.75V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 3217.39mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_2_4_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.738ms
                    FAIL: DUT response Time:(1.68227107S),Spec Limit Time interval is:[<= 550.000000 mS]
                    FAIL: Measured VBUS voltage at request message: 15.18V. Expected range[8.55V ~ 9.45V].
                    FAIL: Measured VBUS voltage at Accept message: 15.19V. Expected range[8.55V ~ 9.45V]
                    Vbus max measured slew rate for is 901.38mv/μs expected to be < 30 mv/μs
                    FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 15.18V. Expected range[8.55V ~ 9.45V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 15.19V. Expected range[8.55V ~ 9.45V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 901.38mv/μs expected to be < 30 mv/μs

  FAIL

                               PROT_PROC_REQ_TSTR_9:

                                        FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_4_3_cSnkBulk_Min(1µF):

                    DUT sent unexpected message(Hard Reset ). Please verify the protocol capture and confirm failure

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_3_4_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.723ms
                    FAIL: DUT response Time:(1.89508935S),Spec Limit Time interval is:[<= 550.000000 mS]
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[14.25V ~ 15.75V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[14.25V ~ 15.75V]
                    Vbus max measured slew rate for is 821.75mv/μs expected to be < 30 mv/μs
                    FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[14.25V ~ 15.75V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[14.25V ~ 15.75V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 821.75mv/μs expected to be < 30 mv/μs

  FAIL

                               PROT_PROC_REQ_TSTR_9:

                                        FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_4_1_cSnkBulk_Min(1µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.724ms
                    FAIL: DUT response Time:(1.89498955S),Spec Limit Time interval is:[<= 550.000000 mS]
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].
                    FAIL: Measured VBUS voltage at Accept message: 5.12V. Expected range[19V ~ 21V]
                    Vbus max measured slew rate for is 821.82mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.12V. Expected range[19V ~ 21V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 821.82mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  WARNING

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_1_2_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.74ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 104.017ms
                    PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].
                    PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]

  WARNING

                               PROT_PROC_REQ_TSTR_6:

                                        Validate the slew rate manually

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_2_1_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.737ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 120.618ms
                    PASS: Measured VBUS voltage at request message: 9.23V. Expected range[8.55V ~ 9.45V].
                    PASS: Measured VBUS voltage at Accept message: 9.23V. Expected range[8.55V ~ 9.45V]
                    Vbus max measured slew rate for is 11604.51mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 9.23V. Expected range[8.55V ~ 9.45V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 11604.51mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_1_3_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.725ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 104.943ms
                    PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].
                    PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]
                    Vbus max measured slew rate for is 31272mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 15.19V. Expected range[14.25V ~ 15.75V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 5.13V. Expected range[4.75V ~ 5.5V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 5.13V. Expected range[4.75V ~ 5.5V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 31272mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 15.19V. Expected range[14.25V ~ 15.75V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_3_1_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.714ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 138.088ms
                    PASS: Measured VBUS voltage at request message: 15.19V. Expected range[14.25V ~ 15.75V].
                    PASS: Measured VBUS voltage at Accept message: 15.19V. Expected range[14.25V ~ 15.75V]
                    Vbus max measured slew rate for is 19024.06mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  PASS

                               PROT_PROC_REQ_TSTR_4:

                                        PASS: Measured VBUS voltage at request message: 15.19V. Expected range[14.25V ~ 15.75V].

  PASS

                               PROT_PROC_REQ_TSTR_5:

                                        PASS: Measured VBUS voltage at Accept message: 15.19V. Expected range[14.25V ~ 15.75V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 19024.06mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_1_4_cSnkBulk_Max(10µF):

                    DUT sent unexpected message(Hard Reset ). Please verify the protocol capture and confirm failure

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_4_2_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.712ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 316.094ms
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[19V ~ 21V]
                    Vbus max measured slew rate for is 2759.86mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[19V ~ 21V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 2759.86mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_2_3_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.722ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 399.808ms
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[8.55V ~ 9.45V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[8.55V ~ 9.45V]
                    Vbus max measured slew rate for is 3273.6mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 15.18V. Expected range[14.25V ~ 15.75V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[8.55V ~ 9.45V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[8.55V ~ 9.45V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 3273.6mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 15.18V. Expected range[14.25V ~ 15.75V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_3_2_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.709ms
                    DUT responded with PS_RDY message for Accept message. Actual time interval is: 408.197ms
                    FAIL: Measured VBUS voltage at request message: 9.23V. Expected range[14.25V ~ 15.75V].
                    FAIL: Measured VBUS voltage at Accept message: 9.23V. Expected range[14.25V ~ 15.75V]
                    Vbus max measured slew rate for is 3217.53mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 9.23V. Expected range[14.25V ~ 15.75V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 9.23V. Expected range[14.25V ~ 15.75V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 3217.53mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 9.23V. Expected range[8.55V ~ 9.45V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_2_4_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.735ms
                    FAIL: DUT response Time:(1.68207413S),Spec Limit Time interval is:[<= 550.000000 mS]
                    FAIL: Measured VBUS voltage at request message: 15.18V. Expected range[8.55V ~ 9.45V].
                    FAIL: Measured VBUS voltage at Accept message: 15.18V. Expected range[8.55V ~ 9.45V]
                    Vbus max measured slew rate for is 748.43mv/μs expected to be < 30 mv/μs
                    FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 15.18V. Expected range[8.55V ~ 9.45V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 15.18V. Expected range[8.55V ~ 9.45V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 748.43mv/μs expected to be < 30 mv/μs

  FAIL

                               PROT_PROC_REQ_TSTR_9:

                                        FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_4_3_cSnkBulk_Max(10µF):

                    DUT sent unexpected message(Hard Reset ). Please verify the protocol capture and confirm failure

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_3_4_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.717ms
                    FAIL: DUT response Time:(1.89411654S),Spec Limit Time interval is:[<= 550.000000 mS]
                    FAIL: Measured VBUS voltage at request message: 5.12V. Expected range[14.25V ~ 15.75V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[14.25V ~ 15.75V]
                    Vbus max measured slew rate for is 875.53mv/μs expected to be < 30 mv/μs
                    FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.12V. Expected range[14.25V ~ 15.75V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[14.25V ~ 15.75V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 875.53mv/μs expected to be < 30 mv/μs

  FAIL

                               PROT_PROC_REQ_TSTR_9:

                                        FAIL: Measured VBUS voltage at PS_RDY 5.13V. Expected range[19V ~ 21V]

  FAIL

 TDA.2.3.2.1 POW SRC TRANS P PC_Trans_4_1_cSnkBulk_Max(10µF):

                    DUT responded with Accept message for Request message. Actual time interval is: 4.726ms
                    FAIL: DUT response Time:(1.89500534S),Spec Limit Time interval is:[<= 550.000000 mS]
                    FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].
                    FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[19V ~ 21V]
                    Vbus max measured slew rate for is 588.63mv/μs expected to be < 30 mv/μs
                    PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

  PASS

                               PROT_PROC_GCRC_UUT_1:

  FAIL

                               PROT_PROC_REQ_TSTR_4:

                                        FAIL: Measured VBUS voltage at request message: 5.13V. Expected range[19V ~ 21V].

  FAIL

                               PROT_PROC_REQ_TSTR_5:

                                        FAIL: Measured VBUS voltage at Accept message: 5.13V. Expected range[19V ~ 21V]

  FAIL

                               PROT_PROC_REQ_TSTR_6:

                                        Vbus max measured slew rate for is 588.63mv/μs expected to be < 30 mv/μs

  PASS

                               PROT_PROC_REQ_TSTR_9:

                                        PASS: Measured VBUS voltage at PS_RDY 5.13V. Expected range[4.75V ~ 5.5V]

Manufacturer

TI

Model Number

TPS659xx

Serial Number

1

Test Lab

Test_Engineer

Test_Engineer

Remarks

Remarks

Date_and_Time

2025/10/22 17:01:18

GRL_USB_PD_Controller_Serial_No

GRL-C2-EPR-2024137

GRL_USB_PD_Software_Version

1.6.31.0

GRL_USB_PD_Firmware_Version

1.2.85

GRL USB-PD Ethernet Buffer Size

62K

GRL USB-PD Eload Firmware Version

1.5 / 1.5

GRL USB-PD PPS Firmware Version

4.0 / 4.0

Calibration

Calibration Expired

RX mask Power selection

Neutral Power

Device_Type

Provider Only

Cable Type

GRL_SPL_EPR_CABLE_1

Impedance (milli ohm)

0

COMMUNICATION_ENGINE_TESTS CTS Version

v1.09

USB_PD_Spec Version

Rev3.2 Ver1.1RC2

USB_Type_C_Spec Version

v2.3 Oct-2023

VIF_File_Name

TI_test.xml

Noise Pattern Generation:

Two-Tone Noise

Application mode

Informational

Disabled all Pop-up during test execution

False

Pop-up Timer

0

Rerun Enabled

False

Rerun Count

1

Rerun Iteration

0

UI Live Update

False

Execution Time(In Minutes)

18

VIF_Specification

3.33

Vendor_Name

TI

Model_Part_Number

TPS659xx

Product_Revision

1

TID

0

VIF_Product_Type

Port Product

Certification_Type

Silicon

Port_Label

0

Connector_Type

Type-C®

USB4_Supported

NO

USB_PD_Support

YES

PD_Port_Type

Provider Only

Type_C_State_Machine

SRC

Port_Battery_Powered

NO

BC_1_2_Support

None

Captive_Cable

NO

PD_Spec_Revision_Major

3

PD_Spec_Revision_Minor

2

PD_Spec_Version_Major

0

PD_Spec_Version_Minor

0

PD_Specification_Revision

Revision 3

SOP_Capable

YES

SOP_P_Capable

YES

SOP_PP_Capable

YES

SOP_P_Debug_Capable

NO

SOP_PP_Debug_Capable

NO

Manufacturer_Info_Supported_Port

NO

Chunking_Implemented_SOP

YES

Unchunked_Extended_Messages_Supported

NO

Security_Msgs_Supported_SOP

NO

Unconstrained_Power

NO

Num_Fixed_Batteries

0

Num_Swappable_Battery_Slots

0

ID_Header_Connector_Type_SOP

USB Type-C® Receptacle

USB_Comms_Capable

YES

DR_Swap_To_DFP_Supported

NO

DR_Swap_To_UFP_Supported

NO

VCONN_Swap_To_On_Supported

YES

VCONN_Swap_To_Off_Supported

YES

Responds_To_Discov_SOP_UFP

YES

Responds_To_Discov_SOP_DFP

YES

Attempts_Discov_SOP

YES

Power_Interruption_Available

DC Power Only

Data_Reset_Supported

NO

Enter_USB_Supported

NO

Type_C_Can_Act_As_Host

YES

Type_C_Can_Act_As_Device

NO

Type_C_Supports_Audio_Accessory

NO

Type_C_Is_Debug_Target_SRC

NO

RP_Value

3A

Type_C_Port_On_Hub

NO

Type_C_Power_Source

Both

Type_C_Sources_VCONN

YES

Type_C_Is_Alt_Mode_Controller

NO

Type_C_Is_Alt_Mode_Adapter

NO

Product_Total_Source_Power_mW

15000

Port_Source_Power_Type

Assured

Host_Supports_USB_Data

YES

Host_Speed

USB 2

Host_Contains_Captive_Retimer

NO

Host_Is_Embedded

YES

Host_Suspend_Supported

YES

Is_DFP_On_Hub

NO

EPR_Supported_As_Src

NO

FR_Swap_Type_C_Current_Capability_As_Initial_Sink

FR_Swap not supported

Master_Port

YES

Has_Invariant_PDOs

NO

Port_Managed_Guaranteed_Type

Managed Capability

XID_SOP

0

Data_Capable_As_USB_Host_SOP

YES

Data_Capable_As_USB_Device_SOP

NO

Product_Type_UFP_SOP

Undefined

Product_Type_DFP_SOP

Undefined

DFP_VDO_Port_Number

0

Modal_Operation_Supported_SOP

NO

USB_VID_SOP

0451

PID_SOP

0000

bcdDevice_SOP

0911

PD_Power_As_Source

15000

USB_Suspend_May_Be_Cleared

YES

Sends_Pings

NO

Num_Src_PDOs

4 Src PDOs

PD_OC_Protection

YES

PD_OCP_Method

Both

Src_PDO_Supply_Type #1

Fixed

Src_PDO_Peak_Current #1

100% IOC

Src_PDO_Voltage #1

5000 mV

Src_PDO_Max_Current #1

3000 mA

Src_PD_OCP_OC_Debounce #1

100 msec

Src_PD_OCP_OC_Threshold #1

3300 mA

Src_PD_OCP_UV_Debounce #1

100 msec

Src_PD_OCP_UV_Threshold_Type #1

Percentage

Src_PD_OCP_UV_Threshold #1

90 %

Src_PDO_Supply_Type #2

Fixed

Src_PDO_Peak_Current #2

100% IOC

Src_PDO_Voltage #2

9000 mV

Src_PDO_Max_Current #2

2230 mA

Src_PD_OCP_OC_Debounce #2

100 msec

Src_PD_OCP_OC_Threshold #2

2400 mA

Src_PD_OCP_UV_Debounce #2

100 msec

Src_PD_OCP_UV_Threshold_Type #2

Percentage

Src_PD_OCP_UV_Threshold #2

90 %

Src_PDO_Supply_Type #3

Fixed

Src_PDO_Peak_Current #3

100% IOC

Src_PDO_Voltage #3

15000 mV

Src_PDO_Max_Current #3

1340 mA

Src_PD_OCP_OC_Debounce #3

100 msec

Src_PD_OCP_OC_Threshold #3

1500 mA

Src_PD_OCP_UV_Debounce #3

100 msec

Src_PD_OCP_UV_Threshold_Type #3

Percentage

Src_PD_OCP_UV_Threshold #3

90 %

Src_PDO_Supply_Type #4

Fixed

Src_PDO_Peak_Current #4

100% IOC

Src_PDO_Voltage #4

12000 mV

Src_PDO_Max_Current #4

1670 mA

Src_PD_OCP_OC_Debounce #4

100 msec

Src_PD_OCP_OC_Threshold #4

1800 mA

Src_PD_OCP_UV_Debounce #4

100 msec

Src_PD_OCP_UV_Threshold_Type #4

Percentage

Src_PD_OCP_UV_Threshold #4

90 %

Power

20