Sl No |
Test ID |
Test Name |
Test Result |
---|---|---|---|
1 |
TEST.PD.PROT.SNK.10 |
FAIL |
Test Status |
Test Description |
---|---|
  |
  |
  |
 COMMON.PROC.BU.2: |
  |
 COMMON.PROC.BU.2 - REVISION_2_0 Rev2Snk: |
  |
                    SourceCap Packet#14 |
  |
                          UUT should respond with request - - COMMON.PROC.BU.2#1: |
  |
                                   Request Packet#16 |
  |
 COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk: |
  |
                    SourceCap Packet#48 |
  |
                          UUT should respond with request - - COMMON.PROC.BU.2#1: |
  |
                                   Request Packet#50 |
  |
 Rev2Snk: |
  |
                          First DR_Swap response check - TEST.PD.PROT.SNK.10#1: |
  |
                                   DUT sent Reject for DR_swap message at protocol index 32,In VIF DR_Swap_To_DFP_Supported field updated as YES |
  |
                          Second DR_Swap response check - TEST.PD.PROT.SNK.10#2: |
  |
                                   First DR_Swap sequence is not successful |
  |
 Rev3ChkdSnk: |
  |
                          First DR_Swap response check - TEST.PD.PROT.SNK.10#1: |
  |
                                   DUT sent Reject for DR_swap message at protocol index 72,In VIF DR_Swap_To_DFP_Supported field updated as YES |
  |
                          Second DR_Swap response check - TEST.PD.PROT.SNK.10#2: |
  |
                                   First DR_Swap sequence is not successful |
Index |
   Start time(s.ms.μs.ns) |
   Stop time(s.ms.μs.ns) |
Message Origin |
 Message |
  |
 Secondary Message |
 SOP |
 Port Type |
 Msg ID |
 PDO |
 Header(MSB to LSB) |
 Payload(LSB to MSB) |
|||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
TEST_PD_PROT_SNK_10_DR_Swap_Request |
|||||||||||||||||||
Port A Packet Details |
|||||||||||||||||||
4 |
337.878450 mS |
337.878450 mS |
T-> |
Ra_Asserted |
NONE |
NONE/NONE/R- |
0 |
Ra_CC2 |
0x0000 |
||||||||||
9 |
338.596110 mS |
338.596110 mS |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Disabled -> FSM_State_Unattached_SRC |
0x0000 |
||||||||||
10 |
339.233380 mS |
339.233380 mS |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||||||||||
11 |
340.932950 mS |
340.932950 mS |
T-> |
Attach |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|||||||||
12 |
340.949730 mS |
340.949730 mS |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC |
0x0000 |
||||||||||
13 |
491.031840 mS |
491.031840 mS |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_AttachWait_SRC -> FSM_State_Attached_SRC |
0x0000 |
||||||||||
14 |
542.662090 mS |
543.259500 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
0 |
 FS: 5V .1A; |
0x1161 |
0x0A-0x90-0x01-0x08- |
|||||||||
15 |
543.323300 mS |
543.820500 mS |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
0 |
0x0041 |
|||||||||||
16 |
547.917530 mS |
548.547540 mS |
<-D |
Request |
SOP |
UFP/Sink/R2 |
0 |
PDO#1 Fixed; OpCurrent = 0A; MaxCurrent = 0A |
0x1042 |
0x00-0x00-0x00-0x13- |
|||||||||
17 |
548.591740 mS |
549.061140 mS |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
0 |
0x0121 |
|||||||||||
18 |
549.138940 mS |
549.608350 mS |
T-> |
Accept |
SOP |
DFP/Source/R2 |
1 |
0x0363 |
|||||||||||
19 |
549.671950 mS |
550.169350 mS |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
1 |
0x0241 |
|||||||||||
20 |
870.344610 mS |
870.814020 mS |
T-> |
PS_RDY |
SOP |
DFP/Source/R2 |
2 |
0x0566 |
|||||||||||
21 |
870.877620 mS |
871.375020 mS |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
2 |
0x0441 |
|||||||||||
22 |
875.463850 mS |
875.961260 mS |
<-D |
PR_Swap |
SOP |
UFP/Sink/R2 |
1 |
0x024A |
|||||||||||
23 |
876.008660 mS |
876.478060 mS |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
1 |
0x0321 |
|||||||||||
24 |
876.539860 mS |
877.009260 mS |
T-> |
Reject |
SOP |
DFP/Source/R2 |
3 |
0x0764 |
|||||||||||
25 |
878.968680 mS |
879.438080 mS |
T-> |
Reject |
SOP |
DFP/Source/R2 |
3 |
0x0764 |
|||||||||||
26 |
879.492880 mS |
879.990290 mS |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
3 |
0x0641 |
|||||||||||
30 |
1.840.934.047 |
1.841.403.088 |
T-> |
DR_Swap |
SOP |
DFP/Source/R2 |
4 |
0x0969 |
|||||||||||
31 |
1.841.458.068 |
1.841.956.008 |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
4 |
0x0841 |
|||||||||||
32 |
1.846.048.031 |
1.846.545.052 |
<-D |
Reject |
SOP |
UFP/Sink/R2 |
2 |
0x0444 |
|||||||||||
33 |
1.846.592.012 |
1.847.061.052 |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
2 |
0x0521 |
|||||||||||
34 |
5.845.173.072 |
5.845.173.072 |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Attached_SRC -> FSM_State_Disabled |
0x0000 |
||||||||||
35 |
5.845.174.017 |
5.845.174.017 |
T-> |
Detach |
NONE |
NONE/NONE/- |
0 |
NONE |
0x0000 |
||||||||||
36 |
5.848.182.033 |
5.848.182.033 |
<-D |
NONE |
LOAD_CURRENT |
NONE |
NONE/NONE/R- |
0 |
LOAD_CURRENT:0A |
0x0000 |
|||||||||
37 |
6.846.880.060 |
6.846.880.060 |
T-> |
Ra_Asserted |
NONE |
NONE/NONE/R- |
0 |
Ra_CC2 |
0x0000 |
||||||||||
42 |
6.847.593.057 |
6.847.593.057 |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Disabled -> FSM_State_Unattached_SRC |
0x0000 |
||||||||||
43 |
6.864.702.097 |
6.864.702.097 |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||||||||||
44 |
6.866.402.061 |
6.866.402.061 |
T-> |
Attach |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|||||||||
45 |
6.866.419.032 |
6.866.419.032 |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC |
0x0000 |
||||||||||
46 |
7.016.501.044 |
7.016.501.044 |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_AttachWait_SRC -> FSM_State_Attached_SRC |
0x0000 |
||||||||||
48 |
7.072.888.021 |
7.073.485.061 |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
0 |
 FS: 5V .1A; |
0x11A1 |
0x0A-0x90-0x01-0x08- |
|||||||||
49 |
7.073.537.001 |
7.074.034.041 |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
0 |
0x0041 |
|||||||||||
50 |
7.078.126.065 |
7.078.756.065 |
<-D |
Request |
SOP |
UFP/Sink/R3 |
0 |
PDO#1 Fixed; OpCurrent = 0A; MaxCurrent = 0A |
0x1082 |
0x00-0x00-0x80-0x13- |
|||||||||
51 |
7.078.801.085 |
7.079.271.025 |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
0 |
0x0121 |
|||||||||||
52 |
7.080.885.007 |
7.081.354.047 |
T-> |
Accept |
SOP |
DFP/Source/R3 |
1 |
0x03A3 |
|||||||||||
53 |
7.081.418.027 |
7.081.915.051 |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
1 |
0x0241 |
|||||||||||
54 |
7.402.887.054 |
7.403.356.095 |
T-> |
PS_RDY |
SOP |
DFP/Source/R3 |
2 |
0x05A6 |
|||||||||||
55 |
7.403.420.055 |
7.403.917.095 |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
2 |
0x0441 |
|||||||||||
57 |
7.403.956.027 |
7.403.956.027 |
T-> |
Rp_Asserted |
Rp_4_7k_3A_Asserted |
NONE |
NONE/NONE/R- |
0 |
Rp_4_7k_3A_Asserted |
0x0000 |
|||||||||
58 |
7.411.601.061 |
7.412.099.001 |
<-D |
PR_Swap |
SOP |
UFP/Sink/R3 |
1 |
0x028A |
|||||||||||
59 |
7.412.145.021 |
7.412.614.062 |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
1 |
0x0321 |
|||||||||||
60 |
7.413.886.003 |
7.414.355.043 |
T-> |
Reject |
SOP |
DFP/Source/R3 |
3 |
0x07A4 |
|||||||||||
61 |
7.414.410.023 |
7.414.907.064 |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
3 |
0x0641 |
|||||||||||
65 |
8.348.891.097 |
8.348.891.097 |
T-> |
Rp_Asserted |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/R- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|||||||||
66 |
8.349.760.016 |
8.349.760.016 |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||||||||||
70 |
8.370.891.079 |
8.371.361.020 |
T-> |
DR_Swap |
SOP |
DFP/Source/R3 |
4 |
0x09A9 |
|||||||||||
71 |
8.371.415.080 |
8.371.913.020 |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
4 |
0x0841 |
|||||||||||
72 |
8.376.016.043 |
8.376.513.084 |
<-D |
Reject |
SOP |
UFP/Sink/R3 |
2 |
0x0484 |
|||||||||||
73 |
8.376.559.004 |
8.377.028.044 |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
2 |
0x0521 |
|||||||||||
75 |
8.377.092.086 |
8.377.092.086 |
T-> |
Rp_Asserted |
Rp_4_7k_3A_Asserted |
NONE |
NONE/NONE/R- |
0 |
Rp_4_7k_3A_Asserted |
0x0000 |
|||||||||
77 |
10.368.896.000 |
10.368.896.000 |
T-> |
Rp_Asserted |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/R- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|||||||||
78 |
10.368.939.008 |
10.368.939.008 |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||||||||||
80 |
12.389.189.004 |
12.389.189.004 |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Attached_SRC -> FSM_State_Disabled |
0x0000 |
||||||||||
81 |
12.389.190.000 |
12.389.190.000 |
T-> |
Detach |
NONE |
NONE/NONE/- |
0 |
NONE |
0x0000 |
||||||||||
82 |
12.392.193.005 |
12.392.193.005 |
<-D |
NONE |
LOAD_CURRENT |
NONE |
NONE/NONE/R- |
0 |
LOAD_CURRENT:0A |
0x0000 |
AMS Index |
AMS Name |
AMS Start |
AMS Stop |
AMS Status |
Child AMS Count |
---|---|---|---|---|---|
0 |
Power_Negotiation |
14 |
21 |
COMPLETE |
0 |
1 |
Power_Role_Swap |
22 |
26 |
COMPLETE |
0 |
2 |
Data_Role_Swap |
30 |
33 |
COMPLETE |
0 |
3 |
Power_Negotiation |
48 |
55 |
COMPLETE |
0 |
4 |
Power_Role_Swap |
58 |
61 |
COMPLETE |
0 |
5 |
Data_Role_Swap |
70 |
73 |
COMPLETE |
0 |
Manufacturer |
TI |
Model Number |
TPS659xx |
Serial Number |
1 |
Test Lab |
|
Test_Engineer |
Test_Engineer |
Remarks |
Remarks |
Date_and_Time |
2023/11/23 16:33:55 |
Parameter |
Value |
---|---|
GRL_USB_PD_Controller_Serial_No |
GRL-C2-EPR-2022098 |
GRL_USB_PD_Software_Version |
1.6.19.0 |
GRL_USB_PD_Firmware_Version |
1.1.72 |
GRL USB-PD Ethernet Buffer Size |
62K |
GRL USB-PD Eload Firmware Version |
1.5 / 1.5 |
GRL USB-PD PPS Firmware Version |
4.0 / 4.0 |
Board Calibration |
Calibration Success |
RX mask Power selection |
Neutral Power |
Device_Type |
DRP |
Cable Type |
GRL_SPL_EPR_CABLE_1 |
Impedance (milli ohm) |
12 |
PD_Merged CTS Version |
v.Q4-2023 |
VIF_File_Name |
TI__TPS659xx__1__0-1123-01.xml |
Noise Pattern Generation: |
Two-Tone Noise |
Application mode |
Informational |
Disabled all Pop-up during test execution |
False |
Pop-up Timer |
0 |
Execution Time(In Minutes) |
4 |
Parameter |
Value |
---|---|
Connect EPR Test Fixture |
False |
FR_Swap AUTO Box Connected |
False |