C2-EPR Compliance Test Report



Power Delivery 3.1 Tests- Result Summary

Sl No

Test ID

Test Name

Test Result

1

TEST.PD.USB4.DRST.6

TEST.PD.USB4.DRST.6 –Data_Reset command response of DFP UUT, UFP Sourcing Vconn

FAIL

Power Delivery 3.1 Tests - Detailed Test Result

Test Status

Test Description

  FAIL

  1. TEST.PD.USB4.DRST.6 –Data_Reset command response of DFP UUT, UFP Sourcing Vconn

  PASS

 COMMON.PROC.BU.1:

  PASS

 COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:

  PASS

                          First source capability timer - COMMON.PROC.BU.1#1:

 

                                   Vbus up time: 0.687s and Sourcecap time: 0.803s
                                   [PASS] Max = 250ms. Obtained time difference is 115.822ms

  PASS

                          DUT responded with accept message - COMMON.PROC.BU.1#2:

 

                                   Packet#28

  PASS

                          tSrcTransReq timer check - COMMON.PROC.BU.1#3:

 

                                   [PASS] Max = 325ms. Obtained time difference is 36.149ms
                                    Packet#30

  FAIL

 Rev3ChkdSrc:

  PASS

                          VCONN_Swap command response check - TEST.PD.USB4.DRST.6#1:

 

                                   DUT sent Accept message for VCONN_Swap message at protocol index 47
                                   Tester sent PS_RDY message upon Accept message at protocol index 49

  PASS

                          Data_Reset command response check - TEST.PD.USB4.DRST.6#2:

 

                                   UUT respond Accept to Data_Reset command at protocol index 54

  PASS

                          VCONN Reapplied check - TEST.PD.USB4.DRST.6#3:

 

                                   PS_RDY message initiated after 0.12786438s from Accept GoodCRC recieved at protocol index 56
                                   VconnReapplied voltage at PORTA_CC2_VOLTAGE is 0.181070640121483v
                                   VconnReapplied measured from time 3.97785873 to 3.98785873

  PASS

                          VCONN voltage rise check - TEST.PD.USB4.DRST.6#4:

 

                                   VCONN voltage at PORTA_CC2_VOLTAGE is 5.24314556345717v
                                   Vconn voltage measured at 3.99869198 S

  PASS

                          Vconn voltage rise time check - TEST.PD.USB4.DRST.6#5:

 

                                   Vconn voltage is reaching to valid range in 0.833250000000341 mS

  PASS

                          Data_Reset_Complete command check - TEST.PD.USB4.DRST.6#6:

 

                                   UUT not initiated any other message between Accept and Data_Reset_Complete

  PASS

                          Data_Reset_Complete VBUS voltage check - TEST.PD.USB4.DRST.6#7:

 

                                   VBUS is not changed and it is in valid range throughout the Data_Reset process. Obtained voltage is 4.98172346334444V

  PASS

                          Data_Reset_Complete command response time check - TEST.PD.USB4.DRST.6#8:

 

                                   Data_Reset_Complete message received in 0.22727555 S at protocol index 58

  PASS

                          Device discovery process check - TEST.PD.USB4.DRST.6#9:

 

                                   UUT initiated VendorDefined command at protocol index 61

  FAIL

                          Cable discovery process check - TEST.PD.USB4.DRST.6#10:

 

                                   UUT failed to respond VendorDefined command

Packet List (Click to View AMS Summary)

Index

   Start time(s.ms.μs.ns)

   Stop time(s.ms.μs.ns)

Message Origin

 Message

 

 Secondary Message

 SOP

 Port Type

 Msg ID

 PDO

 Header(MSB to LSB)

 Payload(LSB to MSB)

TEST_PD_USB4_DRST_6_Data_Reset_command_response_of_DFP_UUT_UFP_Sourcing_Vconn

Port A Packet Details

4

336.824040 mS

336.824040 mS

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

9

337.528030 mS

337.528030 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SNK

0x0000

10

362.472840 mS

362.472840 mS

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

11

367.272900 mS

367.272900 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

12

567.286590 mS

567.286590 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Unattached_SNK

0x0000

13

667.872990 mS

667.872990 mS

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

14

672.673010 mS

672.673010 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

15

789.695120 mS

790.325130 mS

<-D

VendorDefined

SOP1

NONE/DFP_UFP/R3/VdmR2/

0

 Discover ID;Initiator;

0x108F

0x01-0xA0-0x00-0xFF-

16

790.373530 mS

790.842930 mS

C->

GoodCRC

SOP1

NONE/CablePlug/R1

0

0x0101

17

796.824780 mS

797.934190 mS

C->

VendorDefined

SOP1

NONE/CablePlug/R3/VdmR2/

0

 Discover ID;ACK;

0x518F

0x41-0xA8-0x00-0xFF-0x7F-0x22-0x00-0x1C-0x00-0x00-0x00-0x00-0x00-0x00-0x03-0x00-0x52-0x28-0x08-0x00-

18

797.985990 mS

798.483190 mS

<-D

GoodCRC

SOP1

NONE/DFP_UFP/R2

0

0x0041

19

802.576820 mS

803.604830 mS

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

20

804.615240 mS

805.643050 mS

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

21

806.645850 mS

807.673660 mS

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

22

821.817420 mS

821.817420 mS

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

23

822.755120 mS

822.755120 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Attached_SNK

0x0000

24

984.590620 mS

985.618230 mS

<-D

SourceCap

SOP

DFP/Source/R3

1

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x43A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

25

985.667830 mS

986.137230 mS

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

26

987.821440 mS

988.418850 mS

T->

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0.1A; MaxCurrent = 0.1A

0x1082

0x0A-0x28-0x00-0x11-

27

988.476650 mS

988.974050 mS

<-D

GoodCRC

SOP

DFP/Source/R2

0

0x0161

28

993.066880 mS

993.564290 mS

<-D

Accept

SOP

DFP/Source/R3

2

0x05A3

29

993.610290 mS

994.079690 mS

T->

GoodCRC

SOP

UFP/Sink/R1

2

0x0401

30

1.030.229.017

1.030.726.057

<-D

PS_RDY

SOP

DFP/Source/R3

3

0x07A6

31

1.030.775.037

1.031.244.078

T->

GoodCRC

SOP

UFP/Sink/R1

3

0x0601

32

1.032.978.039

1.032.978.039

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

33

1.049.033.051

1.049.530.083

<-D

DR_Swap

SOP

DFP/Source/R3

4

0x09A9

34

1.049.578.075

1.050.048.012

T->

GoodCRC

SOP

UFP/Sink/R1

4

0x0801

35

1.051.825.013

1.052.294.054

T->

Reject

SOP

UFP/Sink/R3

1

0x0284

36

1.052.344.034

1.052.841.074

<-D

GoodCRC

SOP

DFP/Source/R2

1

0x0361

37

1.070.879.068

1.071.509.048

<-D

VendorDefined

SOP

DFP/Source/R3/VdmR2/

5

 Discover ID;Initiator;

0x1BAF

0x01-0xA0-0x00-0xFF-

38

1.071.553.028

1.072.022.069

T->

GoodCRC

SOP

UFP/Sink/R1

5

0x0A01

39

1.073.818.090

1.074.416.031

T->

VendorDefined

SOP

UFP/Sink/R3/VdmR2/

2

 Discover ID;NAK;

0x148F

0x81-0xA8-0x00-0xFF-

40

1.074.470.091

1.074.968.031

<-D

GoodCRC

SOP

DFP/Source/R2

2

0x0561

41

1.075.577.012

1.075.577.012

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

45

1.841.821.058

1.842.290.099

T->

VCONN_Swap

SOP

UFP/Sink/R3

3

0x068B

46

1.842.356.039

1.842.853.059

<-D

GoodCRC

SOP

DFP/Source/R2

3

0x0761

47

1.846.946.042

1.847.443.082

<-D

Accept

SOP

DFP/Source/R3

6

0x0DA3

48

1.847.488.082

1.847.958.023

T->

GoodCRC

SOP

UFP/Sink/R1

6

0x0C01

49

1.858.820.011

1.859.289.052

T->

PS_RDY

SOP

UFP/Sink/R3

4

0x0886

50

1.859.347.032

1.859.844.072

<-D

GoodCRC

SOP

DFP/Source/R2

4

0x0961

52

3.842.825.070

3.843.295.010

T->

Data_Reset

SOP

UFP/Sink/R3

5

0x0A8E

53

3.843.360.050

3.843.857.090

<-D

GoodCRC

SOP

DFP/Source/R2

5

0x0B61

54

3.847.946.073

3.848.443.094

<-D

Accept

SOP

DFP/Source/R3

7

0x0FA3

55

3.848.492.094

3.848.962.034

T->

GoodCRC

SOP

UFP/Sink/R1

7

0x0E01

56

3.976.826.072

3.977.296.012

T->

PS_RDY

SOP

UFP/Sink/R3

6

0x0C86

57

3.977.361.052

3.977.858.073

<-D

GoodCRC

SOP

DFP/Source/R2

6

0x0D61

58

4.076.237.089

4.076.735.029

<-D

Data_Reset_Complete

SOP

DFP/Source/R3

0

0x01AF

59

4.076.782.069

4.077.252.010

T->

GoodCRC

SOP

UFP/Sink/R1

0

0x0001

60

4.077.804.026

4.077.804.026

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

61

4.094.803.043

4.095.433.044

<-D

VendorDefined

SOP

DFP/Source/R3/VdmR2/

1

 Discover ID;Initiator;

0x13AF

0x01-0xA0-0x00-0xFF-

62

4.095.480.044

4.095.949.084

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

63

4.097.826.005

4.098.423.046

T->

VendorDefined

SOP

UFP/Sink/R3/VdmR2/

7

 Discover ID;NAK;

0x1E8F

0x81-0xA8-0x00-0xFF-

64

4.098.481.026

4.098.978.066

<-D

GoodCRC

SOP

DFP/Source/R2

7

0x0F61

65

4.099.431.031

4.099.431.031

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

66

4.244.117.031

4.244.117.031

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SNK -> FSM_State_Disabled

0x0000

67

4.244.117.077

4.244.117.077

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

68

4.247.122.088

4.247.122.088

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

AMS Summary

AMS Index

AMS Name

AMS Start

AMS Stop

AMS Status

Child AMS Count

0

Discover_Identity

15

18

COMPLETE

0

1

Power_Negotiation

19

31

COMPLETE

0

2

Data_Role_Swap

33

36

COMPLETE

0

3

Discover_Identity

37

40

COMPLETE

0

4

VCONN_Swap

45

50

COMPLETE

0

5

Data_Reset

52

59

COMPLETE

0

6

Discover_Identity

61

64

COMPLETE

0

DUT Information

Manufacturer

TI

Model Number

TPS659xx

Serial Number

1

Test Information

Test Lab

Test_Engineer

Test_Engineer

Remarks

Remarks

Date_and_Time

2023/11/23 16:34:58

Controller and Instrument Information

Parameter

Value

GRL_USB_PD_Controller_Serial_No

GRL-C2-EPR-2022098

GRL_USB_PD_Software_Version

1.6.19.0

GRL_USB_PD_Firmware_Version

1.1.72

GRL USB-PD Ethernet Buffer Size

62K

GRL USB-PD Eload Firmware Version

1.5 / 1.5

GRL USB-PD PPS Firmware Version

4.0 / 4.0

Board Calibration

Calibration Success

RX mask Power selection

Neutral Power

Device_Type

DRP

Cable Type

GRL_SPL_EPR_CABLE_1

Impedance (milli ohm)

12

PD_Merged CTS Version

v.Q4-2023

VIF_File_Name

TI__TPS659xx__1__0-1123-01.xml

Noise Pattern Generation:

Two-Tone Noise

Application mode

Informational

Disabled all Pop-up during test execution

False

Pop-up Timer

0

Execution Time(In Minutes)

5

Power Delivery 3.1 Tests Information

Parameter

Value

Connect EPR Test Fixture

False

FR_Swap AUTO Box Connected

False