C2-EPR Compliance Test Report

Test Summary - Overall

Total	PASS	FAIL	PASS Rate(%)	INCOMPLETE	NA	WARNING	NOT_SELECTED	ABORTED	NOT_EXECUTED
151	3	13	18%	0	0	0	135	0	0

Test Summary - All MOI

MOI Name	Total	PASS	FAIL	PASS Rate(%)	INCOMPLETE	NA	WARNING	NOT_SELECTED	ABORTED	NOT_EXECUTED
Power Delivery 3.1 Tests	151	3	13	18%	0	0	0	135	0	0

Power Delivery 3.1 Tests- Result Summary

Sl No	Test ID	Test Name	Test Result
1	TEST.PD.PHY.ALL.1	TEST.PD.PHY.ALL.1 Transmit Bit Rate and the Drift	PASS
2	TEST.PD.PHY.ALL.2	TEST.PD.PHY.ALL.2 Transmitter Eye Diagram	PASS
3	TEST.PD.PROT.ALL3.8	TEST.PD.PROT.ALL3.8 Get Revision Response	FAIL
4	TEST.PD.PROT.PORT3.1	TEST.PD.PROT.PORT3.1 Get Battery Status Response	FAIL
5	TEST.PD.PROT.PORT3.2	TEST.PD.PROT.PORT3.2 Invalid Battery Status	FAIL
6	TEST.PD.PROT.PORT3.3	TEST.PD.PROT.PORT3.3 Get Battery Cap Response	FAIL
7	TEST.PD.PROT.PORT3.4	TEST.PD.PROT.PORT3.4 Invalid Battery Capabilities Reference	FAIL
8	TEST.PD.PROT.SRC.7	TEST.PD.PROT.SRC.7 DR_Swap	FAIL
9	TEST.PD.PROT.SNK.10	TEST.PD.PROT.SNK.10 DR_Swap Request	FAIL
10	TEST.PD.VDM.SNK.1	TEST.PD.VDM.SNK.1 Discovery Process and Enter Mode	FAIL
11	TEST.PD.USB4.DRST.2	TEST.PD.USB4.DRST.2 –Data_Reset command response of UFP UUT, Invalid Sequence	FAIL
12	TEST.PD.USB4.DRST.5	TEST.PD.USB4.DRST.5 –Data_Reset command response of DFP UUT Sourcing Vconn	FAIL
13	TEST.PD.USB4.DRST.6	TEST.PD.USB4.DRST.6 –Data_Reset command response of DFP UUT, UFP Sourcing Vconn	FAIL
14	TEST.PD.USB4.EUSB.4	TEST.PD.USB4.EUSB.4 – DR_Swap after Entering USB4 Mode entry	FAIL
15	2.1	Common Checks	FAIL
16	2.2	Common Procedures	PASS

Power Delivery 3.1 Tests - Detailed Test Result

Test Status	Test Description
PASS	1. TEST.PD.PHY.ALL.1 Transmit Bit Rate and the Drift (Click to View Protocol Trace)
	1/1 captures completed
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
PASS	Rev3ChkdSnk:
PASS	fBitRateMeas - TEST.PD.PHY.ALL.1#1:
PASS	Bit Rate-1:
	Valid Protocol response for BIST Request
PASS	Bit Rate-2:
	Valid BIST response pattern
PASS	Bit Rate-3:
	Bit Rate is 301.641 Kbps. Test limit (270 ~ 330) Kbps
PASS	pBitRateMeas - TEST.PD.PHY.ALL.1#2:
PASS	Bit Rate-4:
	Bit Rate is 0.003 %. Test limit: X < 0.25%
PASS	tBISTContMode Limits validation - TEST.PD.PHY.ALL.1#3:
PASS	Bit Rate-5:
	BIST pattern duration 45.0501400 mS (Limit <= 60ms)
PASS	2. TEST.PD.PHY.ALL.2 Transmitter Eye Diagram (Click to View Protocol Trace)
	1/1 captures completed
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
PASS	Rev3ChkdSnk:
PASS	fBitRateMeas - TEST.PD.PHY.ALL.2#1:
PASS	Eye diagram-1:
	Valid Protocol response for BIST Request
PASS	Eye diagram-2:
	Valid BIST response pattern
PASS	Eye diagram-3:
	Eye diagram plot passed at Mid Crossing Level.
PASS	pBitRateMeas - TEST.PD.PHY.ALL.2#2:
PASS	Eye diagram-4:
	BIST pattern duration 45.0371500 mS (Limit <= 60ms)
PASS	BMC_PHY_TX_EYE_5:
	Rise time: Average value = 415.409674 nS Minimum value = 411.618131 nS Maximum value = 419.486216 nS Minimum Limit = 300 ns Fall time: Average value = 486.877219 nS Minimum value = 479.538709 nS Maximum value = 492.187171 nS Minimum Limit = 300 ns
FAIL	3. TEST.PD.PROT.ALL3.8 Get Revision Response (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
FAIL	Rev3ChkdSnk:
FAIL	Get_Revision response check - TEST.PD.PROT.ALL3.8#1:
	UUT responded with Not_Supported message for Tester's Get_Revision message
PASS	Revision message details check - TEST.PD.PROT.ALL3.8#2:
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 3.303s and Sourcecap time: 3.418s [PASS] Max = 250ms. Obtained time difference is 114.989ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#74
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.153ms Packet#76
FAIL	Rev3ChkdSrc:
FAIL	Get_Revision response check - TEST.PD.PROT.ALL3.8#1:
	UUT responded with Not_Supported message for Tester's Get_Revision message
PASS	Revision message details check - TEST.PD.PROT.ALL3.8#2:
FAIL	4. TEST.PD.PROT.PORT3.1 Get Battery Status Response (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#16
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#18
FAIL	Rev3ChkdSnk:
FAIL	Get_Sink_Cap_Ext response check - TEST.PD.PROT.PORT3.1#1:
	UUT respond Not_Supported to Get_Sink_Cap_Ext message
PASS	Get_Battery_Status response check - TEST.PD.PROT.PORT3.1#2:
	UUT respond Not_Supported PD Message.Packet#51 UUT respond Not_Supported PD Message.Packet#59 UUT respond Not_Supported PD Message.Packet#66 UUT respond Not_Supported PD Message.Packet#73 UUT respond Not_Supported PD Message.Packet#80 UUT respond Not_Supported PD Message.Packet#87 UUT respond Not_Supported PD Message.Packet#94 UUT respond Not_Supported PD Message.Packet#101
PASS	Not_Supported message check - TEST.PD.PROT.PORT3.1#3:
	[PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 5.677s and Sourcecap time: 5.794s [PASS] Max = 250ms. Obtained time difference is 116.655ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#135
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.152ms Packet#137
PASS	Rev3ChkdSrc:
PASS	Get_SourceCap_Extended response check - TEST.PD.PROT.PORT3.1#1:
	UUT respond Not_Supported to Get_SourceCap_Extended message
PASS	Get_Battery_Status response check - TEST.PD.PROT.PORT3.1#2:
	UUT respond Not_Supported PD Message.Packet#155 UUT respond Not_Supported PD Message.Packet#160 UUT respond Not_Supported PD Message.Packet#165 UUT respond Not_Supported PD Message.Packet#170 UUT respond Not_Supported PD Message.Packet#175 UUT respond Not_Supported PD Message.Packet#180 UUT respond Not_Supported PD Message.Packet#185 UUT respond Not_Supported PD Message.Packet#190
PASS	Not_Supported message check - TEST.PD.PROT.PORT3.1#3:
	[PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0 [PASS]The values of VIF fields Num_Fixed_Batteries(Expected) : 0, Fixed_Batteries(Obtained) : 0 Num_Swappable_Battery_Slots(Expected) : 0, Hot_Swap_Batteries(Obtained) : 0
FAIL	5. TEST.PD.PROT.PORT3.2 Invalid Battery Status (Click to View Protocol Trace)
	PD mode test results doesn't have equal number of assertion
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
FAIL	Rev3ChkdSnk:
FAIL	Get_Sink_Cap_Ext response check - TEST.PD.PROT.PORT3.2#1:
	UUT not respond to Get_Sink_Cap_Ext message.
FAIL	Get_Battery_Status response check - TEST.PD.PROT.PORT3.2#2:
	UUT not respond to Get_Battery_Status message
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 3.543s and Sourcecap time: 3.658s [PASS] Max = 250ms. Obtained time difference is 115.822ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#69
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.151ms Packet#71
PASS	Rev3ChkdSrc:
PASS	Get_SourceCap_Extended response check - TEST.PD.PROT.PORT3.2#1:
	UUT respond Not_Supported to Get_SourceCap_Extended message
PASS	Not_Supported message check - TEST.PD.PROT.PORT3.2#3:
	UUT respond Not_Supported to Get_Battery_Status message.The values of VIF fields Num_Fixed_Batteries and Num_Swappable_Battery_Slots are zero.
PASS	Get_Battery_Status response check - TEST.PD.PROT.PORT3.2#2:
	UUT respond Not_Supported to Get_Battery_Status message
FAIL	6. TEST.PD.PROT.PORT3.3 Get Battery Cap Response (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3UnchkdSnk:
	SourceCap Packet#121
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#123
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 10.694s and Sourcecap time: 10.809s [PASS] Max = 250ms. Obtained time difference is 114.989ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#240
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.145ms Packet#242
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3UnchkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 15.565s and Sourcecap time: 15.68s [PASS] Max = 250ms. Obtained time difference is 114.988ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#324
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.094ms Packet#326
FAIL	Rev3ChkdSnk:
FAIL	Get_Sink_Cap_Ext check - TEST.PD.PROT.PORT3.3#1:
	UUT respond Not_Supported to Get_Sink_Cap_Ext message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.3#2:
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#0 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#1 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#2 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#3 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#4 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#5 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#6 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#7 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
FAIL	Rev3UnchkdSnk:
FAIL	Get_Sink_Cap_Ext check - TEST.PD.PROT.PORT3.3#1:
	UUT respond Not_Supported to Get_Sink_Cap_Ext message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.3#2:
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#0 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#1 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#2 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#3 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#4 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#5 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#6 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#7 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Rev3ChkdSrc:
PASS	Get_SourceCap_Extended check - TEST.PD.PROT.PORT3.3#1:
	UUT respond Not_Supported to Get_SourceCap_Extended message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.3#2:
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#0 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#1 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#2 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#3 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#4 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#5 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#6 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#7 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Rev3UnchkdSrc:
PASS	Get_SourceCap_Extended check - TEST.PD.PROT.PORT3.3#1:
	UUT respond Not_Supported to Get_SourceCap_Extended message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.3#2:
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#0 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#1 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#2 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#3 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#4 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#5 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#6 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
PASS	Get_Battery_Cap check for Battery_Cap_Ref_#7 - TEST.PD.PROT.PORT3.3#2:
	UUT respond Not_Supported to Get_Battery_Cap message The values of VIF fields Num_Fixed_Batteries 0 and Num_Swappable_Battery_Slots is 0
FAIL	7. TEST.PD.PROT.PORT3.4 Invalid Battery Capabilities Reference (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3UnchkdSnk:
	SourceCap Packet#72
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#74
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 6.45s and Sourcecap time: 6.565s [PASS] Max = 250ms. Obtained time difference is 114.989ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#142
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.115ms Packet#144
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3UnchkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 9.268s and Sourcecap time: 9.383s [PASS] Max = 250ms. Obtained time difference is 114.989ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#191
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.127ms Packet#193
FAIL	Rev3ChkdSnk:
FAIL	Get_Sink_Cap_Ext check - TEST.PD.PROT.PORT3.4#1:
	UUT respond Not_Supported to Get_Sink_Cap_Ext message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.4#2:
	UUT respond Not_Supported message
FAIL	Rev3UnchkdSnk:
FAIL	Get_Sink_Cap_Ext check - TEST.PD.PROT.PORT3.4#1:
	UUT respond Not_Supported to Get_Sink_Cap_Ext message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.4#2:
	UUT respond Not_Supported message
PASS	Rev3ChkdSrc:
PASS	Get_SourceCap_Extended check - TEST.PD.PROT.PORT3.4#1:
	UUT respond Not_Supported to Get_SourceCap_Extended message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.4#2:
	UUT respond Not_Supported message
PASS	Rev3UnchkdSrc:
PASS	Get_SourceCap_Extended check - TEST.PD.PROT.PORT3.4#1:
	UUT respond Not_Supported to Get_SourceCap_Extended message
PASS	Get_Battery_Cap check - TEST.PD.PROT.PORT3.4#2:
	UUT respond Not_Supported message
FAIL	8. TEST.PD.PROT.SRC.7 DR_Swap (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_2_0 Rev2Src:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 0.709s and Sourcecap time: 0.824s [PASS] Max = 250ms. Obtained time difference is 114.155ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#28
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.15ms Packet#30
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 7.201s and Sourcecap time: 7.316s [PASS] Max = 250ms. Obtained time difference is 115.822ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#79
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.155ms Packet#81
FAIL	Rev2Src:
PASS	DR_Swap Response Check - TEST.PD.PROT.SRC.7#1:
	UUT respond Accept to DR_Swap message and DR_Swap_To_UFP_Supported field is Yes
FAIL	DR_Swap Response Check - TEST.PD.PROT.SRC.7#2:
	UUT respond Reject to DR_Swap message and DR_Swap_To_DFP_Supported field is Yes
FAIL	Rev3ChkdSrc:
PASS	DR_Swap Response Check - TEST.PD.PROT.SRC.7#1:
	UUT respond Accept to DR_Swap message and DR_Swap_To_UFP_Supported field is Yes
FAIL	DR_Swap Response Check - TEST.PD.PROT.SRC.7#2:
	UUT respond Reject to DR_Swap message and DR_Swap_To_DFP_Supported field is Yes
FAIL	9. TEST.PD.PROT.SNK.10 DR_Swap Request (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_2_0 Rev2Snk:
	SourceCap Packet#14
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#16
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#48
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#50
FAIL	Rev2Snk:
FAIL	First DR_Swap response check - TEST.PD.PROT.SNK.10#1:
	DUT sent Reject for DR_swap message at protocol index 32,In VIF DR_Swap_To_DFP_Supported field updated as YES
PASS	Second DR_Swap response check - TEST.PD.PROT.SNK.10#2:
	First DR_Swap sequence is not successful
FAIL	Rev3ChkdSnk:
FAIL	First DR_Swap response check - TEST.PD.PROT.SNK.10#1:
	DUT sent Reject for DR_swap message at protocol index 72,In VIF DR_Swap_To_DFP_Supported field updated as YES
PASS	Second DR_Swap response check - TEST.PD.PROT.SNK.10#2:
	First DR_Swap sequence is not successful
FAIL	10. TEST.PD.VDM.SNK.1 Discovery Process and Enter Mode (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_2_0 Rev2Snk:
	SourceCap Packet#14
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#16
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#77
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#79
PASS	Rev2Snk:
PASS	Discover ID request Check - TEST.PD.VDM.SNK.1#1:
	DUT sent Responder_ACK for Discover ID at the protocol index 31
PASS	Discover ID response Check - TEST.PD.VDM.SNK.1#2:
PASS	Number of VDOs:
	Product Type is Peripheral and Number of Data Obj is 4
PASS	Data_Capable_as_USB_Host_SOP:
	VIF data : YES and DUT data : YES
PASS	Data_Capable_as_USB_Device_SOP:
	VIF data : YES and DUT data : YES
PASS	Product_Type_UFP_SOP:
	VIF data : Peripheral and DUT data : Peripheral
PASS	Modal_Operation_Supported_SOP:
	VIF data : YES and DUT data : YES
PASS	Check B25..16 is set to zero:
	B25…16 is set to zero
PASS	Cert Sat VDO Check:
	VIF data : 0 and DUT data : 0
PASS	Product VDO Check:
	VIF data : 3397 and DUT data : 3397 VIF data : 1812 and DUT data : 1812
PASS	Discover SVID request Check - TEST.PD.VDM.SNK.1#3:
	DUT sent Responder_ACK for Discover SVID
PASS	Discover SVID response Check - TEST.PD.VDM.SNK.1#4:
	Evalute the number of SVIDs in Discover SVIDs ACK message and checks against VIF fields SVID _SOP, Num_SVIDs_max_SOP: 2 and Num_SVIDs_min_SOP: 2, Number of SVIDs in the Ack message is :2
PASS	Discover Mode for each SVID - TEST.PD.VDM.SNK.1#5:
PASS	Discover Mode Check:
	UUT responded with Responder_ACK for the Discover Mode at protocol index 39 and Modal_Operation_Supported_SOP is set to YES
PASS	Discover Mode Check:
	UUT responded with Responder_ACK for the Discover Mode at protocol index 43 and Modal_Operation_Supported_SOP is set to YES
PASS	Enter and Exit Mode for each Mode - TEST.PD.VDM.SNK.1#6:
PASS	Attention Request - TEST.PD.VDM.SNK.1#7:
	UUT did not respond to Attention message
FAIL	Rev3ChkdSnk:
PASS	Discover ID request Check - TEST.PD.VDM.SNK.1#1:
	DUT sent Responder_ACK for Discover ID at the protocol index 101
FAIL	Discover ID response Check - TEST.PD.VDM.SNK.1#2:
FAIL	Number of VDOs:
	VDM_PRODUCT_Type_UFP Peripheral and VDM_PRODUCT_Type_DFP Hub and the Number of Data Object is 5
PASS	Data_Capable_as_USB_Host_SOP:
	VIF data : YES and DUT data : YES
PASS	Data_Capable_as_USB_Device_SOP:
	VIF data : YES and DUT data : YES
PASS	Product_Type_UFP_SOP:
	VIF data : Peripheral and DUT data : Peripheral
PASS	Modal_Operation_Supported_SOP:
	VIF data : YES and DUT data : YES
PASS	Product_Type_DFP_SOP :
	VIF data : Hub and DUT data : Hub
PASS	ID_Header_Connector_Type:
	VIF data : USB_Type_C_Receptacle and DUT data : USB_Type_C_Receptacle
PASS	Check B20..16 is set to zero:
	B20…16 is set to zero
PASS	Cert Sat VDO Check:
	VIF data : 0 and DUT data : 0
PASS	Product VDO Check:
	VIF data : 3397 and DUT data : 3397 VIF data : 1812 and DUT data : 1812
PASS	Discover SVID request Check - TEST.PD.VDM.SNK.1#3:
	DUT sent Responder_ACK for Discover SVID
PASS	Discover SVID response Check - TEST.PD.VDM.SNK.1#4:
	Evalute the number of SVIDs in Discover SVIDs ACK message and checks against VIF fields SVID _SOP, Num_SVIDs_max_SOP: 2 and Num_SVIDs_min_SOP: 2, Number of SVIDs in the Ack message is :2
PASS	Discover Mode for each SVID - TEST.PD.VDM.SNK.1#5:
PASS	Discover Mode Check:
	UUT responded with Responder_ACK for the Discover Mode at protocol index 112 and Modal_Operation_Supported_SOP is set to YES
PASS	Discover Mode Check:
	UUT responded with Responder_ACK for the Discover Mode at protocol index 117 and Modal_Operation_Supported_SOP is set to YES
PASS	Enter and Exit Mode for each Mode - TEST.PD.VDM.SNK.1#6:
PASS	Attention Request - TEST.PD.VDM.SNK.1#7:
	UUT did not respond to Attention message
FAIL	11. TEST.PD.USB4.DRST.2 –Data_Reset command response of UFP UUT, Invalid Sequence (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#71
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#73
PASS	Rev3ChkdSnk:
PASS	Data_Reset command response check - TEST.PD.USB4.DRST.2#1:
	UUT respond Accept to Data_Reset command at protocol index 39
PASS	Error recovery check - TEST.PD.USB4.DRST.2#3:
	UUT did error recovery at 11.6529 mS after recieving the Get_Sink_Cap
FAIL	Rev3ChkdSnk:
PASS	Data_Reset command response check - TEST.PD.USB4.DRST.2#2:
	UUT respond Accept to Data_Reset command at protocol index 95
FAIL	Error recovery check - TEST.PD.USB4.DRST.2#4:
	UUT failed to do error recovery
FAIL	12. TEST.PD.USB4.DRST.5 –Data_Reset command response of DFP UUT Sourcing Vconn (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 0.688s and Sourcecap time: 0.804s [PASS] Max = 250ms. Obtained time difference is 115.822ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#28
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.152ms Packet#30
FAIL	Rev3ChkdSrc:
PASS	Data_Reset command response check - TEST.PD.USB4.DRST.5#1:
	UUT respond Accept to Data_Reset command at protocol index 47
PASS	Accept VCONN voltage check - TEST.PD.USB4.DRST.5#2:
	VCONN voltage at PORTA_CC2_VOLTAGE is 0.0102973236153327v
FAIL	VCONN Reapplied check - TEST.PD.USB4.DRST.5#3:
	UUT keeps the Vconn below vRaReconnect upto 9.99900000000009 mS
FAIL	Vconn voltage rise check - TEST.PD.USB4.DRST.5#4:
	VCONN voltage at PORTA_CC2_VOLTAGE is 3.53562902416713v
PASS	Vconn voltage rise time check - TEST.PD.USB4.DRST.5#5:
	VCONN voltage at PORTA_CC2_VOLTAGE is 5.24345846734929v Vconn voltage is reaching to valid range in 0.833249999999897 mS
PASS	Data_Reset_Complete command check - TEST.PD.USB4.DRST.5#6:
	UUT not initiated any other message between Accept and Data_Reset_Complete
PASS	Data_Reset_Complete VBUS voltage check - TEST.PD.USB4.DRST.5#7:
	VBUS is not changed and it is in valid range throughout the Data_Reset process. Obtained voltage is 4.98259446687854V
PASS	Data_Reset_Complete command response time check - TEST.PD.USB4.DRST.5#8:
	Data_Reset_Complete message received in 0.22783416 S at protocol index 49
PASS	Data_Reset_Complete command error recovery check - TEST.PD.USB4.DRST.5#9:
PASS	Device discovery process check - TEST.PD.USB4.DRST.5#10:
	UUT initiated VendorDefined command at protocol index 52
FAIL	Cable discovery process check - TEST.PD.USB4.DRST.5#11:
	UUT failed to respond VendorDefined command
FAIL	13. TEST.PD.USB4.DRST.6 –Data_Reset command response of DFP UUT, UFP Sourcing Vconn (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.1:
PASS	COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:
PASS	First source capability timer - COMMON.PROC.BU.1#1:
	Vbus up time: 0.687s and Sourcecap time: 0.803s [PASS] Max = 250ms. Obtained time difference is 115.822ms
PASS	DUT responded with accept message - COMMON.PROC.BU.1#2:
	Packet#28
PASS	tSrcTransReq timer check - COMMON.PROC.BU.1#3:
	[PASS] Max = 325ms. Obtained time difference is 36.149ms Packet#30
FAIL	Rev3ChkdSrc:
PASS	VCONN_Swap command response check - TEST.PD.USB4.DRST.6#1:
	DUT sent Accept message for VCONN_Swap message at protocol index 47 Tester sent PS_RDY message upon Accept message at protocol index 49
PASS	Data_Reset command response check - TEST.PD.USB4.DRST.6#2:
	UUT respond Accept to Data_Reset command at protocol index 54
PASS	VCONN Reapplied check - TEST.PD.USB4.DRST.6#3:
	PS_RDY message initiated after 0.12786438s from Accept GoodCRC recieved at protocol index 56 VconnReapplied voltage at PORTA_CC2_VOLTAGE is 0.181070640121483v VconnReapplied measured from time 3.97785873 to 3.98785873
PASS	VCONN voltage rise check - TEST.PD.USB4.DRST.6#4:
	VCONN voltage at PORTA_CC2_VOLTAGE is 5.24314556345717v Vconn voltage measured at 3.99869198 S
PASS	Vconn voltage rise time check - TEST.PD.USB4.DRST.6#5:
	Vconn voltage is reaching to valid range in 0.833250000000341 mS
PASS	Data_Reset_Complete command check - TEST.PD.USB4.DRST.6#6:
	UUT not initiated any other message between Accept and Data_Reset_Complete
PASS	Data_Reset_Complete VBUS voltage check - TEST.PD.USB4.DRST.6#7:
	VBUS is not changed and it is in valid range throughout the Data_Reset process. Obtained voltage is 4.98172346334444V
PASS	Data_Reset_Complete command response time check - TEST.PD.USB4.DRST.6#8:
	Data_Reset_Complete message received in 0.22727555 S at protocol index 58
PASS	Device discovery process check - TEST.PD.USB4.DRST.6#9:
	UUT initiated VendorDefined command at protocol index 61
FAIL	Cable discovery process check - TEST.PD.USB4.DRST.6#10:
	UUT failed to respond VendorDefined command
FAIL	14. TEST.PD.USB4.EUSB.4 – DR_Swap after Entering USB4 Mode entry (Click to View Protocol Trace)
PASS	COMMON.PROC.BU.2:
PASS	COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:
	SourceCap Packet#15
PASS	UUT should respond with request - - COMMON.PROC.BU.2#1:
	Request Packet#17
FAIL	Rev3ChkdSnk:
NA	DR_Swap PD Message response check - TEST.PD.USB4.EUSB.4#1:
PASS	Tester Enter_USB PD Message response check - TEST.PD.USB4.EUSB.4#3:
	UUT respond Accept for Enter_USB PD Message
FAIL	DR_Swap PD Message response check - TEST.PD.USB4.EUSB.4#4:
	UUT respond Reject to DR_Swap PD Message
FAIL	SOP1 Enter_USB PD Message response check - TEST.PD.USB4.EUSB.4#5:
FAIL	SOP2 Enter_USB PD Message response check - TEST.PD.USB4.EUSB.4#6:
FAIL	SOP Enter_USB PD Message parameters of EUDO check - TEST.PD.USB4.EUSB.4#7:
FAIL	SOP Enter_USB PD Message response expiry time check - TEST.PD.USB4.EUSB.4#8:
FAIL	DR_Swap PD Message response check - TEST.PD.USB4.EUSB.4#9:
FAIL	Tester Enter_USB PD Message response check - TEST.PD.USB4.EUSB.4#10:
FAIL	15. Common Checks
PASS	Common_Check_PD_1_Check_Preamble - COMMON.CHECK.PD.1:
PASS	Check Preamble sequence and count - COMMON.CHECK.PD.1#1:
PASS	Common_Check_PD_2_Check_Message_Header - COMMON.CHECK.PD.2:
PASS	Check message header fields - COMMON.CHECK.PD.2#1:
FAIL	Common_Check_PD_3_Check_GoodCRC - COMMON.CHECK.PD.3:
	TEST.PD.PROT.PORT3.2: DUT Didn't send GoodCRC. Packet#41, 44,
PASS	Check goodCRC response time - COMMON.CHECK.PD.3#1:
PASS	Check goodCRC message header fields - COMMON.CHECK.PD.3#2:
FAIL	Common_Check_PD_4_Check_Atomic_Message_Sequence - COMMON.CHECK.PD.4:
FAIL	Check Atomic message sequence - COMMON.CHECK.PD.4#1:
	TEST.PD.PROT.PORT3.2: DUT response is missing. Packet#41, 44,
PASS	Common_Check_PD_5_Check_Unexpected_Messages_And_Signals - COMMON.CHECK.PD.5:
PASS	Unexpected Soft reset - COMMON.CHECK.PD.5#1:
PASS	Unexpected Hard Reset or a cable reset - COMMON.CHECK.PD.5#2:
PASS	Unexpected GotoMin - COMMON.CHECK.PD.5#3:
PASS	Unexpected messages - COMMON.CHECK.PD.5#4:
PASS	Common_Check_PD_6_Control_Message - COMMON.CHECK.PD.6:
PASS	Number of data objects in header should be zero - COMMON.CHECK.PD.6#1:
PASS	Common_Check_PD_7_Source_Capability_Message - COMMON.CHECK.PD.7:
PASS	Check Source Capability message - COMMON.CHECK.PD.7#1:
PASS	Check Source Capability message - COMMON.CHECK.PD.7#2:
PASS	Check Data Objects field - COMMON.CHECK.PD.7#3:
PASS	Check First PDO - COMMON.CHECK.PD.7#4:
PASS	Check Fixed PDO - COMMON.CHECK.PD.7#5:
PASS	Check PPS Validation - COMMON.CHECK.PD.7#6:
PASS	Check Power Rules - COMMON.CHECK.PD.7#7:
PASS	Check PDO Consistency - COMMON.CHECK.PD.7#8:
PASS	Check PDO Sequence - COMMON.CHECK.PD.7#9:
PASS	Check Fixed PDO Voltage - COMMON.CHECK.PD.7#10:
PASS	Check Variable PDO Voltage - COMMON.CHECK.PD.7#11:
PASS	Check Battery PDO Voltage - COMMON.CHECK.PD.7#12:
PASS	Common_Check_PD_8_Request_Message - COMMON.CHECK.PD.8:
PASS	Request messages fields check - COMMON.CHECK.PD.8#1:
FAIL	Common_Check_PD_9_Structured_VDM - COMMON.CHECK.PD.9:
FAIL	Structured VDM header field check - COMMON.CHECK.PD.9#1:
	TEST.PD.PROT.ALL3.8: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#61, TEST.PD.PROT.PORT3.1: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#122, TEST.PD.PROT.PORT3.2: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#56, TEST.PD.PROT.PORT3.3: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#227, 311, TEST.PD.PROT.PORT3.4: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#129, 178, TEST.PD.PROT.SRC.7: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#15, 66, 88, TEST.PD.VDM.SNK.1: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#101, 107, 112, 117, 122, 127, 132, 137, TEST.PD.USB4.DRST.5: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#15, 37, 52, TEST.PD.USB4.DRST.6: CommandVersion [b[12:11]] Obt:0 and Exp: 1. Packet#15, 37, 61,
PASS	Common_Check_PD_10_Extended_Message_Header - COMMON.CHECK.PD.10:
PASS	Check Extended Message Header - COMMON.CHECK.PD.10#1:
PASS	Common_Check_PD_11_Source_Capability_Extended_Message - COMMON.CHECK.PD.11:
PASS	Source capabilities extended message fields check - COMMON.CHECK.PD.11#1:
PASS	Common_Check_PD_12_Check_Sink_Capabilities - COMMON.CHECK.PD.12:
PASS	Sink capabilities fields check - COMMON.CHECK.PD.12#1:
PASS	Common_Check_PD_13_Check_Correct_Use_of_Rp - COMMON.CHECK.PD.13:
PASS	Rp Level Validation - COMMON.CHECK.PD.13#1:
PASS	Common_Check_PD_14_Check_Hard_Reset - COMMON.CHECK.PD.14:
PASS	Check Hard_Reset basic timing - COMMON.CHECK.PD.14#1:
PASS	Common_Check_PD_15_Check_Sink_Capabilities_Extended_Message - COMMON.CHECK.PD.15:
PASS	Sink capabilities extended message fields check - COMMON.CHECK.PD.15#1:
PASS	COMMON_CHECK_PD3_1_Check_EPR_Request_Message - COMMON.CHECK.PD3.1:
PASS	EPR_Request messages fields check - COMMON.CHECK.PD3.1#1:
PASS	COMMON_CHECK_PD3_2_Check_EPR_Mode_Message - COMMON.CHECK.PD3.2:
PASS	EPR_Mode messages fields check - COMMON.CHECK.PD3.2#1:
PASS	COMMON_CHECK_PD3_3_Check_EPR_Source_Capabilities_Message - COMMON.CHECK.PD3.3:
PASS	VIF field EPR_Supported_As_Src check - COMMON.CHECK.PD3.3#1:
PASS	First Fixed PDO consistency check - COMMON.CHECK.PD3.3#2:
PASS	Fixed PDO check - COMMON.CHECK.PD3.3#3:
PASS	Programmable Power Supply APDO check - COMMON.CHECK.PD3.3#4:
PASS	EPR PDOs power rules check - COMMON.CHECK.PD3.3#5:
PASS	EPR PDOs consistency check - COMMON.CHECK.PD3.3#6:
PASS	SPR PDOs check - COMMON.CHECK.PD3.3#7:
PASS	COMMON_CHECK_PD3_4_Check_EPR_Sink_Capabilities_Message - COMMON.CHECK.PD3.4:
PASS	EPR_Sink_Capabilities fields check - COMMON.CHECK.PD3.4#1:
PASS	16. Common Procedures
PASS	COMMON_PROC_PD_2_UUT_Sent_Get_Source_Cap - COMMON.PROC.PD.2:
PASS	Validate Get source capabilities message initiated by DUT - COMMON.PROC.PD.2#1:
PASS	DUT's Request message validation - COMMON.PROC.PD.2#2:
PASS	COMMON_PROC_PD_3_UUT_Sent_Get_Sink_Cap - COMMON.PROC.PD.3:
PASS	Validate Get sink cap message initiated by DUT - COMMON.PROC.PD.3#1:
PASS	COMMON_PROC_PD_4_UUT_Sent_Ping - COMMON.PROC.PD.4:
PASS	Ping message initiated by DUT - COMMON.PROC.PD.4#1:
PASS	COMMON_PROC_PD_5_UUT_Sent_PR_Swap - COMMON.PROC.PD.5:
PASS	PR_Swap valid condition check - COMMON.PROC.PD.5#1:
PASS	PR_Swap init and VIF field value comparison - COMMON.PROC.PD.5#2:
PASS	PR_Swap init and VIF field value comparison - COMMON.PROC.PD.5#3:
PASS	COMMON_PROC_PD_6_UUT_Sent_VCONN_Swap - COMMON.PROC.PD.6:
PASS	Vconn_Swap valid condition check - Tester Vconn Source - COMMON.PROC.PD.6#1:
PASS	Vconn_Swap init and VIF field value comparison - COMMON.PROC.PD.6#2:
PASS	tVCONNSourceOn Timer Validation - COMMON.PROC.PD.6#3:
PASS	Vconn_Swap valid condition check - DUT Vconn Source - COMMON.PROC.PD.6#4:
PASS	COMMON_PROC_PD_7_UUT_Sent_Discover_Identity_Request - COMMON.PROC.PD.7:
PASS	Validate Discover ID request message initiated by DUT - COMMON.PROC.PD.7#1:
PASS	Structured VDM Message Header check - COMMON.PROC.PD.7#2:
PASS	Tester's VDM response check - COMMON.PROC.PD.7#3:
PASS	COMMON_PROC_PD_8_UUT_Sent_Discover_SVIDs_Request - COMMON.PROC.PD.8:
PASS	Validate Discover ID request message initiated by DUT - COMMON.PROC.PD.8#1:
PASS	Structured VDM Message Header check - COMMON.PROC.PD.8#2:
PASS	Tester's VDM response check - COMMON.PROC.PD.8#3:
PASS	COMMON_PROC_PD_9_UUT_Sent_Attention - COMMON.PROC.PD.9:
PASS	Validate attention request message initiated by DUT - COMMON.PROC.PD.9#1:
PASS	Structured VDM message header check - COMMON.PROC.PD.9#2:
PASS	COMMON_PROC_PD_10_UUT_Sent_Request - COMMON.PROC.PD.10:
PASS	Validate request message initiated by DUT - COMMON.PROC.PD.10#1:
PASS	COMMON_PROC_PD_11_UUT_Sent_Source_Capabilities - COMMON.PROC.PD.11:
PASS	Validate Source capabilities message initiated by DUT - COMMON.PROC.PD.11#1:
PASS	DUT should respond with Accept - COMMON.PROC.PD.11#2:
PASS	DUT should send PS_RDY - COMMON.PROC.PD.11#3:
PASS	Wait Message - COMMON.PROC.PD.11#4:
PASS	COMMON_PROC_PD_12_UUT_Sent_DR_Swap - COMMON.PROC.PD.12:
PASS	Validate DR_Swap message initiated by DUT - COMMON.PROC.PD.12#1:
PASS	COMMON_PROC_PD_17_Tester_Sent_Vconn_swap_message - COMMON.PROC.PD.17:
PASS	VCONN present check - COMMON.PROC.PD.17#1:
PASS	PS_RDY is missing - COMMON.PROC.PD.17#2:
PASS	VCONN present check - COMMON.PROC.PD.17#3:
PASS	tVONNSourceOff timer check - COMMON.PROC.PD.17#4:
PASS	COMMON_PROC_PD3_1_Sink_Start_an_AMS - COMMON.PROC.PD3.1:
PASS	Sink Start AMS - COMMON.PROC.PD3.1#1:
PASS	COMMON_PROC_PD3_2_UUT_Sent_EPR_Source_Cap_message - COMMON.PROC.PD3.2:
PASS	Validate EPR Source capabilities message initiated by DUT - COMMON.PROC.PD3.2#1:
PASS	DUT should respond with Accept - COMMON.PROC.PD3.2#2:
PASS	DUT should send PS_RDY - COMMON.PROC.PD3.2#3:
PASS	COMMON_PROC_PD3_3_UUT_Sent_EPR_Get_Source_Cap - COMMON.PROC.PD3.3:
PASS	Validate EPR Get Source Capabilities message initiated by DUT - COMMON.PROC.PD3.3#1:
PASS	DUT's EPR Request message validation - COMMON.PROC.PD3.3#2:
PASS	COMMON_PROC_PD3_4_UUT_Sent_EPR_Request - COMMON.PROC.PD3.4:
PASS	Validate EPR Request message initiated by DUT - COMMON.PROC.PD.3.4#1:
PASS	COMMON_PROC_PD3_5_Tester_Sent_EPR_Mode_Enter - COMMON.PROC.PD3.5:
PASS	Validate EPR Enter Ack initiated by DUT - COMMON.PROC.PD3.5#1:
PASS	VIF Field Captive Cable is set to No and UUT is not a Vconn source - COMMON.PROC.PD3.5#2:
PASS	UUT sends a Vconn_Swap message - COMMON.PROC.PD3.5#3:
PASS	UUT does not send a SOP1 Discover Identity message - COMMON.PROC.PD3.5#4:
PASS	UUT sends a SOP1 Discover Identity message - COMMON.PROC.PD3.5#5:
PASS	EPR Mode Enter Succeeded message check - COMMON.PROC.PD3.5#6:
PASS	EPR Source Cap message - COMMON.PROC.PD3.5#7:
PASS	UUT establishes EPR contract - COMMON.PROC.PD3.5#8:
PASS	COMMON_PROC_PD3_6_UUT_Sent_EPR_Mode_Enter - COMMON.PROC.PD3.6:
PASS	Validate EPR_Mode_Enter initiated by DUT - COMMON.PROC.PD3.6#1:
PASS	Validate EPR_Mode_Enter response - COMMON.PROC.PD3.6#2:
PASS	Tester sends a Vconn_Swap message - COMMON.PROC.PD3.6#3:
PASS	Validate EPR_Mode Enter failed message - COMMON.PROC.PD3.6#4:
PASS	Validate SOP' Discover_Id and EPR Mode Enter Succeeded message - COMMON.PROC.PD3.6#5:
PASS	EPR_Source_Cap message - COMMON.PROC.PD3.6#6:
PASS	UUT establishes EPR contract - COMMON.PROC.PD3.6#7:
PASS	COMMON_PROC_PD3_7_Tester_Sends_EPR_KeepAlive_Message - COMMON.PROC.PD3.7:
PASS	Validate EPR_KeepAlive response message initiated by DUT - COMMON.PROC.PD3.7#1:

TEST.PD.PHY.ALL.2 - Eye diagram

DUT Information

Manufacturer	TI
Model Number	TPS659xx
Serial Number	1

Test Information

Test Lab
Test_Engineer	Test_Engineer
Remarks	Remarks
Date_and_Time	2023/11/23 16:35:58

Controller and Instrument Information

Parameter	Value
GRL_USB_PD_Controller_Serial_No	GRL-C2-EPR-2022098
GRL_USB_PD_Software_Version	1.6.19.0
GRL_USB_PD_Firmware_Version	1.1.72
GRL USB-PD Ethernet Buffer Size	62K
GRL USB-PD Eload Firmware Version	1.5 / 1.5
GRL USB-PD PPS Firmware Version	4.0 / 4.0
Board Calibration	Calibration Success
RX mask Power selection	Neutral Power
Device_Type	DRP
Cable Type	GRL_SPL_EPR_CABLE_1
Impedance (milli ohm)	12
PD_Merged CTS Version	v.Q4-2023
VIF_File_Name	TI__TPS659xx__1__0-1123-01.xml
Noise Pattern Generation:	Two-Tone Noise
Application mode	Informational
Disabled all Pop-up during test execution	False
Pop-up Timer	0
Execution Time(In Minutes)	6

Power Delivery 3.1 Tests Information

Parameter	Value
Connect EPR Test Fixture	False
FR_Swap AUTO Box Connected	False

Product Capabilities

Parameter	VendorInfoFile	GetCapabilities
VIF_Specification	3.28
Vendor_Name	TI
Model_Part_Number	TPS659xx
Product_Revision	1
TID	0
VIF_Product_Type	Port Product
Certification_Type	Silicon
Port_Label	1 1
Connector_Type	Type-C®
USB4_Supported	YES
USB4_Router_Index	0
USB_PD_Support	YES
PD_Port_Type	DRP
Type_C_State_Machine	DRP
Port_Battery_Powered	NO
BC_1_2_Support	None
Captive_Cable	NO
PD_Spec_Revision_Major	3
PD_Spec_Revision_Minor	0
PD_Spec_Version_Major	2
PD_Spec_Version_Minor	0
PD_Specification_Revision	Revision 3
SOP_Capable	YES
SOP_P_Capable	YES
SOP_PP_Capable	YES
SOP_P_Debug_Capable	NO
SOP_PP_Debug_Capable	NO
Manufacturer_Info_Supported_Port	NO
Chunking_Implemented_SOP	YES
Unchunked_Extended_Messages_Supported	YES
Security_Msgs_Supported_SOP	NO
Unconstrained_Power	YES
Num_Fixed_Batteries	0
Num_Swappable_Battery_Slots	0
ID_Header_Connector_Type_SOP	USB Type-C Receptacle
USB_Comms_Capable	YES
DR_Swap_To_DFP_Supported	YES
DR_Swap_To_UFP_Supported	YES
VCONN_Swap_To_On_Supported	YES
VCONN_Swap_To_Off_Supported	YES
Responds_To_Discov_SOP_UFP	YES
Responds_To_Discov_SOP_DFP	YES
Attempts_Discov_SOP	YES
Power_Interruption_Available	No Interruption Possible
Data_Reset_Supported	YES
Enter_USB_Supported	YES
Type_C_Can_Act_As_Host	YES
Type_C_Can_Act_As_Device	YES
Type_C_Implements_Try_SRC	NO
Type_C_Implements_Try_SNK	YES
Type_C_Supports_Audio_Accessory	NO
Type_C_Is_VCONN_Powered_Accessory	NO
Type_C_Is_Debug_Target_SRC	NO
Type_C_Is_Debug_Target_SNK	NO
RP_Value	3A
Type_C_Port_On_Hub	NO
Type_C_Power_Source	Both
Type_C_Sources_VCONN	YES
Type_C_Is_Alt_Mode_Controller	YES
Type_C_Is_Alt_Mode_Adapter	YES
USB4_Lane_0_Adapter	1
USB4_Max_Speed	Gen 3 (40Gb)
USB4_DFP_Supported	YES
USB4_UFP_Supported	YES
USB4_USB3_Tunneling_Supported	YES
USB4_DP_Tunneling_Supported	YES
USB4_PCIe_Tunneling_Supported	YES
USB4_TBT3_Compatibility_Supported	YES
USB4_CL1_State_Supported	YES
USB4_CL2_State_Supported	YES
USB4_Num_Retimers	0 retimers
USB4_DP_Bit_Rate	HBR3
USB4_Num_DP_Lanes	4 Lanes
Product_Total_Source_Power_mW	111000
Port_Source_Power_Type	Assured
Host_Supports_USB_Data	YES
Host_Speed	USB 3.2 Gen 2x2
Host_Contains_Captive_Retimer	NO
Host_Truncates_DP_For_tDHPResponse	NO
Host_Is_Embedded	NO
Host_Suspend_Supported	YES
Is_DFP_On_Hub	NO
Device_Supports_USB_Data	1
Device_Speed	USB 3.2 Gen 2x2
Device_Max_USB2_Speed	High Speed
Device_Contains_Captive_Retimer	NO
Device_Truncates_DP_For_tDHPResponse	NO
EPR_Supported_As_Src	NO
FR_Swap_Type_C_Current_Capability_As_Initial_Sink	FR_Swap not supported
Master_Port	YES
Has_Invariant_PDOs	YES
Port_Managed_Guaranteed_Type	Guaranteed Capability
EPR_Supported_As_Snk	NO
Accepts_PR_Swap_As_Src	NO
Accepts_PR_Swap_As_Snk	YES
Requests_PR_Swap_As_Src	NO
Requests_PR_Swap_As_Snk	YES
FR_Swap_Supported_As_Initial_Sink	NO
XID_SOP	0
Data_Capable_As_USB_Host_SOP	YES
Data_Capable_As_USB_Device_SOP	YES
Product_Type_UFP_SOP	PDUSB Peripheral
Product_Type_DFP_SOP	PDUSB Hub
DFP_VDO_Port_Number	1
Modal_Operation_Supported_SOP	YES
USB_VID_SOP	2629
PID_SOP	0D45
bcdDevice_SOP	0714
PD_Power_As_Source	96000
USB_Suspend_May_Be_Cleared	YES
Sends_Pings	NO
Num_Src_PDOs	4 Src PDOs
PD_OC_Protection	YES
PD_OCP_Method	Both
PD_Power_As_Sink	0
No_USB_Suspend_May_Be_Set	YES
GiveBack_May_Be_Set	NO
Higher_Capability_Set	NO
FR_Swap_Reqd_Type_C_Current_As_Initial_Source	FR_Swap not supported
Num_Snk_PDOs	1 Snk PDO
SVID_Fixed_SOP	YES
Num_SVIDs_Min_SOP	2
Num_SVIDs_Max_SOP	2

Source Capabilities

Parameter	VendorInfoFile	GetCapabilities
Src_PDO_Supply_Type #1	Fixed
Src_PDO_Peak_Current #1	100% IOC
Src_PDO_Voltage #1	5000 mV
Src_PDO_Max_Current #1	5000 mA
Src_PD_OCP_OC_Debounce #1	1 msec
Src_PD_OCP_OC_Threshold #1	5000 mA
Src_PD_OCP_UV_Debounce #1	1 msec
Src_PD_OCP_UV_Threshold_Type #1	Percentage
Src_PD_OCP_UV_Threshold #1	20 %
Src_PDO_Supply_Type #2	Fixed
Src_PDO_Peak_Current #2	100% IOC
Src_PDO_Voltage #2	9000 mV
Src_PDO_Max_Current #2	5000 mA
Src_PD_OCP_OC_Debounce #2	1 msec
Src_PD_OCP_OC_Threshold #2	5000 mA
Src_PD_OCP_UV_Debounce #2	1 msec
Src_PD_OCP_UV_Threshold_Type #2	Percentage
Src_PD_OCP_UV_Threshold #2	20 %
Src_PDO_Supply_Type #3	Fixed
Src_PDO_Peak_Current #3	100% IOC
Src_PDO_Voltage #3	15000 mV
Src_PDO_Max_Current #3	5000 mA
Src_PD_OCP_OC_Debounce #3	1 msec
Src_PD_OCP_OC_Threshold #3	5000 mA
Src_PD_OCP_UV_Debounce #3	1 msec
Src_PD_OCP_UV_Threshold_Type #3	Percentage
Src_PD_OCP_UV_Threshold #3	20 %
Src_PDO_Supply_Type #4	Fixed
Src_PDO_Peak_Current #4	100% IOC
Src_PDO_Voltage #4	20000 mV
Src_PDO_Max_Current #4	4800 mA
Src_PD_OCP_OC_Debounce #4	1 msec
Src_PD_OCP_OC_Threshold #4	4800 mA
Src_PD_OCP_UV_Debounce #4	1 msec
Src_PD_OCP_UV_Threshold_Type #4	Percentage
Src_PD_OCP_UV_Threshold #4	20 %

Sink Capabilities

Parameter	VendorInfoFile	GetCapabilities
Snk_PDO_Supply_Type #1	Fixed
Snk_PDO_Voltage #1	5000 mV
Snk_PDO_Op_Current #1	0 mA

SVIdsList

Parameter	VendorInfoFile	GetCapabilities
SVID_SOP	8087
SVID_Modes_Fixed_SOP	YES
SVID_Num_Modes_Min_SOP	1
SVID_Num_Modes_Max_SOP	1
SVID_Mode_Enter_SOP	YES
SVID_Mode_Recog_Value_SOP	00000001
SVID_SOP	FF01
SVID_Modes_Fixed_SOP	YES
SVID_Num_Modes_Min_SOP	1
SVID_Num_Modes_Max_SOP	1
SVID_Mode_Enter_SOP	YES
SVID_Mode_Recog_Value_SOP	000C0045

DUT Max Power

Power