C2-EPR Compliance Test Report



Power Delivery 3.1 Tests- Result Summary

Sl No

Test ID

Test Name

Test Result

1

TEST.PD.PROT.ALL3.8

TEST.PD.PROT.ALL3.8 Get Revision Response

FAIL

Power Delivery 3.1 Tests - Detailed Test Result

Test Status

Test Description

  FAIL

  1. TEST.PD.PROT.ALL3.8 Get Revision Response

  PASS

 COMMON.PROC.BU.2:

  PASS

 COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:

 

                    SourceCap Packet#15

  PASS

                          UUT should respond with request - - COMMON.PROC.BU.2#1:

 

                                   Request Packet#17

  FAIL

 Rev3ChkdSnk:

  FAIL

                          Get_Revision response check - TEST.PD.PROT.ALL3.8#1:

 

                                   UUT responded with Not_Supported message for Tester's Get_Revision message

  PASS

                          Revision message details check - TEST.PD.PROT.ALL3.8#2:

  PASS

 COMMON.PROC.BU.1:

  PASS

 COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:

  PASS

                          First source capability timer - COMMON.PROC.BU.1#1:

 

                                   Vbus up time: 3.303s and Sourcecap time: 3.418s
                                   [PASS] Max = 250ms. Obtained time difference is 114.989ms

  PASS

                          DUT responded with accept message - COMMON.PROC.BU.1#2:

 

                                   Packet#74

  PASS

                          tSrcTransReq timer check - COMMON.PROC.BU.1#3:

 

                                   [PASS] Max = 325ms. Obtained time difference is 36.153ms
                                    Packet#76

  FAIL

 Rev3ChkdSrc:

  FAIL

                          Get_Revision response check - TEST.PD.PROT.ALL3.8#1:

 

                                   UUT responded with Not_Supported message for Tester's Get_Revision message

  PASS

                          Revision message details check - TEST.PD.PROT.ALL3.8#2:

Packet List (Click to View AMS Summary)

Index

   Start time(s.ms.μs.ns)

   Stop time(s.ms.μs.ns)

Message Origin

 Message

 

 Secondary Message

 SOP

 Port Type

 Msg ID

 PDO

 Header(MSB to LSB)

 Payload(LSB to MSB)

TEST_PD_PROT_ALL3_8_Get_Revision_Response

Port A Packet Details

4

324.046320 mS

324.046320 mS

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

9

324.754630 mS

324.754630 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SRC

0x0000

10

348.577030 mS

348.577030 mS

<-D

Rd_Detected

NONE

NONE/NONE/R-

0

Rd in CC1;

0x0000

11

350.276760 mS

350.276760 mS

T->

Attach

Rp_12k_1_5A_Asserted

NONE

NONE/NONE/-

0

Rp_12k_1_5A_Asserted

0x0000

12

350.293380 mS

350.293380 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC

0x0000

13

500.375500 mS

500.375500 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SRC -> FSM_State_Attached_SRC

0x0000

15

557.044940 mS

557.642350 mS

T->

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V .1A;

0x11A1

0x0A-0x90-0x01-0x08-

16

557.693750 mS

558.191150 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

0

0x0041

17

562.284780 mS

562.914790 mS

<-D

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0A; MaxCurrent = 0A

0x1082

0x00-0x00-0x80-0x13-

18

562.958590 mS

563.427990 mS

T->

GoodCRC

SOP

DFP/Source/R1

0

0x0121

19

565.041800 mS

565.511210 mS

T->

Accept

SOP

DFP/Source/R3

1

0x03A3

20

565.574810 mS

566.072210 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

1

0x0241

21

888.042670 mS

888.512080 mS

T->

PS_RDY

SOP

DFP/Source/R3

2

0x05A6

22

888.575680 mS

889.072880 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

2

0x0441

24

889.113100 mS

889.113100 mS

T->

Rp_Asserted

Rp_4_7k_3A_Asserted

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Asserted

0x0000

25

896.376130 mS

896.873340 mS

<-D

PR_Swap

SOP

UFP/Sink/R3

1

0x028A

26

896.919540 mS

897.388940 mS

T->

GoodCRC

SOP

DFP/Source/R1

1

0x0321

27

899.041190 mS

899.510560 mS

T->

Reject

SOP

DFP/Source/R3

3

0x07A4

28

899.565360 mS

900.062760 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

3

0x0641

31

1.825.769.079

1.825.769.079

<-D

Rd_Detected

NONE

NONE/NONE/R-

0

Rd in CC1;

0x0000

33

1.826.045.078

1.826.045.078

T->

Rp_Asserted

Rp_12k_1_5A_Asserted

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Asserted

0x0000

37

1.848.046.084

1.848.516.024

T->

Get_Revision

SOP

DFP/Source/R3

4

0x09B8

38

1.848.580.004

1.849.077.025

<-D

GoodCRC

SOP

UFP/Sink/R2

4

0x0841

39

1.853.169.048

1.853.666.068

<-D

Not_Supported

SOP

UFP/Sink/R3

2

0x0490

40

1.853.710.088

1.854.180.029

T->

GoodCRC

SOP

DFP/Source/R1

2

0x0521

42

1.854.236.034

1.854.236.034

T->

Rp_Asserted

Rp_4_7k_3A_Asserted

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Asserted

0x0000

45

1.886.046.080

1.886.046.080

T->

Rp_Asserted

Rp_12k_1_5A_Asserted

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Asserted

0x0000

46

1.887.374.011

1.887.374.011

<-D

Rd_Detected

NONE

NONE/NONE/R-

0

Rd in CC1;

0x0000

47

1.897.335.001

1.897.335.001

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SRC -> FSM_State_Disabled

0x0000

48

1.897.335.062

1.897.335.062

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

49

1.900.343.026

1.900.343.026

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

50

2.899.040.090

2.899.040.090

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

55

2.899.750.038

2.899.750.038

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SNK

0x0000

56

2.978.290.012

2.978.290.012

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

57

2.983.090.022

2.983.090.022

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

58

3.183.103.091

3.183.103.091

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Unattached_SNK

0x0000

59

3.283.034.086

3.283.034.086

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

60

3.287.834.096

3.287.834.096

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

61

3.405.361.000

3.405.991.000

<-D

VendorDefined

SOP1

NONE/DFP_UFP/R3/VdmR2/

0

 Discover ID;Initiator;

0x108F

0x01-0xA0-0x00-0xFF-

62

3.406.039.060

3.406.509.001

C->

GoodCRC

SOP1

NONE/CablePlug/R1

0

0x0101

63

3.412.052.045

3.413.161.084

C->

VendorDefined

SOP1

NONE/CablePlug/R3/VdmR2/

0

 Discover ID;ACK;

0x518F

0x41-0xA8-0x00-0xFF-0x7F-0x22-0x00-0x1C-0x00-0x00-0x00-0x00-0x00-0x00-0x03-0x00-0x52-0x28-0x08-0x00-

64

3.413.213.066

3.413.710.086

<-D

GoodCRC

SOP1

NONE/DFP_UFP/R2

0

0x0041

65

3.417.803.089

3.418.831.070

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

66

3.419.857.090

3.420.885.071

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

67

3.421.888.052

3.422.916.033

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

68

3.424.178.062

3.424.178.062

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

69

3.437.917.007

3.437.917.007

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Attached_SNK

0x0000

70

3.599.821.069

3.600.849.049

<-D

SourceCap

SOP

DFP/Source/R3

1

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x43A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

71

3.600.898.069

3.601.368.010

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

72

3.603.049.011

3.603.646.052

T->

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0.1A; MaxCurrent = 0.1A

0x1082

0x0A-0x28-0x00-0x11-

73

3.603.704.032

3.604.201.072

<-D

GoodCRC

SOP

DFP/Source/R2

0

0x0161

74

3.608.304.015

3.608.801.055

<-D

Accept

SOP

DFP/Source/R3

2

0x05A3

75

3.608.847.055

3.609.316.096

T->

GoodCRC

SOP

UFP/Sink/R1

2

0x0401

76

3.645.470.044

3.645.967.084

<-D

PS_RDY

SOP

DFP/Source/R3

3

0x07A6

77

3.646.015.084

3.646.485.024

T->

GoodCRC

SOP

UFP/Sink/R1

3

0x0601

78

3.647.484.098

3.647.484.098

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

79

3.664.274.058

3.664.771.099

<-D

DR_Swap

SOP

DFP/Source/R3

4

0x09A9

80

3.664.819.019

3.665.288.059

T->

GoodCRC

SOP

UFP/Sink/R1

4

0x0801

81

3.667.046.041

3.667.515.081

T->

Accept

SOP

UFP/Sink/R3

1

0x0283

82

3.667.567.021

3.668.064.061

<-D

GoodCRC

SOP

DFP/Source/R2

1

0x0361

83

3.669.767.039

3.669.767.039

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

87

4.404.050.043

4.404.519.084

T->

Get_Revision

SOP

DFP/Sink/R3

2

0x04B8

88

4.404.574.084

4.405.072.004

<-D

GoodCRC

SOP

UFP/Source/R2

2

0x0541

89

4.409.164.027

4.409.661.068

<-D

Not_Supported

SOP

UFP/Source/R3

5

0x0B90

90

4.409.708.008

4.410.177.048

T->

GoodCRC

SOP

DFP/Sink/R1

5

0x0A21

91

4.445.341.073

4.445.341.073

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SNK -> FSM_State_Disabled

0x0000

92

4.445.342.035

4.445.342.035

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

93

4.448.357.048

4.448.357.048

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

AMS Summary

AMS Index

AMS Name

AMS Start

AMS Stop

AMS Status

Child AMS Count

0

Power_Negotiation

15

22

COMPLETE

0

1

Power_Role_Swap

25

28

COMPLETE

0

2

Get_Revision

37

40

COMPLETE

0

3

Discover_Identity

61

64

COMPLETE

0

4

Power_Negotiation

65

77

COMPLETE

0

5

Data_Role_Swap

79

82

COMPLETE

0

6

Get_Revision

87

90

COMPLETE

0

DUT Information

Manufacturer

TI

Model Number

TPS659xx

Serial Number

1

Test Information

Test Lab

Test_Engineer

Test_Engineer

Remarks

Remarks

Date_and_Time

2023/11/23 16:31:44

Controller and Instrument Information

Parameter

Value

GRL_USB_PD_Controller_Serial_No

GRL-C2-EPR-2022098

GRL_USB_PD_Software_Version

1.6.19.0

GRL_USB_PD_Firmware_Version

1.1.72

GRL USB-PD Ethernet Buffer Size

62K

GRL USB-PD Eload Firmware Version

1.5 / 1.5

GRL USB-PD PPS Firmware Version

4.0 / 4.0

Board Calibration

Calibration Success

RX mask Power selection

Neutral Power

Device_Type

DRP

Cable Type

GRL_SPL_EPR_CABLE_1

Impedance (milli ohm)

12

PD_Merged CTS Version

v.Q4-2023

VIF_File_Name

TI__TPS659xx__1__0-1123-01.xml

Noise Pattern Generation:

Two-Tone Noise

Application mode

Informational

Disabled all Pop-up during test execution

False

Pop-up Timer

0

Execution Time(In Minutes)

2

Power Delivery 3.1 Tests Information

Parameter

Value

Connect EPR Test Fixture

False

FR_Swap AUTO Box Connected

False