C2-EPR Compliance Test Report



Power Delivery 3.1 Tests- Result Summary

Sl No

Test ID

Test Name

Test Result

1

TEST.PD.USB4.DRST.6

TEST.PD.USB4.DRST.6 –Data_Reset command response of DFP UUT, UFP Sourcing Vconn

FAIL

Power Delivery 3.1 Tests - Detailed Test Result

Test Status

Test Description

  FAIL

  1. TEST.PD.USB4.DRST.6 –Data_Reset command response of DFP UUT, UFP Sourcing Vconn

  PASS

 COMMON.PROC.BU.1:

  PASS

 COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:

  PASS

                          First source capability timer - COMMON.PROC.BU.1#1:

 

                                   Vbus up time: 0.548s and Sourcecap time: 0.663s
                                   [PASS] Max = 250ms. Obtained time difference is 114.989ms

  PASS

                          DUT responded with accept message - COMMON.PROC.BU.1#2:

 

                                   Packet#22

  PASS

                          tSrcTransReq timer check - COMMON.PROC.BU.1#3:

 

                                   [PASS] Max = 325ms. Obtained time difference is 35.921ms
                                    Packet#24

  FAIL

 Rev3ChkdSrc:

  PASS

                          VCONN_Swap command response check - TEST.PD.USB4.DRST.6#1:

 

                                   DUT sent Accept message for VCONN_Swap message at protocol index 37
                                   Tester sent PS_RDY message upon Accept message at protocol index 39

  PASS

                          Data_Reset command response check - TEST.PD.USB4.DRST.6#2:

 

                                   UUT respond Accept to Data_Reset command at protocol index 44

  PASS

                          VCONN Reapplied check - TEST.PD.USB4.DRST.6#3:

 

                                   PS_RDY message initiated after 0.12787077s from Accept GoodCRC recieved at protocol index 46
                                   VconnReapplied voltage at PORTA_CC2_VOLTAGE is 0.139526631060226v
                                   VconnReapplied measured from time 3.9973749 to 4.0073749

  PASS

                          VCONN voltage rise check - TEST.PD.USB4.DRST.6#4:

 

                                   VCONN voltage at PORTA_CC2_VOLTAGE is 5.24549234264806v
                                   Vconn voltage measured at 4.01820815 S

  PASS

                          Vconn voltage rise time check - TEST.PD.USB4.DRST.6#5:

 

                                   Vconn voltage is reaching to valid range in 0.833250000000341 mS

  PASS

                          Data_Reset_Complete command check - TEST.PD.USB4.DRST.6#6:

 

                                   UUT not initiated any other message between Accept and Data_Reset_Complete

  PASS

                          Data_Reset_Complete VBUS voltage check - TEST.PD.USB4.DRST.6#7:

 

                                   VBUS is not changed and it is in valid range throughout the Data_Reset process. Obtained voltage is 5.24711998847333V

  PASS

                          Data_Reset_Complete command response time check - TEST.PD.USB4.DRST.6#8:

 

                                   Data_Reset_Complete message received in 0.22831414 S at protocol index 48

  PASS

                          Device discovery process check - TEST.PD.USB4.DRST.6#9:

 

                                   UUT initiated VendorDefined command at protocol index 51

  FAIL

                          Cable discovery process check - TEST.PD.USB4.DRST.6#10:

 

                                   UUT failed to respond VendorDefined command

Packet List (Click to View AMS Summary)

Index

   Start time(s.ms.μs.ns)

   Stop time(s.ms.μs.ns)

Message Origin

 Message

 

 Secondary Message

 SOP

 Port Type

 Msg ID

 PDO

 Header(MSB to LSB)

 Payload(LSB to MSB)

TEST_PD_USB4_DRST_6_Data_Reset_command_response_of_DFP_UUT_UFP_Sourcing_Vconn

Port A Packet Details

4

356.352040 mS

356.352040 mS

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

9

357.056540 mS

357.056540 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SNK

0x0000

10

358.619290 mS

358.619290 mS

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

11

363.419470 mS

363.419470 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

12

550.423340 mS

550.423340 mS

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

13

551.361050 mS

551.361050 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Attached_SNK

0x0000

14

650.541510 mS

651.171510 mS

<-D

VendorDefined

SOP1

NONE/DFP_UFP/R3/VdmR2/

0

 Discover ID;Initiator;

0x108F

0x01-0xA0-0x00-0xFF-

15

651.220510 mS

651.689920 mS

C->

GoodCRC

SOP1

NONE/CablePlug/R1

0

0x0101

16

657.348560 mS

658.457970 mS

C->

VendorDefined

SOP1

NONE/CablePlug/R3/VdmR2/

0

 Discover ID;ACK;

0x518F

0x41-0xA8-0x00-0xFF-0x7F-0x22-0x00-0x1C-0x00-0x00-0x00-0x00-0x00-0x00-0x03-0x00-0x52-0x28-0x08-0x00-

17

658.509770 mS

659.006970 mS

<-D

GoodCRC

SOP1

NONE/DFP_UFP/R2

0

0x0041

18

663.111800 mS

663.741810 mS

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 3A;

0x11A1

0x2C-0x91-0x01-0x0F-

19

663.787010 mS

664.256410 mS

T->

GoodCRC

SOP

UFP/Sink/R1

0

0x0001

20

666.347030 mS

666.944430 mS

T->

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0.1A; MaxCurrent = 0.1A

0x1082

0x0A-0x28-0x00-0x11-

21

667.002230 mS

667.499640 mS

<-D

GoodCRC

SOP

DFP/Source/R2

0

0x0161

22

671.593670 mS

672.091070 mS

<-D

Accept

SOP

DFP/Source/R3

1

0x03A3

23

672.135870 mS

672.605270 mS

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

24

708.526140 mS

709.023550 mS

<-D

PS_RDY

SOP

DFP/Source/R3

2

0x05A6

25

709.070550 mS

709.539950 mS

T->

GoodCRC

SOP

UFP/Sink/R1

2

0x0401

26

710.617520 mS

710.617520 mS

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

27

727.469890 mS

728.099890 mS

<-D

VendorDefined

SOP

DFP/Source/R3/VdmR2/

3

 Discover ID;Initiator;

0x17AF

0x01-0xA0-0x00-0xFF-

28

728.145890 mS

728.615300 mS

T->

GoodCRC

SOP

UFP/Sink/R1

3

0x0601

29

730.347510 mS

730.944920 mS

T->

VendorDefined

SOP

UFP/Sink/R3/VdmR2/

1

 Discover ID;NAK;

0x128F

0x81-0xA8-0x00-0xFF-

30

730.999520 mS

731.496920 mS

<-D

GoodCRC

SOP

DFP/Source/R2

1

0x0361

31

732.244570 mS

732.244570 mS

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

35

1.861.351.027

1.861.820.067

T->

VCONN_Swap

SOP

UFP/Sink/R3

2

0x048B

36

1.861.878.047

1.862.375.088

<-D

GoodCRC

SOP

DFP/Source/R2

2

0x0561

37

1.866.470.031

1.866.967.091

<-D

Accept

SOP

DFP/Source/R3

4

0x09A3

38

1.867.012.011

1.867.481.046

T->

GoodCRC

SOP

UFP/Sink/R1

4

0x0801

39

1.877.348.019

1.877.817.070

T->

PS_RDY

SOP

UFP/Sink/R3

3

0x0686

40

1.877.869.040

1.878.366.080

<-D

GoodCRC

SOP

DFP/Source/R2

3

0x0761

42

3.862.355.027

3.862.824.068

T->

Data_Reset

SOP

UFP/Sink/R3

4

0x088E

43

3.862.879.068

3.863.377.008

<-D

GoodCRC

SOP

DFP/Source/R2

4

0x0961

44

3.867.468.011

3.867.965.052

<-D

Accept

SOP

DFP/Source/R3

5

0x0BA3

45

3.868.012.092

3.868.482.032

T->

GoodCRC

SOP

UFP/Sink/R1

5

0x0A01

46

3.996.353.009

3.996.822.050

T->

PS_RDY

SOP

UFP/Sink/R3

5

0x0A86

47

3.996.877.050

3.997.374.090

<-D

GoodCRC

SOP

DFP/Source/R2

5

0x0B61

48

4.096.796.046

4.097.293.086

<-D

Data_Reset_Complete

SOP

DFP/Source/R3

6

0x0DAF

49

4.097.342.066

4.097.812.007

T->

GoodCRC

SOP

UFP/Sink/R1

6

0x0C01

50

4.098.854.044

4.098.854.044

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

51

4.115.421.060

4.116.051.081

<-D

VendorDefined

SOP

DFP/Source/R3/VdmR2/

7

 Discover ID;Initiator;

0x1FAF

0x01-0xA0-0x00-0xFF-

52

4.116.098.001

4.116.567.041

T->

GoodCRC

SOP

UFP/Sink/R1

7

0x0E01

53

4.118.354.002

4.118.951.043

T->

VendorDefined

SOP

UFP/Sink/R3/VdmR2/

6

 Discover ID;NAK;

0x1C8F

0x81-0xA8-0x00-0xFF-

54

4.119.006.003

4.119.503.043

<-D

GoodCRC

SOP

DFP/Source/R2

6

0x0D61

55

4.119.826.012

4.119.826.012

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

56

4.263.644.058

4.263.644.058

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SNK -> FSM_State_Disabled

0x0000

57

4.263.645.012

4.263.645.012

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

58

4.266.650.057

4.266.650.057

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

AMS Summary

AMS Index

AMS Name

AMS Start

AMS Stop

AMS Status

Child AMS Count

0

Discover_Identity

14

17

COMPLETE

0

1

Power_Negotiation

18

25

COMPLETE

0

2

Discover_Identity

27

30

COMPLETE

0

3

VCONN_Swap

35

40

COMPLETE

0

4

Data_Reset

42

49

COMPLETE

0

5

Discover_Identity

51

54

COMPLETE

0

DUT Information

Manufacturer

TI

Model Number

TPS659xx

Serial Number

1

Test Information

Test Lab

Test_Engineer

Test_Engineer

Remarks

Remarks

Date_and_Time

2023/11/23 17:28:20

Controller and Instrument Information

Parameter

Value

GRL_USB_PD_Controller_Serial_No

GRL-C2-EPR-2022098

GRL_USB_PD_Software_Version

1.6.19.0

GRL_USB_PD_Firmware_Version

1.1.72

GRL USB-PD Ethernet Buffer Size

62K

GRL USB-PD Eload Firmware Version

1.5 / 1.5

GRL USB-PD PPS Firmware Version

4.0 / 4.0

Board Calibration

Calibration Success

RX mask Power selection

Neutral Power

Device_Type

Provider Only

Cable Type

GRL_SPL_EPR_CABLE_1

Impedance (milli ohm)

12

PD_Merged CTS Version

v.Q4-2023

VIF_File_Name

TI__TPS659xx__1__0-1123-01.xml

Noise Pattern Generation:

Two-Tone Noise

Application mode

Informational

Disabled all Pop-up during test execution

False

Pop-up Timer

0

Execution Time(In Minutes)

2

Power Delivery 3.1 Tests Information

Parameter

Value

Connect EPR Test Fixture

False

FR_Swap AUTO Box Connected

False