C2-EPR Compliance Test Report



Power Delivery 3.1 Tests- Result Summary

Sl No

Test ID

Test Name

Test Result

1

TEST.PD.PROT.PORT3.2

TEST.PD.PROT.PORT3.2 Invalid Battery Status

FAIL

Power Delivery 3.1 Tests - Detailed Test Result

Test Status

Test Description

  FAIL

  1. TEST.PD.PROT.PORT3.2 Invalid Battery Status

 

                    PD mode test results doesn't have equal number of assertion

  PASS

 COMMON.PROC.BU.2:

  PASS

 COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk:

 

                    SourceCap Packet#15

  PASS

                          UUT should respond with request - - COMMON.PROC.BU.2#1:

 

                                   Request Packet#17

  FAIL

 Rev3ChkdSnk:

  FAIL

                          Get_Sink_Cap_Ext response check - TEST.PD.PROT.PORT3.2#1:

 

                                   UUT not respond to Get_Sink_Cap_Ext message.

  FAIL

                          Get_Battery_Status response check - TEST.PD.PROT.PORT3.2#2:

 

                                   UUT not respond to Get_Battery_Status message

  PASS

 COMMON.PROC.BU.1:

  PASS

 COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:

  PASS

                          First source capability timer - COMMON.PROC.BU.1#1:

 

                                   Vbus up time: 3.543s and Sourcecap time: 3.658s
                                   [PASS] Max = 250ms. Obtained time difference is 115.822ms

  PASS

                          DUT responded with accept message - COMMON.PROC.BU.1#2:

 

                                   Packet#69

  PASS

                          tSrcTransReq timer check - COMMON.PROC.BU.1#3:

 

                                   [PASS] Max = 325ms. Obtained time difference is 36.151ms
                                    Packet#71

  PASS

 Rev3ChkdSrc:

  PASS

                          Get_SourceCap_Extended response check - TEST.PD.PROT.PORT3.2#1:

 

                                   UUT respond Not_Supported to Get_SourceCap_Extended message

  PASS

                          Not_Supported message check - TEST.PD.PROT.PORT3.2#3:

 

                                   UUT respond Not_Supported to Get_Battery_Status message.The values of VIF fields
                                    Num_Fixed_Batteries and Num_Swappable_Battery_Slots are zero.

  PASS

                          Get_Battery_Status response check - TEST.PD.PROT.PORT3.2#2:

 

                                   UUT respond Not_Supported to Get_Battery_Status message

Packet List (Click to View AMS Summary)

Index

   Start time(s.ms.μs.ns)

   Stop time(s.ms.μs.ns)

Message Origin

 Message

 

 Secondary Message

 SOP

 Port Type

 Msg ID

 PDO

 Header(MSB to LSB)

 Payload(LSB to MSB)

TEST_PD_PROT_PORT_3_2_Invalid_Battery_Status

Port A Packet Details

4

323.580890 mS

323.580890 mS

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

9

324.291930 mS

324.291930 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SRC

0x0000

10

330.981720 mS

330.981720 mS

<-D

Rd_Detected

NONE

NONE/NONE/R-

0

Rd in CC1;

0x0000

11

332.681330 mS

332.681330 mS

T->

Attach

Rp_12k_1_5A_Asserted

NONE

NONE/NONE/-

0

Rp_12k_1_5A_Asserted

0x0000

12

332.698070 mS

332.698070 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC

0x0000

13

482.780180 mS

482.780180 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SRC -> FSM_State_Attached_SRC

0x0000

15

539.579720 mS

540.177120 mS

T->

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V .1A;

0x11A1

0x0A-0x90-0x01-0x08-

16

540.228520 mS

540.725930 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

0

0x0041

17

544.825560 mS

545.455560 mS

<-D

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0A; MaxCurrent = 0A

0x1082

0x00-0x00-0x80-0x13-

18

545.499760 mS

545.969170 mS

T->

GoodCRC

SOP

DFP/Source/R1

0

0x0121

19

547.573380 mS

548.042780 mS

T->

Accept

SOP

DFP/Source/R3

1

0x03A3

20

548.106380 mS

548.603790 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

1

0x0241

21

869.579050 mS

870.048450 mS

T->

PS_RDY

SOP

DFP/Source/R3

2

0x05A6

22

870.112050 mS

870.609450 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

2

0x0441

24

870.650570 mS

870.650570 mS

T->

Rp_Asserted

Rp_4_7k_3A_Asserted

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Asserted

0x0000

25

878.468910 mS

878.966320 mS

<-D

PR_Swap

SOP

UFP/Sink/R3

1

0x028A

26

879.012720 mS

879.482120 mS

T->

GoodCRC

SOP

DFP/Source/R1

1

0x0321

27

880.574330 mS

881.043730 mS

T->

Reject

SOP

DFP/Source/R3

3

0x07A4

28

881.098530 mS

881.595940 mS

<-D

GoodCRC

SOP

UFP/Sink/R2

3

0x0641

32

1.825.580.010

1.825.580.010

T->

Rp_Asserted

Rp_12k_1_5A_Asserted

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Asserted

0x0000

33

1.827.180.007

1.827.180.007

<-D

Rd_Detected

NONE

NONE/NONE/R-

0

Rd in CC1;

0x0000

34

1.828.877.022

1.828.877.022

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SRC -> FSM_State_Unattached_SRC

0x0000

35

1.828.877.080

1.828.877.080

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

36

1.828.896.042

1.828.896.042

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC

0x0000

37

1.830.876.064

1.830.876.064

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

41

1.847.580.014

1.848.049.055

T->

Get_Sink_Cap_Ext

SOP

DFP/Source/R3

0

0x01B6

42

1.849.851.046

1.849.851.046

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SRC -> FSM_State_Unattached_SRC

0x0000

44

1.888.578.086

1.889.176.027

T->

Get_Battery_Status

SOP

DFP/Source/R3

0

Ext/Chk#0/Res/#1

0x91A4

0x01-0x80-0x08-0x00-

45

3.190.573.038

3.190.573.038

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

49

3.190.954.056

3.190.954.056

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SRC -> FSM_State_Unattached_SNK

0x0000

51

3.218.253.026

3.218.253.026

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

52

3.223.053.036

3.223.053.036

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

53

3.423.067.005

3.423.067.005

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Unattached_SNK

0x0000

54

3.522.997.099

3.522.997.099

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

55

3.527.798.009

3.527.798.009

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

56

3.645.316.073

3.645.946.074

<-D

VendorDefined

SOP1

NONE/DFP_UFP/R3/VdmR2/

0

 Discover ID;Initiator;

0x108F

0x01-0xA0-0x00-0xFF-

57

3.645.993.094

3.646.463.034

C->

GoodCRC

SOP1

NONE/CablePlug/R1

0

0x0101

58

3.652.585.099

3.653.695.040

C->

VendorDefined

SOP1

NONE/CablePlug/R3/VdmR2/

0

 Discover ID;ACK;

0x518F

0x41-0xA8-0x00-0xFF-0x7F-0x22-0x00-0x1C-0x00-0x00-0x00-0x00-0x00-0x00-0x03-0x00-0x52-0x28-0x08-0x00-

59

3.653.747.020

3.654.244.040

<-D

GoodCRC

SOP1

NONE/DFP_UFP/R2

0

0x0041

60

3.658.350.027

3.659.378.004

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

61

3.660.387.085

3.661.415.066

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

62

3.662.418.027

3.663.446.007

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x41A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

63

3.676.942.050

3.676.942.050

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

64

3.677.880.021

3.677.880.021

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Attached_SNK

0x0000

65

3.840.355.083

3.841.383.064

<-D

SourceCap

SOP

DFP/Source/R3

1

 FS: 5V 5A; FS: 9V 5A; FS: 15V 5A; FS: 20V 4.8A;

0x43A1

0xF4-0x91-0x01-0x2F-0xF4-0xD1-0x02-0x00-0xF4-0xB1-0x04-0x00-0xE0-0x41-0x06-0x00-

66

3.841.432.024

3.841.901.064

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

67

3.843.582.065

3.844.180.006

T->

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0.1A; MaxCurrent = 0.1A

0x1082

0x0A-0x28-0x00-0x11-

68

3.844.237.086

3.844.735.026

<-D

GoodCRC

SOP

DFP/Source/R2

0

0x0161

69

3.848.827.009

3.849.324.030

<-D

Accept

SOP

DFP/Source/R3

2

0x05A3

70

3.849.368.030

3.849.837.070

T->

GoodCRC

SOP

UFP/Sink/R1

2

0x0401

71

3.885.988.038

3.886.485.078

<-D

PS_RDY

SOP

DFP/Source/R3

3

0x07A6

72

3.886.533.038

3.887.002.079

T->

GoodCRC

SOP

UFP/Sink/R1

3

0x0601

73

3.888.758.084

3.888.758.084

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

74

3.904.757.092

3.905.255.033

<-D

DR_Swap

SOP

DFP/Source/R3

4

0x09A9

75

3.905.304.073

3.905.774.013

T->

GoodCRC

SOP

UFP/Sink/R1

4

0x0801

76

3.907.583.014

3.908.052.055

T->

Accept

SOP

UFP/Sink/R3

1

0x0283

77

3.908.103.095

3.908.601.035

<-D

GoodCRC

SOP

DFP/Source/R2

1

0x0361

78

3.910.385.089

3.910.385.089

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

82

4.695.585.098

4.696.055.038

T->

Get_SourceCap_Extended

SOP

DFP/Sink/R3

2

0x04B1

83

4.696.113.019

4.696.610.059

<-D

GoodCRC

SOP

UFP/Source/R2

2

0x0541

84

4.700.703.022

4.701.200.063

<-D

Not_Supported

SOP

UFP/Source/R3

5

0x0B90

85

4.701.246.083

4.701.716.023

T->

GoodCRC

SOP

DFP/Sink/R1

5

0x0A21

87

4.736.584.070

4.737.182.011

T->

Get_Battery_Status

SOP

DFP/Sink/R3

3

Ext/Chk#0/Res/#1

0x96A4

0x01-0x80-0x08-0x00-

88

4.737.236.071

4.737.734.011

<-D

GoodCRC

SOP

UFP/Source/R2

3

0x0741

89

4.741.836.074

4.742.334.015

<-D

Not_Supported

SOP

UFP/Source/R3

6

0x0D90

90

4.742.383.015

4.742.852.055

T->

GoodCRC

SOP

DFP/Sink/R1

6

0x0C21

91

5.037.896.041

5.037.896.041

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SNK -> FSM_State_Disabled

0x0000

92

5.037.897.002

5.037.897.002

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

93

5.040.880.095

5.040.880.095

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

AMS Summary

AMS Index

AMS Name

AMS Start

AMS Stop

AMS Status

Child AMS Count

0

Power_Negotiation

15

22

COMPLETE

0

1

Power_Role_Swap

25

28

COMPLETE

0

2

Getting_Sink_Extended_Capabilities

41

41

PARTIAL_DUT_PACKET_MISSING

0

3

Getting_Battery_Status

44

44

PARTIAL_DUT_PACKET_MISSING

0

4

Discover_Identity

56

59

COMPLETE

0

5

Power_Negotiation

60

72

COMPLETE

0

6

Data_Role_Swap

74

77

COMPLETE

0

7

Getting_Source_Extended_Capabilities

82

85

COMPLETE

0

8

Getting_Battery_Status

87

90

COMPLETE

0

DUT Information

Manufacturer

TI

Model Number

TPS659xx

Serial Number

1

Test Information

Test Lab

Test_Engineer

Test_Engineer

Remarks

Remarks

Date_and_Time

2023/11/23 16:32:18

Controller and Instrument Information

Parameter

Value

GRL_USB_PD_Controller_Serial_No

GRL-C2-EPR-2022098

GRL_USB_PD_Software_Version

1.6.19.0

GRL_USB_PD_Firmware_Version

1.1.72

GRL USB-PD Ethernet Buffer Size

62K

GRL USB-PD Eload Firmware Version

1.5 / 1.5

GRL USB-PD PPS Firmware Version

4.0 / 4.0

Board Calibration

Calibration Success

RX mask Power selection

Neutral Power

Device_Type

DRP

Cable Type

GRL_SPL_EPR_CABLE_1

Impedance (milli ohm)

12

PD_Merged CTS Version

v.Q4-2023

VIF_File_Name

TI__TPS659xx__1__0-1123-01.xml

Noise Pattern Generation:

Two-Tone Noise

Application mode

Informational

Disabled all Pop-up during test execution

False

Pop-up Timer

0

Execution Time(In Minutes)

3

Power Delivery 3.1 Tests Information

Parameter

Value

Connect EPR Test Fixture

False

FR_Swap AUTO Box Connected

False