C2-EPR Compliance Test Report



Power Delivery 3.1 Tests- Result Summary

Sl No

Test ID

Test Name

Test Result

1

TEST.PD.PROT.SRC.7

TEST.PD.PROT.SRC.7 DR_Swap

FAIL

Power Delivery 3.1 Tests - Detailed Test Result

Test Status

Test Description

  FAIL

  1. TEST.PD.PROT.SRC.7 DR_Swap

  PASS

 COMMON.PROC.BU.1:

  PASS

 COMMON.PROC.BU.1 - REVISION_2_0 Rev2Src:

  PASS

                          First source capability timer - COMMON.PROC.BU.1#1:

 

                                   Vbus up time: 0.512s and Sourcecap time: 0.626s
                                   [PASS] Max = 250ms. Obtained time difference is 114.155ms

  PASS

                          DUT responded with accept message - COMMON.PROC.BU.1#2:

 

                                   Packet#22

  PASS

                          tSrcTransReq timer check - COMMON.PROC.BU.1#3:

 

                                   [PASS] Max = 325ms. Obtained time difference is 35.935ms
                                    Packet#24

  PASS

 COMMON.PROC.BU.1 - REVISION_3_0 Rev3ChkdSrc:

  PASS

                          First source capability timer - COMMON.PROC.BU.1#1:

 

                                   Vbus up time: 7.022s and Sourcecap time: 7.138s
                                   [PASS] Max = 250ms. Obtained time difference is 115.822ms

  PASS

                          DUT responded with accept message - COMMON.PROC.BU.1#2:

 

                                   Packet#63

  PASS

                          tSrcTransReq timer check - COMMON.PROC.BU.1#3:

 

                                   [PASS] Max = 325ms. Obtained time difference is 35.898ms
                                    Packet#65

  FAIL

 Rev2Src:

  FAIL

                          DR_Swap Response Check - TEST.PD.PROT.SRC.7#1:

 

                                   UUT respond Reject to DR_Swap message and DR_Swap_To_UFP_Supported field is Yes

  FAIL

                          DR_Swap Response Check - TEST.PD.PROT.SRC.7#2:

 

                                   Check the DRSwap AMS and confirm the test results

  FAIL

 Rev3ChkdSrc:

  FAIL

                          DR_Swap Response Check - TEST.PD.PROT.SRC.7#1:

 

                                   UUT respond Reject to DR_Swap message and DR_Swap_To_UFP_Supported field is Yes

  FAIL

                          DR_Swap Response Check - TEST.PD.PROT.SRC.7#2:

 

                                   Check the DRSwap AMS and confirm the test results

Packet List (Click to View AMS Summary)

Index

   Start time(s.ms.μs.ns)

   Stop time(s.ms.μs.ns)

Message Origin

 Message

 

 Secondary Message

 SOP

 Port Type

 Msg ID

 PDO

 Header(MSB to LSB)

 Payload(LSB to MSB)

TEST_PD_PROT_SRC_7_DR_Swap

Port A Packet Details

4

320.887120 mS

320.887120 mS

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

9

321.587670 mS

321.587670 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SNK

0x0000

10

323.088980 mS

323.088980 mS

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

11

327.889150 mS

327.889150 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

12

515.042160 mS

515.042160 mS

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

13

515.979860 mS

515.979860 mS

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Attached_SNK

0x0000

14

615.049190 mS

615.679200 mS

<-D

VendorDefined

SOP1

NONE/DFP_UFP/R3/VdmR2/

0

 Discover ID;Initiator;

0x108F

0x01-0xA0-0x00-0xFF-

15

615.729200 mS

616.198600 mS

C->

GoodCRC

SOP1

NONE/CablePlug/R1

0

0x0101

16

620.487640 mS

621.597040 mS

C->

VendorDefined

SOP1

NONE/CablePlug/R3/VdmR2/

0

 Discover ID;ACK;

0x518F

0x41-0xA8-0x00-0xFF-0x7F-0x22-0x00-0x1C-0x00-0x00-0x00-0x00-0x00-0x00-0x03-0x00-0x52-0x28-0x08-0x00-

17

621.648840 mS

622.146250 mS

<-D

GoodCRC

SOP1

NONE/DFP_UFP/R2

0

0x0041

18

626.241680 mS

626.871880 mS

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 3A;

0x11A1

0x2C-0x91-0x01-0x0F-

19

626.916480 mS

627.385890 mS

T->

GoodCRC

SOP

UFP/Sink/R1

0

0x0001

20

627.476490 mS

628.073890 mS

T->

Request

SOP

UFP/Sink/R2

0

PDO#1 Fixed; OpCurrent = 0.1A; MaxCurrent = 0.1A

0x1042

0x0A-0x28-0x00-0x13-

21

628.131690 mS

628.629100 mS

<-D

GoodCRC

SOP

DFP/Source/R2

0

0x0161

22

632.723130 mS

633.220530 mS

<-D

Accept

SOP

DFP/Source/R2

1

0x0363

23

633.268530 mS

633.737940 mS

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

24

669.672810 mS

670.170210 mS

<-D

PS_RDY

SOP

DFP/Source/R2

2

0x0566

25

670.219210 mS

670.688620 mS

T->

GoodCRC

SOP

UFP/Sink/R1

2

0x0401

26

672.339430 mS

672.969540 mS

<-D

VendorDefined

SOP

DFP/Source/R2/VdmR1/

3

 Discover ID;Initiator;

0x176F

0x01-0x80-0x00-0xFF-

27

673.019260 mS

673.488640 mS

T->

GoodCRC

SOP

UFP/Sink/R1

3

0x0601

28

673.556840 mS

674.154240 mS

T->

VendorDefined

SOP

UFP/Sink/R2/VdmR1/

1

 Discover ID;NAK;

0x124F

0x81-0x80-0x00-0xFF-

29

674.209240 mS

674.706650 mS

<-D

GoodCRC

SOP

DFP/Source/R2

1

0x0361

33

1.823.955.097

1.824.425.038

T->

DR_Swap

SOP

UFP/Sink/R2

2

0x0449

34

1.824.477.018

1.824.974.038

<-D

GoodCRC

SOP

DFP/Source/R2

2

0x0561

35

1.829.073.081

1.829.571.002

<-D

Reject

SOP

DFP/Source/R2

4

0x0964

36

1.829.620.002

1.830.089.042

T->

GoodCRC

SOP

UFP/Sink/R1

4

0x0801

38

3.824.918.038

3.825.387.078

T->

DR_Swap

SOP

UFP/Sink/R2

3

0x0649

39

3.825.452.098

3.825.950.039

<-D

GoodCRC

SOP

DFP/Source/R2

3

0x0761

40

3.830.044.042

3.830.541.082

<-D

Reject

SOP

DFP/Source/R2

5

0x0B64

41

3.830.588.082

3.831.058.023

T->

GoodCRC

SOP

UFP/Sink/R1

5

0x0A01

42

5.828.186.093

5.828.186.093

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SNK -> FSM_State_Disabled

0x0000

43

5.828.187.038

5.828.187.038

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

44

5.831.189.067

5.831.189.067

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

45

6.829.887.051

6.829.887.051

T->

Ra_Asserted

NONE

NONE/NONE/R-

0

Ra_CC2

0x0000

50

6.830.594.083

6.830.594.083

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Disabled -> FSM_State_Unattached_SNK

0x0000

51

6.832.173.098

6.832.173.098

<-D

Attach

Rp_4_7k_3A_Detected

NONE

NONE/NONE/-

0

Rp_4_7k_3A_Detected

0x0000

52

6.836.974.008

6.836.974.008

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Unattached_SNK -> FSM_State_AttachWait_SNK

0x0000

53

7.024.127.009

7.024.127.009

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

54

7.025.064.080

7.025.064.080

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_AttachWait_SNK -> FSM_State_Attached_SNK

0x0000

55

7.124.198.021

7.124.828.041

<-D

VendorDefined

SOP1

NONE/DFP_UFP/R3/VdmR2/

0

 Discover ID;Initiator;

0x108F

0x01-0xA0-0x00-0xFF-

56

7.124.876.021

7.125.345.062

C->

GoodCRC

SOP1

NONE/CablePlug/R1

0

0x0101

57

7.131.900.027

7.133.009.068

C->

VendorDefined

SOP1

NONE/CablePlug/R3/VdmR2/

0

 Discover ID;ACK;

0x518F

0x41-0xA8-0x00-0xFF-0x7F-0x22-0x00-0x1C-0x00-0x00-0x00-0x00-0x00-0x00-0x03-0x00-0x52-0x28-0x08-0x00-

58

7.133.061.048

7.133.558.088

<-D

GoodCRC

SOP1

NONE/DFP_UFP/R2

0

0x0041

59

7.137.658.091

7.138.288.092

<-D

SourceCap

SOP

DFP/Source/R3

0

 FS: 5V 3A;

0x11A1

0x2C-0x91-0x01-0x0F-

60

7.138.335.052

7.138.804.092

T->

GoodCRC

SOP

UFP/Sink/R1

0

0x0001

61

7.140.892.033

7.141.489.074

T->

Request

SOP

UFP/Sink/R3

0

PDO#1 Fixed; OpCurrent = 0.1A; MaxCurrent = 0.1A

0x1082

0x0A-0x28-0x00-0x13-

62

7.141.544.074

7.142.042.014

<-D

GoodCRC

SOP

DFP/Source/R2

0

0x0161

63

7.146.145.097

7.146.643.058

<-D

Accept

SOP

DFP/Source/R3

1

0x03A3

64

7.146.687.058

7.147.156.098

T->

GoodCRC

SOP

UFP/Sink/R1

1

0x0201

65

7.183.054.065

7.183.552.006

<-D

PS_RDY

SOP

DFP/Source/R3

2

0x05A6

66

7.183.599.086

7.184.069.026

T->

GoodCRC

SOP

UFP/Sink/R1

2

0x0401

67

7.185.482.088

7.185.482.088

<-D

Rp_Detected

Rp_12k_1_5A_Detected

NONE

NONE/NONE/R-

0

Rp_12k_1_5A_Detected

0x0000

68

7.202.002.040

7.202.632.040

<-D

VendorDefined

SOP

DFP/Source/R3/VdmR2/

3

 Discover ID;Initiator;

0x17AF

0x01-0xA0-0x00-0xFF-

69

7.202.678.040

7.203.147.081

T->

GoodCRC

SOP

UFP/Sink/R1

3

0x0601

70

7.204.896.002

7.205.493.043

T->

VendorDefined

SOP

UFP/Sink/R3/VdmR2/

1

 Discover ID;NAK;

0x128F

0x81-0xA8-0x00-0xFF-

71

7.205.548.003

7.206.045.043

<-D

GoodCRC

SOP

DFP/Source/R2

1

0x0361

72

7.206.454.055

7.206.454.055

<-D

Rp_Detected

Rp_4_7k_3A_Detected

NONE

NONE/NONE/R-

0

Rp_4_7k_3A_Detected

0x0000

76

8.334.898.022

8.335.367.062

T->

DR_Swap

SOP

UFP/Sink/R3

2

0x0489

77

8.335.419.042

8.335.916.082

<-D

GoodCRC

SOP

DFP/Source/R2

2

0x0561

78

8.340.013.005

8.340.510.066

<-D

Reject

SOP

DFP/Source/R3

4

0x09A4

79

8.340.555.086

8.341.025.026

T->

GoodCRC

SOP

UFP/Sink/R1

4

0x0801

81

10.335.902.002

10.336.371.006

T->

DR_Swap

SOP

UFP/Sink/R3

3

0x0689

82

10.336.437.000

10.336.934.004

<-D

GoodCRC

SOP

DFP/Source/R2

3

0x0761

83

10.341.033.001

10.341.530.003

<-D

Reject

SOP

DFP/Source/R3

5

0x0BA4

84

10.341.579.001

10.342.048.005

T->

GoodCRC

SOP

UFP/Sink/R1

5

0x0A01

85

12.337.209.002

12.337.209.002

T->

FSM_State_Transition

NONE

NONE/NONE/R-

0

FSM_State_Attached_SNK -> FSM_State_Disabled

0x0000

86

12.337.209.006

12.337.209.006

T->

Detach

NONE

NONE/NONE/-

0

NONE

0x0000

87

12.340.201.004

12.340.201.004

<-D

NONE

LOAD_CURRENT

NONE

NONE/NONE/R-

0

LOAD_CURRENT:0A

0x0000

AMS Summary

AMS Index

AMS Name

AMS Start

AMS Stop

AMS Status

Child AMS Count

0

Discover_Identity

14

17

COMPLETE

0

1

Power_Negotiation

18

25

COMPLETE

0

2

Discover_Identity

26

29

COMPLETE

0

3

Data_Role_Swap

33

36

COMPLETE

0

4

Data_Role_Swap

38

41

COMPLETE

0

5

Discover_Identity

55

58

COMPLETE

0

6

Power_Negotiation

59

66

COMPLETE

0

7

Discover_Identity

68

71

COMPLETE

0

8

Data_Role_Swap

76

79

COMPLETE

0

9

Data_Role_Swap

81

84

COMPLETE

0

DUT Information

Manufacturer

TI

Model Number

TPS659xx

Serial Number

1

Test Information

Test Lab

Test_Engineer

Test_Engineer

Remarks

Remarks

Date_and_Time

2023/11/23 17:27:53

Controller and Instrument Information

Parameter

Value

GRL_USB_PD_Controller_Serial_No

GRL-C2-EPR-2022098

GRL_USB_PD_Software_Version

1.6.19.0

GRL_USB_PD_Firmware_Version

1.1.72

GRL USB-PD Ethernet Buffer Size

62K

GRL USB-PD Eload Firmware Version

1.5 / 1.5

GRL USB-PD PPS Firmware Version

4.0 / 4.0

Board Calibration

Calibration Success

RX mask Power selection

Neutral Power

Device_Type

Provider Only

Cable Type

GRL_SPL_EPR_CABLE_1

Impedance (milli ohm)

12

PD_Merged CTS Version

v.Q4-2023

VIF_File_Name

TI__TPS659xx__1__0-1123-01.xml

Noise Pattern Generation:

Two-Tone Noise

Application mode

Informational

Disabled all Pop-up during test execution

False

Pop-up Timer

0

Execution Time(In Minutes)

1

Power Delivery 3.1 Tests Information

Parameter

Value

Connect EPR Test Fixture

False

FR_Swap AUTO Box Connected

False