.ALIASES
C_C3            C3(1=0 2=N02409 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS26@ANALOG.C.Normal(chips)
C_C5            C5(1=0 2=N00801 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS42@ANALOG.C.Normal(chips)
C_C4            C4(1=N02577 2=N02409 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS58@ANALOG.C.Normal(chips)
C_C6            C6(1=0 2=N01742 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS106@ANALOG.C.Normal(chips)
C_C8            C8(1=0 2=N02299 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS138@ANALOG.C.Normal(chips)
C_C1            C1(1=N00953 2=N01797 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS154@ANALOG.C.Normal(chips)
C_C7            C7(1=0 2=N001801 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS170@ANALOG.C.Normal(chips)
L_L1            L1(1=N00946 2=N00953 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS195@ANALOG.L.Normal(chips)
L_L2            L2(1=0 2=N01797 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS211@ANALOG.L.Normal(chips)
R_R3            R3(1=N00775 2=N00771 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS252@ANALOG.R.Normal(chips)
R_R2            R2(1=N02577 2=N02409 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS268@ANALOG.R.Normal(chips)
R_R10           R10(1=0 2=N02577 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS284@ANALOG.R.Normal(chips)
R_R7            R7(1=0 2=N00991 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS300@ANALOG.R.Normal(chips)
R_R6            R6(1=N00801 2=N00783 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS316@ANALOG.R.Normal(chips)
R_R1            R1(1=N00991 2=N00946 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS332@ANALOG.R.Normal(chips)
R_R8            R8(1=0 2=N00783 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS348@ANALOG.R.Normal(chips)
V_V1            V1(+=N00946 -=0 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS373@SOURCE.VDC.Normal(chips)
X_U1            U1(AGND=0 BIAS=N00946 COMP=N02299 CS=N00801 EP=0 FB=N02577 GATE=N00771 PGND=0 PGOOD=N01397 RT=N01683 SS=N01742
+UVLO_SYNC=N00991 VCC=N00946 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS595@LM5155-Q1DSS_TRANS.LM5155QDSSRQ1.Normal(chips)
X_U2            U2(drain=N00953 gate=N00775 source=N00783 ) CN
+@HV-SEPIC.SCHEMATIC1(sch_1):INS744@CSD19538Q3A.CSD19538Q3A.Normal(chips)
V_V2            V2(+=N01590 -=0 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS1313@SOURCE.VDC.Normal(chips)
R_R5            R5(1=N01397 2=N01590 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS1381@ANALOG.R.Normal(chips)
R_R9            R9(1=N01683 2=0 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS1619@ANALOG.R.Normal(chips)
D_D1            D1(1=N01797 2=N02409 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS2315@BREAKOUT.Dbreak.Normal(chips)
R_R4            R4(1=0 2=N02409 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS2674@ANALOG.R.Normal(chips)
R_R11           R11(1=N02299 2=N001801 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS3171@ANALOG.R.Normal(chips)
C_C2            C2(1=0 2=N00946 ) CN @HV-SEPIC.SCHEMATIC1(sch_1):INS3496@ANALOG.C.Normal(chips)
.ENDALIASES
