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["Read me"]
["This page presents the document and offers helpful tips."]
[]
[]
[]
["About this document"]
["This tool is designed as an aid for customers of Texas Instruments related to their use of the TPS659037. This tool is provided “as is” and Texas Instruments makes no warranties, either express or implied, with regard to the tool or its output, and assumes no liability for applications assistance of the design of the user’s products.  User is responsible for its products and applications using Texas Instruments components and user assumes all risk in the use of this tool.  IN NO EVENT SHALL TEXAS INSTRUMENTS BE LIABLE FOR ANY ACTUAL, SPECIAL, INCIDENTAL, CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT OF THIS TOOL OR USER’S USE OF THIS TOOL."]
["1- This document was done to review a schematic or a board layout. For each line, please obey the directions for the board under review"]
["2- In the main work sheet the different fields will help you to find all needed informations regarding the device (ball name, pin type, possible device interaction, connection to external components, recommended external comp, max voltage, max curent, pull up or pull down... )."]
["3- You may need to scroll up after selecting a filter."]
["4- Most of this data is extracted from Data manual. In case of doubt please refer to Data manual."]
[]
["Revision History"]
["Rev.","Date","Sheet","Comments"]
[1,"2015-08-25","all","initial version"]
[2,"2016-01-13","all","Updated disclamer to list TPS659037 instead of TPS659038/39-Q1.\nChanged LDOUSB_IN2 connection to \"external power supply\".\nRemoved \"LDO7\" from LDOUSB_IN1 description.\nAdded SMPS feedback routing guidlenes to Design Checklist tab."]

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["This tool is designed as an aid for customers of Texas Instruments related to their use of the TPS659037. This tool is provided “as is” and Texas Instruments makes no warranties, either express or implied, with regard to the tool or its output, and assumes no liability for applications assistance of the design of the user’s products.  User is responsible for its products and applications using Texas Instruments components and user assumes all risk in the use of this tool.  IN NO EVENT SHALL TEXAS INSTRUMENTS BE LIABLE FOR ANY ACTUAL, SPECIAL, INCIDENTAL, CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT OF THIS TOOL OR USER’S USE OF THIS TOOL."]
["Category","Details","Condition","Consequences"]
["Clocking","Is OSC16M_CFG (OTP bit) set to 0 or 1?  Refer to the user's guide for details for a specific part number.","OSC16M_CFG=0","Crystal oscillator is enabled, device requires an external crystal at OSC16MIN input."]
[null,null,"OSC16M_CFG=1","Crystal oscillator is disabled.  OSC16MIN should be grounded, or a 32kHz clock (square wave) can be input to this pin"]
["Sequence","Is LDO VIN power from VSYS or sequenced prior to LDO?",null,"LDO VIN needs to be available prior to LDO enable. Otherwise, it is detected as output short and will remain off."]
["Sequence","Is SYSENx used?",null,"VIO_IN must be available prior to SYSENx slot in power sequence"]
["ON/OFF","Is POWERHOLD used as ON/OFF","Unused (GND)","Set DEV_ON bit to acknowledge power on and prevent the PMIC from turning off"]
[null,null,"Used for ON/OFF or high"]
["SMPS","Are all SMPS powered from the same voltage as VSYS/VCC?","mandatory","The device has only a single input voltage feed forward sense which is VCC. If different input rails are used or VCC is different from SMPSx_IN, voltage feed forward is not functional."]
["SMPS","Are SMPS feedback lines routed to the load?",null,"To compensate for I*R drop on the PCB, the SMPS feedback lines should be routed to the load instead of the output capacitor.  For SMPS12 and SMPS45, this is differential FDBK and FDBK_GND lines.  For all other SMPS, it is only one FDBK line."]
["SMPS","The Power-FETs must not be exposed to 9V or more peak-to-peak","mandatory","Appropriate decoupling and thorough layout should ensure that the spikes never exceed 9V peak-to-peak at the IC. Texas Instruments recommends to measure these voltages (SMPSx_IN vs. SMPSx_SW and SMPSx_SW vs. SMPSx_GND) with a high-bandwidth, high sampling rate scope with a low capacitance probe as close as possible to the IC-balls and verify the amplitude of the spikes.  See the Layout section of the datasheet for recommended layout guidelines."]

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["TPS659037-Design-Checklist",null,"This tool is designed as an aid for customers of Texas Instruments related to their use of the TPS659037. This tool is provided “as is” and Texas Instruments makes no warranties, either express or implied, with regard to the tool or its output, and assumes no liability for applications assistance of the design of the user’s products.  User is responsible for its products and applications using Texas Instruments components and user assumes all risk in the use of this tool.  IN NO EVENT SHALL TEXAS INSTRUMENTS BE LIABLE FOR ANY ACTUAL, SPECIAL, INCIDENTAL, CONSEQUENTIAL OR INDIRECT DAMAGES, HOWEVER CAUSED, ON ANY THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES, ARISING IN ANY WAY OUT OF THIS TOOL OR USER’S USE OF THIS TOOL."]
[null,null,"Scroll up after selecting a Filter!                  Scroll up after selecting a Filter!                   Scroll up after selecting a Filter!                 Scroll up after selecting a Filter!                   Scroll up after selecting a Filter!                 Scroll up after selecting a Filter!                    Scroll up after selecting a Filter!                     Scroll up after selecting a Filter! "]
["Categories","Ball name","TPS659037\nBall #","Pin Type (e.g.Power, Ground, I/O)","Cadence PAD name","Description","Connected to","Connected Components","Expected Components","Recommended Components\n(*) crosscheck if available","Recommended Placement and/or Layout","Connection When Not Used","LEVEL (V or domain)","Max Curent (mA)","Pull Up/ Pull Down"," ground "]
["POWER SUPPLIES","PBKG","B10","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","B11","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","A1","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","A13","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","D6","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","D7","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","E8","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","F6","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","F7","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","G7","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","H6","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","H7","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","J6","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","M1","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","M2","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","N13","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","PBKG","N1","GND","PBKG","Substrate ground","Ground ","-","-","-","-","Ground ","-","-","NA","PBKG"]
["POWER SUPPLIES","GND_DIG","M12","GND","GND_DIG","Digital power ground","Ground ","-","-","-","-","Ground ","-","-","NA","GND_DIG"]
["POWER SUPPLIES","VIO_GND","N2","GND","GND_VIO","Digital ground connection","Ground ","-","-","-","-","Ground ","-","-","NA","VIO_GND"]
["POWER SUPPLIES","GND_ANA","A7","GND","GND_ANA1","Analog power ground","Ground ","-","-","-","-","Ground ","-","-","NA","GND_ANA"]
["POWER SUPPLIES","GND_ANA","M13","GND","GND_ANA2","Analog power ground","Ground ","-","-","-","-","Ground ","-","-","NA","GND_ANA"]
["POWER SUPPLIES","GND_ANA","E7","GND","GND_ANA3","Analog power ground","Ground ","-","-","-","-","Ground ","-","-","NA","GND_ANA"]
["POWER SUPPLIES","GND_ANA","F5","GND","GND_ANA4","Analog power ground","Ground ","-","-","-","-","Ground ","-","-","NA","GND_ANA"]
["POWER SUPPLIES","VCC1","C7","PWR","VDD_VCC1_6P0V","Analog input voltage supply","External power supply","Decoupling capacitor","10uF / min 6.3V","Murata GCM21BR70J106KE22 (10uF/ 6.3V / 0603)","-","External power supply","3.135-5.25","-","NA","GND_ANA"]
["POWER SUPPLIES","VIO_IN","D9","PWR","VDD_VIO_1P8V","Digital supply input for GPIOs and I/O supply voltage","External power supply","Decoupling capacitor","100nF/ min 6V3","Murata (100nF 6V3 0402)\nGCM155R71C104KA55","-","N/A",1.8,"-","NA","GND_DIG"]
["POWER SUPPLIES","LDO_SUPPLY","M4","PWR",null,"Internal supply for LDOs","External power supply","-","-","-","-","External power supply","VCC1","-","NA","PBKG"]
["POWER SUPPLIES","LDO_SUPPLY","N3","PWR",null,"Internal supply for LDOs","External power supply","-","-","-","-","External power supply","VCC1","-","NA","PBKG"]
["POWER SUPPLIES","LDO_SUPPLY","N4","PWR",null,"Internal supply for LDOs","External power supply","-","-","-","-","External power supply","VCC1","-","NA","PBKG"]
["NOT CONNECTED","NC","C9","-",null,"Not connected","-","-","-","-","-","Floating","-","-","-","-"]
["NOT CONNECTED","NC","K4","-",null,"Not connected","-","-","-","-","-","Floating","-","-","-","-"]
["NOT CONNECTED","NC","K5","-",null,"Not connected","-","-","-","-","-","Floating","-","-","-","-"]
["NOT CONNECTED","NC","L4","-",null,"Not connected","-","-","-","-","-","Floating","-","-","-","-"]
["CLOCKING","CLK32KGO","M11","Output","PAD_CLK32KGAO_1P8V","32-kHz digital-gated output clock always on when VIO_IN input supply is present","External device","When external device is useed, external device is connected","-","-","-","Floating","VIO_IN","-","NA","GND_DIG"]
["CLOCKING","OSC16MCAP","C1","Output","PAD_OSC32KCAP_1P8V","Filtering capacitor for the 16-MHz crystal oscillator","Capacitor to ground","When external Xtal is used, external componet is connected","Capacitance 2.2uF 6V3","Murata GCM188R70J225KE22 2.2 μF 6V3 0603","Filtering cap close to ball","Floating","-","-","NA","GND_DIG"]
["CLOCKING","OSC16MOUT","A2","Output","PAD_OSC32KOUT_1P8V","16.384MHz crystal oscillator(external Xtal) output or floating when OSC16MIN is forced 32kHz digital clock (external clock) input","External Xtal ","When external Xtal is used, external componets are connected","16.384MHz Xtal and 10pF capacitor (please refer to Xtal-spec, consider <1pF for input-capacitance of pin)","Epson FA-238 (+/-20ppm grade)\nTXC 7V-16.384MAAE-T\n\n10pF GRM1555C1H100JZ01","Differential trace to the crystal.\nrespect large isolation with others traces ","Floating","LDOVRTC","-","NA","GND_DIG"]
["CLOCKING","OSC16MIN","A3","Input","PAD_OSC32KIN_1P8V","16.384MHz crystal oscillator input or 32kHz digital clock (external clock) input","External Xtal\nor \nexternal clock","When external Xtal is used, external componets are connected","16.384MHz Xtal and 10pF capacitor (please refer to Xtal-spec, consider <1pF for input-capacitance of pin)","Epson FA-238 (+/-20ppm grade)\nTXC 7V-16.384MAAE-T\n\n10pF GRM1555C1H100JZ01","Differential trace to the crystal.\nrespect large isolation with others traces ","In bypass-mode, connect to GND","LDOVRTC","-","NA","GND_DIG"]
["REFERENCE","REFGND1","A4","GND","GND_REFGND1","System reference ground",null,"Ground",null,null,"Sensitive ground","N/A",null,null,null,"GND_ANA"]
["LOW-DROPOUT REGULATORS (INTERNAL)","LDOVRTC_OUT","A8","Output","VDD_LDOVRRTC_3P3V","LDOVRTC output voltage","External capacitor","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.7μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","N/A","2.5-5.25 during on mode, 1.9-3.1 during backup mode\n",25,"NA","PBKG"]
["LOW-DROPOUT REGULATORS (INTERNAL)","LDOVANA_OUT","C8","Output","VDD_LDOVANA_3P3V","LDOVANA output voltage","External capacitor","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.7μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","N/A","2.5-5.25 during on mode, 1.9-3.1 during backup mode\n",10,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW DROPOUT REGULATORS","LDO12_IN","A6","PWR",null,"Power input voltage for LDO1 and LDO2 regulator","External power supply","Input capacitor to ground","2.2 μF, 6.3V (for high VIN, choose higher rated one, e.g.10V)\nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)  (for high input voltages use higher rated capacitor, e.g. 10V)","Placement close to the Device Ball.\nLarge trace to input capacitor, use many vias.","External power supply","1.2-5.25","-","NA","PBKG"]
["LOW DROPOUT REGULATORS","LDO1_OUT","C6","Output","VDD_LDO1_3P3V","LDO1 output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating","0.9-3.3",300,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW DROPOUT REGULATORS","LDO2_OUT","B6","Output","VDD_LDO2_3P3V","LDO2 output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating","0.9-3.3",300,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW DROPOUT REGULATORS","LDO34_IN","L12","PWR",null,"Power input voltage for LDO3 and LDO4 regulator ","External power supply","Input capacitor to ground","2.2 μF, 6.3V (for high VIN, choose higher rated one, e.g.10V)\nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)  (for high input voltages use higher rated capacitor, e.g. 10V)","Placement close to the Device Ball.\nLarge trace to input capacitor, use many vias.","External power supply","1.75-5.25","-","NA","PBKG"]
["LOW DROPOUT REGULATORS","LDO34_IN","L13","PWR",null,"Power input voltage for LDO3 and LDO4 regulator ","External power supply",null,null,null,"Placement close to the Device Ball.\nLarge trace to input capacitor, use many vias.","External power supply","1.75-5.25","-","NA","PBKG"]
["LOW DROPOUT REGULATORS","LDO3_OUT","K11","Output","VDD_LDO3_3P3V","LDO3 output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating","0.9-3.3",200,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW DROPOUT REGULATORS","LDO4_OUT","K12","Output","VDD_LDO4_3P3V","LDO4 output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating","0.9-3.3",200,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW DROPOUT REGULATORS","LDO9_IN","C4","PWR","VDD_LDO9_VIN_6P0V","Power input voltage for LDO9 regulator","External power supply","Input capacitor to ground","2.2 μF, 6.3V (for high VIN, choose higher rated one, e.g.10V)\nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)  (for high input voltages use higher rated capacitor, e.g. 10V)","Placement close to the Device Ball.\nLarge trace to input capacitor, use many vias.","External power supply","1.75-5.25","-","NA","PBKG"]
["LOW DROPOUT REGULATORS","LDO9_OUT","A5","Output","VDD_LDO9_3P3V","LDO9 output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.7μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating",3.3,50,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW DROPOUT REGULATORS","LDOUSB_IN1","A10","PWR",null,"Power input voltage 1 for LDOUSB regulator ","External power supply","Input capacitor to ground","2.2 μF, 6.3V (for high VIN, choose higher rated one, e.g.10V)\nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)  (for high input voltages use higher rated capacitor, e.g. 10V)","Placement close to the Device Ball.\nLarge trace to input capacitor, use many vias.","External power supply","3.6-5.25","-","NA","PBKG"]
["LOW DROPOUT REGULATORS","LDOUSB_IN2","A9","PWR","VDD_LDOVUSB_VIN_NEGHV","Power input voltage 2 for LDOUSB regulator","Exteranal power supply","Input capacitor to ground","-","-","-","External power supply","4.3-5.25","-","NA","PBKG"]
["LOW DROPOUT REGULATORS","LDOUSB_OUT","B9","Output","VDD_LDOVUSB_3P3V","LDOUSB output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.7μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating","0.9-3.3",100,"Depend on register \nsetting during \nOFF state","PBKG"]
["LOW NOISE DROPOUT REGULATORS","LDOLN_IN","C5","PWR","VDD_LDOLN_VIN_6P0V","Power input voltage for LDOLN regulator","External power supply","Input capacitor to ground","2.2 μF, 6.3V (for high VIN, choose higher rated one, e.g.10V)\nmin 0.6 μF max2.2μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)  (for high input voltages use higher rated capacitor, e.g. 10V)","Placement close to the Device Ball.\nLarge trace to input capacitor, use many vias.","External power supply","1.75-5.25","-","NA","PBKG"]
["LOW NOISE DROPOUT REGULATORS","LDOLN_OUT","B5","Output","VDD_LDOLN_3P3V","LDOLN output voltage","External power input","Output capacitor to ground","2.2 μF 6V3 \nmin 0.6 μF max2.7μF","Murata GCM188R70J225KE2215D 2.2 μF 6V3 (0603)","Placement close to the device ball \nLarge trace to cap","Floating","0.9-3.3",50,"Depend on register \nsetting during \nOFF state","PBKG"]
["REFERENCE","VBG","B7","Output","PAD_VBG_3P3V","Bandgap reference voltage","Capacitor","Capacitor to REFGND","100 nF 6V3","Murata GCM155R71C104KA55 100nF, 16V (0402)","Sensitive signal\nplace on top layer","N/A","-","-","NA","REFGND1"]
["SIGMA-DELTA GPADC","GPADC_VREF","B4","Output","PAD_SH_GPADC_VREF_1P8V","GPADC output reference voltage","External device","If NTC resister is used to improve the measurement accuracy, conncted to the resister between GPADC_IN1. ","-","-","-","Floating","VANA","-","NA","GND_ANA"]
["SIGMA-DELTA GPADC","GPADC_IN0","B2","Input","PAD_STR_SH_GPADC_IN0_1P8V","GPADC input 0","External device","-","-","-","Sensitive node. \nAvoid switching nodes close to net","Ground","0-1.25","-","NA","GND_ANA"]
["SIGMA-DELTA GPADC","GPADC_IN1","C2","Input","PAD_SH_GPADC_IN1_1P8V","GPADC input 1","External device","If NTC resister is used to improve the measurement accuracy, Two resistors, one in parallel with the NTC resistor and the other one between GPADC_IN1 and GPADC_VREF","-","-","Sensitive node. \nAvoid switching nodes close to net","Ground","0-1.25","-","NA","GND_ANA"]
["SIGMA-DELTA GPADC","GPADC_IN2","C3","Input","PAD_SH_GPADC_IN2_3P3V","GPADC input 2","External device","-","-","-","Sensitive node. \nAvoid switching nodes close to net","Ground","0-2.5","-","NA","GND_ANA"]
["POWER DETECTION","VCC_SENSE2","A11","Input",null,"System supply sense line","External device","-","-","-","-","External power supply","-","-","NA","GND_DIG"]
["POWER DETECTION","VCC_SENSE","B3","Input","VDD_VCC_SENSE_6P0V","System supply sense line","External device","-","-","-","-","External power supply","-","-","NA","GND_DIG"]
["POWER DETECTION","VBUS","D8","Input",null,"VBUS Detection Voltage",null,null,null,null,null,"Ground",null,null,"NA"]
["PROGRAMMING, TESTING","VPROG","N12","I/O","VPROG","Primary function: OTP programming voltage\nSecondary function: TESTV","Floating","-","Ground","-","-","Ground","-","-","NA","GND_DIG"]
["SYSTEM CONTROL","POWERGOOD","J7","Output","PAD_POWERGOOD_1P8V","Indication signal for valid regulator output voltages","External device","pull-up resistor to VRTC 10k..100kOhm","pull-up resistor to VRTC 10k..100kOhm","-","-","Floating","VRTC","-","NA","GND_DIG"]
["SYSTEM CONTROL","GPIO_0","B12","I/O","PAD_GPIO0_6P0V","General-purpose input/open-drain output with optional PPU/PPD.\nDefault: input with PPD","External device","When external device is useed, external device is connected","-","-","-","Ground \nor \nexternal power supply","VRTC \n(5.25V tolerance)","-","PUPD","GND_DIG"]
["SYSTEM CONTROL","GPIO_1","C13","Primary: I/O\nSecondary: Output","PAD_GPIO1_6P0V","Primary function: General-purpose (input/output)\nSecondary function: VBUSDET – VBUS detection","External device","When external device is useed, external device is connected. For debugging purpose provide an uninstalled pull-up to VRTC","-","-","-","Primary function: Floating\nSecondary function: N/A","VSYS\n(VCCx)","-","PUPD when GPIO","GND_DIG"]
["SYSTEM CONTROL","GPIO_2","A12","Primary: I/O\nSecondary: Output","PAD_GPIO2_6P0V","Primary function: General-purpose (input/output)\nSecondary function: REGEN2 - External regulator enable output 2","External device","When external device is useed, external device is connected","-","-","-","Primary function: Floating\nSecondary function: N/A","VSYS\n(VCCx)","-","PUPD when GPIO","GND_DIG"]
["SYSTEM CONTROL","GPIO_3","H9","I/O","PAD_GPIO3_6P0V","General-purpose input/open-drain output with optional PPU/PPD.\nDefault: input with PPD","External device","When external device is useed, external device is connected","-","-","-","Ground","VRTC \n(5.25V tolerance)","-","PUPD","GND_DIG"]
["SYSTEM CONTROL","GPIO_4","K10","Primary: I/O\nSecondary: Output","PAD_GPIO4_1P8V","Primary function: General-purpose (input/output)\nSecondary function: SYSEN1 – External system enable","External device","When external device is useed, external device is connected","-","-","-","Primary function: Floating\nSecondary function: N/A","VIO\n(VIO_IN)","-","PUPD when GPIO","GND_DIG"]
["SYSTEM CONTROL","GPIO_5","C10","Primary: I/O\nSecondary: Output","PAD_GPIO5_1P8V","Primary function: General-purpose (input/output)\nSecondary function: CLK32KGO1V8 - 32-kHz digital-gated output clock available when VRTC is present","External device","When external device is useed, external device is connected","-","-","-","Primary function: Ground\nSecondary function: Floating","VRTC","-","PUPD when GPIO","GND_DIG"]
["SYSTEM CONTROL","GPIO_6","N11","Primary: I/O\nSecondary: Output","PAD_GPIO6_1P8V","Primary function: General-purpose (input/output)\nSecondary function: SYSEN2, External system enable","External device","When external device is useed, external device is connected","-","-","-","Primary function: Floating\nSecondary function: N/A","VIO\n(VIO_IN)","-","PUPD when GPIO","GND_DIG"]
["SYSTEM CONTROL","GPIO_7","G9","Primary: I/O\nSecondary: Input","PAD_GPIO7_6P0V","Primary function: General-purpose (input/output)\nSecondary function: POWERHOLD input","External device","When external device is useed, external device is connected. For POWERHOLD -function provide A high-active signal or tie to VRTC or VSYS.","-","-","-","Ground or VRTC","VRTC \n(5.25V tolerance)",null,"PUPD when GPIO","GND_DIG"]
["SYSTEM CONTROL","I2C2_SCL_SCE","M3","I/O","PAD_I2C2_SCL_SCE_1P8V","DVS I2DVS IC serial clock (external pullup)/SPI enable signal or I2C serial clock (external pullup)","External device","When I2C interface is used, external pull-up resistor to VIO(VIO_IN)","A pull-up resistor is defined based on I2C AC timing cgaracterisrics.","-","Placement close to VIO(VIO_IN) and \nthe device ball trace.","Floating","VIO(VIO_IN)","-","NA","GND_DIG"]
["SYSTEM CONTROL","I2C1_SDA_SDI","L2","I/O","PAD_I2C1_SDA_SDI_1P8V","Control I2C serial bidirectional data (external pullup)/SPI data sign","External device","When I2C interface is used, external pull-up resistor to VIO(VIO_IN)","A pull-up resistor is defined based on I2C AC timing cgaracterisrics.","-","Placement close to VIO(VIO_IN) and \nthe device ball trace.","N/A","VIO(VIO_IN)","-","NA","GND_DIG"]
["SYSTEM CONTROL","BOOT1","K7","Input","PAD_BOOT1_1P8V","Boot ball 1 for power-up sequence selection","External device","Ground or VRTC. For debugging purpose provide a pull-down and uninstalled pull-up to VRTC","-","-","-","Ground or VRTC","VRTC","-","NA","GND_DIG"]
["SYSTEM CONTROL","BOOT0","L3","Input","PAD_BOOT0_1P8V","Boot ball 0 for power-up sequence selection","External device","Ground or VRTC. For debugging purpose provide a pull-down and uninstalled pull-up to VRTC","-","-","-","Ground or VRTC","VRTC","-","NA","GND_DIG"]
["SYSTEM CONTROL","PWRDOWN","K8","Input","PAD_PWRDOWN_6P0V","Power-down signal","External device","-","-","-","-","Floating","VRTC","-","PD","GND_DIG"]
["SYSTEM CONTROL","RESET_IN","K9","Input","PAD_RESET_IN_6P0V","Reset input","External device","-","-","-","-","VRTC","VRTC, \nfail-safe(5.25V tolerance)","-","PD","GND_DIG"]
["SYSTEM CONTROL","I2C1_SCL_SCK","L1","I/O","PAD_I2C1_SCL_SCK_1P8V","Control I2C serial clock (external pullup)/SPI clock signal","External device","When I2C interface is used, external pull-up resistor to VIO(VIO_IN)","A pull-up resistor is defined based on I2C AC timing cgaracterisrics.","-","Placement close to VIO(VIO_IN) and \nthe device ball trace.","N/A","VIO(VIO_IN)","-","NA","GND_DIG"]
["SYSTEM CONTROL","INT","K1","Output","PAD_INT_1P8V","Maskable interrupt output request to the host processor","External device","-","-","-","-","Floating","VIO(VIO_IN)","-","NA","GND_DIG"]
["SYSTEM CONTROL","I2C2_SDA_SDO","H8","I/O","PAD_I2C2_SDA_SDO_1P8V","Digital voltage scaling (DVS) I2C serial bidirectional data (external pullup)/SPI data read signal or I2C serial bidirectional data (external pullup)","External device","When I2C interface is used, external pull-up resistor to VIO(VIO_IN)","A pull-up resistor is defined based on I2C AC timing cgaracterisrics.","-","Placement close to VIO(VIO_IN) and \nthe device ball trace.","Floating","VIO(VIO_IN)","-","NA","GND_DIG"]
["SYSTEM CONTROL","ENABLE1","J5","Input","PAD_ENABLE1_1P8V","Peripheral power request input 1","External device","-","-","-","-","Floating","VIO\n(VIO_IN)","-","PUPD","GND_DIG"]
["SYSTEM CONTROL","RESET_OUT","G6","Output","PAD_RESET_OUT_1P8V","System reset/power on output (Low–Reset, High–Active/Sleep)","External device","When external device is useed, external device is connected","Processor reset ","optional 100k pull down to ensure Reset is pulled low","-","Floating","VIO_IN","-","NA","GND_DIG"]
["SYSTEM CONTROL","PWRON","G8","Input","PAD_PWRON_6P0V","External power-on event (on-button switch-on event)","Push button (switch) to ground","Push button (switch) to ground","-","Push button (switch) to ground","-","Floating","External power supply","-","PU","GND_DIG"]
["SYSTEM CONTROL","RPWRON","C11","Input","PAD_RPWRON_6P0V","External remote switch-on event","External device","-","-","-","-","Floating","External power supply","-","PU","GND_DIG"]
["SYSTEM CONTROL","REGEN1","F8","Output","PAD_REGEN1_6P0V","External regulator enable output 1","External device","-","-","-","-","Floating","External power supply","-","PUPD","GND_DIG"]
["SYSTEM CONTROL","NSLEEP","E5","Input","PAD_NSLEEP_1P8V","NSLEEP request signal","External device","-","-","-","-","Floating","VRTC","-","PUPD","GND_DIG"]
["SYSTEM CONTROL","NRESWARM","E6","Input","PAD_NRESWARN_1P8V","Warm Reset input","External device","-","-","-","-","Floating","VRTC","-","PU","GND_DIG"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_IN","D11","PWR","VDD_SMPS123_PVIN1_6P0V","Power input voltage for SMPS1","External power supply","Input capacitor to SMPS1_GND","Typ 4.7 uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS1_GND"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_IN","D12",null,"VDD_SMPS123_PVIN1_6P0V"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_IN","D13",null,"VDD_SMPS123_PVIN1_6P0V"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_SW","E11","Output","PAD_SMPS123_SW1_6P0V","Switch node of SMPS1","External inductor","Inductor to SMPS1 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place as close to the output-ball. Top layer routing. Trace as wide as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",3000,"NA","SMPS1_GND"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_SW","E12",null,"PAD_SMPS123_SW1_6P0V"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_SW","E13",null,"PAD_SMPS123_SW1_6P0V"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_GND","D10","GND","GND_SMPS123_PGND1","Power GND connection for SMPS1","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","-","-","NA","SMPS1_GND"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_GND","E9",null,"VDD_SMPS123_PGND1"]
["STEP-DOWN CONVERTERS (SMPS1)","SMPS1_GND","E10",null,"GND_SMPS123_PGND1"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_IN","G11","PWR","VDD_SMPS123_PVIN2_6P0V","Power input voltage for SMPS2","External power supply","Cap to SMPS1_GND and SMPS2_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS2_GND"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_IN","G12",null,"VDD_SMPS123_PVIN2_6P0V"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_IN","G13",null,"VDD_SMPS123_PVIN2_6P0V"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_SW","F11","Output","PAD_SMPS123_SW2_6P0V","Switch node of SMPS2","External inductor","Inductor to SMPS２ and Inductor to capacitor","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the output-ball. Top layer routing.  Trace as large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",3000,"NA","SMPS2_GND"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_SW","F12",null,"PAD_SMPS123_SW2_6P0V"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_SW","F13",null,"PAD_SMPS123_SW2_6P0V"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_GND","F10","GND","GND_SMPS123_PGND2","Power GND connection for SMPS2","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","-","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_GND","F9",null,"GND_SMPS123_PGND2"]
["STEP-DOWN CONVERTERS (SMPS2)","SMPS2_GND","G10",null,"GND_SMPS123_PGND2"]
["STEP-DOWN CONVERTERS (SMPS1_2)","SMPS1_2_FDBK","B13","Input","PAD_SMPS12_VFDBK_3P3V","Output voltage-sense (feedback) input for SMPS1 and 2","When dual-phase configuration, connected to external inductor and capacitor for SMPS1_SW and SMPS2_SW , ideally at decoupling capacitor of the load.\nWhen triple-phase configuration, connected to external inductor and capacitor for SMPS1_SW, SMPS2_SW and SMPS3_SW","-","-","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node and route close to FDBK_GND\nFeedback and feedback ground must be route as differential traces to avoid mismatch. ","Ground","0.7 – 3.3V","NA","-","SMPS1_2_FDBK_GND"]
["STEP-DOWN CONVERTERS (SMPS1_2)","SMPS1_2_FDBK_GND","C12","GND","PAD_SMPS12_SGND_3P3V","Ground-sense (feedback) input for SMPS1 and 2","via 0-Ohm resistor to ground-pin of decoupling capacitor of the load. The resistor allows for a RC-filtering with input capacitance of the pin in case of coupled noise.","-","0-Ohm resistor","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node \nFeedback and feedback ground must be route as differential traces to avoid mismatch. ","Ground","GND","NA","-","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_IN","H11","PWR","VDD_SMPS123_PVIN3_6P0V","Power input voltage for SMPS3","External power supply","Cap to SMPS1_GND and SMPS3_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS3_GND"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_IN","H12",null,"VDD_SMPS123_PVIN3_6P0V"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_IN","H13",null,"VDD_SMPS123_PVIN3_6P0V"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_SW","J11","Output","PAD_SMPS123_SW3_6P0V","Switch node of SMPS3","External inductor","Inductor to SMPS３ and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF (per Phase) is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",3000,"NA","SMPS3_GND"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_SW","J12",null,"PAD_SMPS123_SW3_6P0V"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_SW","J13",null,"PAD_SMPS123_SW3_6P0V"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_GND","H10","GND","GND_SMPS123_PGND3","Power GND connection for SMPS4","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","-","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_GND","J9",null,"GND_SMPS123_PGND3"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_GND","J10",null,"GND_SMPS123_PGND3"]
["STEP-DOWN CONVERTERS (SMPS3)","SMPS3_FDBK","K13","Input","PAD_SMPS123_SPHASE_VFDBK_3P3V","Output voltage-sense (feedback) input for SMPS3","Output capacitor of SMPS3","-","-","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node ","Floating","0.7 – 3.3V","NA",null,"SMPS3_GND"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_IN","F1","PWR","VDD_SMPS45_PVIN4_6P0V","Power input voltage for SMPS4","External power supply","5ntput capacitor to SMPS4_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS4_GND"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_IN","F2",null,"VDD_SMPS45_PVIN4_6P0V"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_IN","F3",null,"VDD_SMPS45_PVIN4_6P0V"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_SW","G1","Output","PAD_SMPS45_SW4_6P0V","Switch node of SMPS4","External inductor","Inductor to SMPS4 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH.\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF (per Phase) is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",2000,"NA","SMPS4_GND"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_SW","G2",null,"PAD_SMPS45_SW4_6P0V"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_SW","G3",null,"PAD_SMPS45_SW4_6P0V"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_GND","F4","GND","GND_SMPS45_PGND4","Power GND connection for SMPS4","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","-","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_GND","G4",null,"GND_SMPS45_PGND4"]
["STEP-DOWN CONVERTERS (SMPS4)","SMPS4_GND","G5",null,"GND_SMPS45_PGND4"]
["STEP-DOWN CONVERTERS (SMPS4_5)","SMPS4_5_FDBK","K2","Input","PAD_SMPS45_VFDBK_3P3V","Output voltage-sense (feedback) input for SMPS4 and 5","Connected to external inductor and capacitor for SMPS4_SW and SMPS5_SW, ideally at decoupling capacitor of the load.","-","-","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node \nFeedback and feedback ground must be route as differential traces to avoid mismatch. ","Ground","0.7 – 3.3V","NA",null,"SMPS4_5_FDBK_GND"]
["STEP-DOWN CONVERTERS (SMPS4_5)","SMPS4_5_FDBK_GND","K3","GND","PAD_SMPS45_SGND_3P3V","Ground-sense (feedback) input for SMPS4 and SMPS5","via 0-Ohm resistor to ground-pin of decoupling capacitor of the load. The resistor allows for a RC-filtering with input capacitance of the pin in case of coupled noise.","-","0-Ohm resistor","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node \nFeedback and feedback ground must be route as differential traces to avoid mismatch. ","Ground","GND","NA","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_IN","J1","PWR","VDD_SMPS45_PVIN5_6P0V","Power input voltage for SMPS5","External power supply","Output capacitor to SMPS5_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS5_GND"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_IN","J2",null,"VDD_SMPS45_PVIN5_6P0V"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_IN","J3",null,"VDD_SMPS45_PVIN5_6P0V"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_SW","H1","Output","PAD_SMPS45_SW5_6P0V","Switch node of SMPS5","External inductor","Inductor to SMPS5 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF (per Phase) is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V",2000,"NA","SMPS5_GND"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_SW","H2",null,"PAD_SMPS45_SW5_6P0V"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_SW","H3",null,"PAD_SMPS45_SW5_6P0V"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_GND","H4","GND","GND_SMPS45_PGND5","Power GND connection for SMPS5","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","GND","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_GND","H5",null,"GND_SMPS45_PGND5"]
["STEP-DOWN CONVERTERS (SMPS5)","SMPS5_GND","J4",null,"GND_SMPS45_PGND5"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_IN","N6","PWR","VDD_SMPS6_PVIN_6P0V","Power input voltage for SMPS6","External power supply","Output capacitor to SMPS6_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS6_GND"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_IN","M6",null,"VDD_SMPS6_PVIN_6P0V"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_SW","M5","Output","PAD_SMPS6_SW_6P0V","Switch node of SMPS6","External inductor","Inductor to SMPS6 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ","2000 (with boost-option: 3000)","NA","SMPS6_GND"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_SW","N5",null,"PAD_SMPS6_SW_6P0V"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_GND","L5","GND","GND_SMPS6_PGND","Power GND connection for SMPS6","System ground plane","-","-",null,"Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","GND","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_GND","L6",null,"GND_SMPS6_PGND"]
["STEP-DOWN CONVERTERS (SMPS6)","SMPS6_FDBK","K6","Input","PAD_SMPS6_VFDBK_3P3V","Output voltage sense (feedback) input for SMPS6","Connceted to external inductor and capacitor for SMPS6_SW,  ideally close to the load / decoupling capacitance","-","-","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node ","Ground","0.7 – 3.3V","NA",null,"SMPS6_GND"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_IN","E1","PWR","VDD_SMPS7_PVIN_6P0V","Power input voltage for SMPS7","External power supply","Input capacitor to SMPS7_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS6_GND"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_IN","E2",null,"VDD_SMPS7_PVIN_6P0V"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_IN","E3",null,"VDD_SMPS7_PVIN_6P0V"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_SW","D1","Output","PAD_SMPS7_SW_6P0V","Switch node of SMPS7","External inductor","Inductor to SMPS7 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHAY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",2000,"NA","SMPS7_GND"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_SW","D2",null,"PAD_SMPS7_SW_6P0V"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_SW","D3",null,"PAD_SMPS7_SW_6P0V"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_GND","D4","GND","GND_SMPS7_PGND","Power GND connection for SMPS7","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","GND","-","NA","SMPS'_GND"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_GND","D5",null,"GND_SMPS7_PGND"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_GND","E4",null,"GND_SMPS7_PGND"]
["STEP-DOWN CONVERTERS (SMPS7)","SMPS7_FDBK","B1","Input","PAD_SMPS7_VFDBK_3P3V","Output voltage-sense (feedback) input for SMPS7","Connceted to external inductor and capacitor for SMPS7_SW,  ideally close to the load / decoupling capacitance","-","-","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node ","Floating","0.7 – 3.3V","NA","NA","SMPS7_GND"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_IN","N9","PWR","VDD_SMPS8_PVIN_6P0V","Power input voltage for SMPS8","External power supply","Output capacitor to SMPS8_GND",null,"MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS8_GND"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_IN","M9",null,"VDD_SMPS8_PVIN_6P0V"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_SW","M10","Output","PAD_SMPS8_SW_6P0V","Switch node of SMPS8","External inductor","Inductor to SMPS8 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",1000,"NA","SMPS8_GND"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_SW","N10",null,"PAD_SMPS8_SW_6P0V"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_GND","L10","GND","GND_SMPS8_PGND","Power GND connection for SMPS8","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","GND","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_GND","L9",null,"GND_SMPS8_PGND"]
["STEP-DOWN CONVERTERS (SMPS8)","SMPS8_FDBK","L11","Input","PAD_SMPS8_VFDBK_3P3V","Output voltage-sense (feedback) input for SMPS8","Connceted to external inductor and capacitor for SMPS8_SW, ideally close to the load / decoupling capacitance","-","-","-","SENSITIVE SIGNAL\nAvoid crosstalk with switching node ","Ground","0.7 – 3.3V","-","NA","SMPS8_GND"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_IN","N8","PWR","VDD_SMPS9_PVIN_6P0V","Power input voltage for SMPS9","External power supply","Output capacitor to SMPS9_GND","Typ 4.7uF","MURATA GCM21BC71A475MA73(0805) 4.7uF 10V (for VSYS=5V use higher rated capacitors, e.g. 10V)","Place capacitor close to the Device Ball.\nWide trace to input capacitor, use many vias. Keep inductance between Cin and SMPSx_IN <0.5nH and Cin and SMPSx_GND <0.5nH.\nAvoid crosstalk with switching node ","External power supply","3.135-5.25","-","NA","SMPS9_GND"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_IN","M8",null,"VDD_SMPS9_PVIN_6P0V"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_SW","M7","Output","PAD_SMPS9_SW_6P0V","Switch node of SMPS9","External inductor","Inductor to SMPS9 and Inductor to cap","Typ 1 μH\nmin 0.84uH max 1.3uH\nDCR max 100mOhms  \n\nTyp 47uF\nmin 33uF max 57uF NOTE: 57uF is maximum capacitive load including decoupling at load. Reduce output-capacitors to 22uF if needed)","VISHY IHLP1616ABER1R0M11 1uH/4.5A\n\nMURATA GCM32ER70J476KE19 (1210) 47uF 6.3V","Place  close to the ball out.Top layer routing.  Trace large as possible\nThis is a very aggressive signal for other sensitive trace (eg. FDBK).","Floating","0 – 5.25V ",1000,"NA","SMPS9_GND"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_SW","N7",null,"PAD_SMPS9_SW_6P0V"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_GND","L7","GND","GND_SMPS9_PGND","Power GND connection for SMPS9","System ground plane","-","-","-","Connected as direct as possible from the ball  to the associated input and output capacitor ground.\nConnected to dedicated ground plan under SMPSx components.\nKeep a strong link with the global ground plane to avoid any layout resitance over differents grounds \nTransient current can create Difference of potential if layout is not optimized for SMPS, use many vias\n","Ground","GND","-","NA","System ground plane"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_GND","L8",null,"GND_SMPS9_PGND"]
["STEP-DOWN CONVERTERS (SMPS9)","SMPS9_FDBK","J8","Input","PAD_SMPS9_VFBK_3P3V","Output voltage-sense (feedback) input for SMPS9","Connceted to external inductor and capacitor for SMPS9_SW,  ideally close to the load / decoupling capacitance","-","-","-","-","Ground","0.7 – 3.3V","-","NA","SMPS9_GND"]
["DC/DC switching frequency sync input","SYNCDCDC","B8","Input",null,"Sync pin to sync DC-DCs with external clock","External device","Sync pin to sync DC-DCs with external clock","-","-","-","GND","-","-","-","GND_DIG"]