Sl No |
Test ID |
Test Name |
Test Result |
|---|
1 |
TEST.PD.PROT.SNK.4 |
FAIL |
Test Status |
Test Description |
|---|
  |
  |
  |
 COMMON.PROC.BU.2: |
  |
 COMMON.PROC.BU.2 - REVISION_2_0 Rev2Snk: |
  |
                    SourceCap Packet14 |
  |
                          UUT should respond with request - - COMMON.PROC.BU.2#1: |
  |
                                   Request Packet28 |
  |
 COMMON.PROC.BU.2 - REVISION_3_0 Rev3ChkdSnk: |
  |
                    SourceCap Packet53 |
  |
                          UUT should respond with request - - COMMON.PROC.BU.2#1: |
  |
                                   Request Packet64 |
  |
 Rev2Snk: |
  |
                          SinkWaitCapTimer Timeout - TEST.PD.PROT.SNK.4#1: |
  |
                                   UUT failed to send HardReset message |
  |
 Rev3ChkdSnk: |
  |
                          SinkWaitCapTimer Timeout - TEST.PD.PROT.SNK.4#1: |
  |
                                   UUT failed to send HardReset message |
Index |
   Start time(s.ms.μs.ns) |
   Stop time(s.ms.μs.ns) |
Message Origin |
 Message |
  |
 Secondary Message |
 SOP |
 Port Type |
 Msg ID |
 PDO |
 Header(MSB to LSB) |
 Payload(LSB to MSB) |
|---|---|---|---|---|---|---|---|---|---|---|---|
TEST_PD_PROT_SNK_4_SinkWaitCapTimer_Timeout |
|||||||||||
Port A Packet Details |
|||||||||||
4 |
635.3 mS |
635.3 mS |
T-> |
Ra_Asserted |
NONE |
NONE/NONE/R- |
0 |
Ra_CC2 |
0x0000 |
||
7 |
635.3 mS |
635.3 mS |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||
10 |
635.4 mS |
635.4 mS |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Disabled -> FSM_State_Unattached_SRC |
0x0000 |
||
11 |
637.0 mS |
637.0 mS |
T-> |
Attach |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|
12 |
637.0 mS |
637.0 mS |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC |
0x0000 |
||
13 |
787.1 mS |
787.1 mS |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_AttachWait_SRC -> FSM_State_Attached_SRC |
0x0000 |
||
14 |
837.9 mS |
838.5 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
0 |
 FS: 5V ,1A; |
0x1161 |
0x0A-0x90-0x01-0x28- |
|
15 |
840.5 mS |
841.1 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
0 |
 FS: 5V ,1A; |
0x1161 |
0x0A-0x90-0x01-0x28- |
|
16 |
843.0 mS |
843.6 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
0 |
 FS: 5V ,1A; |
0x1161 |
0x0A-0x90-0x01-0x28- |
|
17 |
845.6 mS |
846.2 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
0 |
 FS: 5V ,1A; |
0x1161 |
0x0A-0x90-0x01-0x28- |
|
18 |
947.7 mS |
948.3 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
1 |
 FS: 5V ,1A; |
0x1361 |
0x0A-0x90-0x01-0x28- |
|
19 |
950.2 mS |
950.8 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
1 |
 FS: 5V ,1A; |
0x1361 |
0x0A-0x90-0x01-0x28- |
|
20 |
952.8 mS |
953.4 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
1 |
 FS: 5V ,1A; |
0x1361 |
0x0A-0x90-0x01-0x28- |
|
21 |
955.3 mS |
955.9 mS |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
1 |
 FS: 5V ,1A; |
0x1361 |
0x0A-0x90-0x01-0x28- |
|
22 |
1,058 S |
1,058 S |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
2 |
 FS: 5V ,1A; |
0x1561 |
0x0A-0x90-0x01-0x28- |
|
23 |
1,060 S |
1,061 S |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
2 |
 FS: 5V ,1A; |
0x1561 |
0x0A-0x90-0x01-0x28- |
|
24 |
1,063 S |
1,063 S |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
2 |
 FS: 5V ,1A; |
0x1561 |
0x0A-0x90-0x01-0x28- |
|
25 |
1,065 S |
1,066 S |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
2 |
 FS: 5V ,1A; |
0x1561 |
0x0A-0x90-0x01-0x28- |
|
26 |
1,168 S |
1,168 S |
T-> |
SourceCap |
SOP |
DFP/Source/R2 |
3 |
 FS: 5V ,1A; |
0x1761 |
0x0A-0x90-0x01-0x28- |
|
27 |
1,168 S |
1,169 S |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
3 |
0x0641 |
|||
28 |
1,173 S |
1,174 S |
<-D |
Request |
SOP |
UFP/Sink/R2 |
0 |
PDO#1 Fixed; OpCurrent = 0,1A; MaxCurrent = 3A |
0x1042 |
0x2C-0x29-0x00-0x15- |
|
29 |
1,174 S |
1,174 S |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
0 |
0x0121 |
|||
30 |
1,174 S |
1,175 S |
T-> |
Accept |
SOP |
DFP/Source/R2 |
4 |
0x0963 |
|||
31 |
1,175 S |
1,175 S |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
4 |
0x0841 |
|||
32 |
1,495 S |
1,495 S |
T-> |
PS_RDY |
SOP |
DFP/Source/R2 |
5 |
0x0B66 |
|||
33 |
1,495 S |
1,496 S |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
5 |
0x0A41 |
|||
37 |
2,638 S |
2,638 S |
T-> |
Hard_Reset |
HARD_RESET |
NONE/NONE/R- |
0 |
0x0000 |
|||
39 |
5,643 S |
5,643 S |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Attached_SRC -> FSM_State_Disabled |
0x0000 |
||
40 |
5,643 S |
5,643 S |
T-> |
Detach |
NONE |
NONE/NONE/- |
0 |
NONE |
0x0000 |
||
41 |
5,645 S |
5,645 S |
<-D |
NONE |
LOAD_CURRENT |
NONE |
NONE/NONE/R- |
0 |
LOAD_CURRENT:0A |
0x0000 |
|
42 |
6,644 S |
6,644 S |
T-> |
Ra_Asserted |
NONE |
NONE/NONE/R- |
0 |
Ra_CC2 |
0x0000 |
||
47 |
6,644 S |
6,644 S |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||
48 |
6,644 S |
6,644 S |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Disabled -> FSM_State_Unattached_SRC |
0x0000 |
||
49 |
6,646 S |
6,646 S |
T-> |
Attach |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|
50 |
6,646 S |
6,646 S |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Unattached_SRC -> FSM_State_AttachWait_SRC |
0x0000 |
||
51 |
6,796 S |
6,796 S |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_AttachWait_SRC -> FSM_State_Attached_SRC |
0x0000 |
||
53 |
6,843 S |
6,843 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
0 |
 FS: 5V ,1A; |
0x11A1 |
0x0A-0x90-0x01-0x28- |
|
54 |
6,845 S |
6,846 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
0 |
 FS: 5V ,1A; |
0x11A1 |
0x0A-0x90-0x01-0x28- |
|
55 |
6,848 S |
6,848 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
0 |
 FS: 5V ,1A; |
0x11A1 |
0x0A-0x90-0x01-0x28- |
|
56 |
6,953 S |
6,953 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
1 |
 FS: 5V ,1A; |
0x13A1 |
0x0A-0x90-0x01-0x28- |
|
57 |
6,955 S |
6,956 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
1 |
 FS: 5V ,1A; |
0x13A1 |
0x0A-0x90-0x01-0x28- |
|
58 |
6,958 S |
6,958 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
1 |
 FS: 5V ,1A; |
0x13A1 |
0x0A-0x90-0x01-0x28- |
|
59 |
7,063 S |
7,063 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
2 |
 FS: 5V ,1A; |
0x15A1 |
0x0A-0x90-0x01-0x28- |
|
60 |
7,065 S |
7,066 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
2 |
 FS: 5V ,1A; |
0x15A1 |
0x0A-0x90-0x01-0x28- |
|
61 |
7,068 S |
7,068 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
2 |
 FS: 5V ,1A; |
0x15A1 |
0x0A-0x90-0x01-0x28- |
|
62 |
7,173 S |
7,173 S |
T-> |
SourceCap |
SOP |
DFP/Source/R3 |
3 |
 FS: 5V ,1A; |
0x17A1 |
0x0A-0x90-0x01-0x28- |
|
63 |
7,173 S |
7,174 S |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
3 |
0x0641 |
|||
64 |
7,178 S |
7,179 S |
<-D |
Request |
SOP |
UFP/Sink/R3 |
0 |
PDO#1 Fixed; OpCurrent = 0,1A; MaxCurrent = 3A |
0x1082 |
0x2C-0x29-0x80-0x15- |
|
65 |
7,179 S |
7,179 S |
T-> |
GoodCRC |
SOP |
DFP/Source/R1 |
0 |
0x0121 |
|||
66 |
7,181 S |
7,181 S |
T-> |
Accept |
SOP |
DFP/Source/R3 |
4 |
0x09A3 |
|||
67 |
7,181 S |
7,182 S |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
4 |
0x0841 |
|||
68 |
7,504 S |
7,504 S |
T-> |
PS_RDY |
SOP |
DFP/Source/R3 |
5 |
0x0BA6 |
|||
69 |
7,504 S |
7,505 S |
<-D |
GoodCRC |
SOP |
UFP/Sink/R2 |
5 |
0x0A41 |
|||
71 |
7,505 S |
7,505 S |
T-> |
Rp_Asserted |
Rp_4_7k_3A_Asserted |
NONE |
NONE/NONE/R- |
0 |
Rp_4_7k_3A_Asserted |
0x0000 |
|
73 |
8,646 S |
8,646 S |
T-> |
Rp_Asserted |
Rp_12k_1_5A_Asserted |
NONE |
NONE/NONE/R- |
0 |
Rp_12k_1_5A_Asserted |
0x0000 |
|
74 |
8,646 S |
8,646 S |
<-D |
Rd_Detected |
NONE |
NONE/NONE/R- |
0 |
Rd in CC1; |
0x0000 |
||
78 |
8,666 S |
8,666 S |
T-> |
Hard_Reset |
HARD_RESET |
NONE/NONE/R- |
0 |
0x0000 |
|||
82 |
11.68 S |
11.68 S |
T-> |
FSM_State_Transition |
NONE |
NONE/NONE/R- |
0 |
FSM_State_Attached_SRC -> FSM_State_Disabled |
0x0000 |
||
83 |
11.68 S |
11.68 S |
T-> |
Detach |
NONE |
NONE/NONE/- |
0 |
NONE |
0x0000 |
||
84 |
11.68 S |
11.68 S |
<-D |
NONE |
LOAD_CURRENT |
NONE |
NONE/NONE/R- |
0 |
LOAD_CURRENT:0A |
0x0000 |
|
AMS Index |
AMS Name |
AMS Start |
AMS Stop |
AMS Status |
Child AMS Count |
|---|
0 |
Power_Negotiation |
14 |
33 |
COMPLETE |
0 |
1 |
Hard_Reset |
37 |
37 |
COMPLETE |
0 |
2 |
Power_Negotiation |
53 |
69 |
COMPLETE |
0 |
3 |
Hard_Reset |
78 |
78 |
COMPLETE |
0 |
4 |
NONE |
85 |
86 |
NOT_VERIFIED |
0 |
Manufacturer |
Parrot |
Model Number |
MPPUA2 |
Serial Number |
1 |
Test Lab |
Test_Engineer |
Test_Engineer |
Remarks |
Remarks |
Date_and_Time |
14/10/2025 17:21:11 |
Parameter |
Value |
|---|
GRL_USB_PD_Controller_Serial_No |
397.409.397.077.376. |
GRL_USB_PD_Software_Version |
1.6.28.0 |
GRL_USB_PD_Firmware_Version |
2.2.65 |
GRL USB-PD Ethernet Buffer Size |
62K |
GRL USB-PD Eload Firmware Version |
9.8 / 9.8 |
Calibration |
Calibration Success |
RX mask Power selection |
Neutral Power |
Device_Type |
Consumer Only |
Cable Type |
GRL_SPL_CABLE_1 |
Impedance (milli ohm) |
0 |
PD_Merged CTS Version |
v.Q4-2024 |
USB_PD_Spec Version |
Rev3.2 Ver1.1RC2 |
USB_Type_C_Spec Version |
v2.3 Oct-2023 |
VIF_File_Name |
Parrot__MPPUA2__1__0_14_10_2025.xml |
Noise Pattern Generation: |
Two-Tone Noise |
Application mode |
Informational |
Disabled all Pop-up during test execution |
False |
Pop-up Timer |
0 |
Rerun Enabled |
False |
Rerun Count |
1 |
Rerun Iteration |
0 |
UI Live Update |
False |
Execution Time(In Minutes) |
1 |
Parameter |
Value |
|---|
Connect EPR Test Fixture |
False |
FR_Swap AUTO Box Connected |
False |