** Profile: "Startup-trans"  [ C:\ELABTRANS_WS\ELABTRANS_DS\Part_Numbers\E2E_bugfix\Part_Numbers\LM25119\snvm384\LM25119_PSPICE_TRANS\lm25119_trans-pspicefiles\startup\trans.sim ] 

** Creating circuit file "trans.cir" 
** WARNING: THIS AUTOMATICALLY GENERATED FILE MAY BE OVERWRITTEN BY SUBSEQUENT SIMULATIONS

*Libraries: 
* Profile Libraries :
* Local Libraries :
***
* From [PSPICE NETLIST] section of C:\Cadence\SPB_16.2\tools\PSpice\PSpice.ini file:

*Analysis directives: 
.TRAN  0 2.0ms 0 10n SKIPBP 
.OPTIONS ABSTOL= 1.0n
.OPTIONS ITL1= 1500
.OPTIONS ITL2= 400
.OPTIONS ITL4= 400
.OPTIONS RELTOL= 0.005
.PROBE V(*) I(*) 
***
* source LM25119_TRANS
R_R3         0 UVLO  6.19k TC=0,0 
C_C18         SW1 HB1  0.47u  TC=0,0 
X_U1         VIN UVLO FB1 COMP1 RAMP1 SS1 RT RES DEMB 0 EN2 RAMP2 SS2 COMP2 FB2
+  0 0 N16950190 CS2 LO2 HO2 SW2 HB2 0 VCC2 N16939081 CS1 LO1 HO1 SW1 HB1 VCC1
+  LM25119_TRANS
R_R18         N16939081 CS1  7.4m TC=0,0 
C_C3         N16884957 0  5u  TC=0,0 
R_R14         RAMP1 SW1  73.2k TC=0,0 
C_C22         N169415391 0  470u  TC=0,0 
R_R24         N16884957 VIN  2m TC=0,0 
R_R21         VIN N16866762  100m TC=0,0 
X_X1         VIN HO1 SW1 PSMN5R5
C_C23         VOUT1 N17079816  45u  TC=0,0 
R_R6         COMP2 N16911536  36.5k TC=0,0 
R_R29         0 N17079816  5m TC=0,0 
R_RLOAD1         0 VOUT1  2.5 TC=0,0 
C_C14         FB2 COMP2  100p  TC=0,0 
C_C1         N16881984 0  5u  TC=0,0 
C_C6         0 VCC1  1u  TC=0,0 
C_C15         FB2 N16911536  6.8n  TC=0,0 
R_R8         FB1 VOUT1  6.98k TC=0,0 
C_C2         N16884791 0  5u  TC=0,0 
R_R23         N16884791 VIN  2m TC=0,0 
X_X2         SW1 LO1 CS1 PSMN5R5
D_D1         VCC1 HB1 PMEG6010 
X_X3         VIN HO2 SW2 PSMN5R5
C_C11         RES 0  0.47u  TC=0,0 
X_X4         SW2 LO2 CS2 PSMN5R5
C_C20         0 RAMP1  820p  TC=0,0 
R_R5         0 RT  22.1k TC=0,0 
R_R22         N16881984 VIN  2m TC=0,0 
R_R20         N16950190 CS2  7.4m TC=0,0 
R_R13         0 FB2  1.33k TC=0,0 
R_R30         N170154771 VOUT2  20m, TC=0,0 
R_R7         COMP1 N16890673  36.5k TC=0,0 
C_C19         SW2 HB2  0.47u  TC=0,0 
C_C26         N170154771 0  470u  TC=0,0 
C_C16         FB1 COMP1  100p  TC=0,0 
R_R15         RAMP2 SW2  73.2k TC=0,0 
R_R2         VIN UVLO  60.4k TC=0,0 
C_C17         FB1 N16890673  6.8n  TC=0,0 
C_C5         N16885836 0  5u  TC=0,0 
C_C7         0 VCC2  1u  TC=0,0 
R_R26         N16885836 VIN  2m TC=0,0 
V_Vin         N16866762 0  
+PULSE 0 36 0 100u 100u 6m 1
R_R33         0 N17079816  3m TC=0,0 
D_D2         VCC2 HB2 PMEG6010 
R_R31         0 N17020141  3m TC=0,0 
C_C4         N16885128 0  5u  TC=0,0 
X_L2         SW2 VOUT2 LDCR PARAMS:  L=15u  DCR=20m IC=0
R_R11         0 FB1  604 TC=0,0 
C_C27         VOUT2 N17020141  45u  TC=0,0 
R_R25         N16885128 VIN  2m TC=0,0 
R_R28         N169415391 VOUT1  20m, TC=0,0 
R_R32         0 N17020141  5m TC=0,0 
C_C13         SS2 0  4n IC=0 TC=0,0 
R_RLOAD2         0 VOUT2  0.77 TC=0,0 
X_L1         SW1 VOUT1 LDCR PARAMS:  L=15u  DCR=7m IC=0
C_C21         0 RAMP2  820p  TC=0,0 
R_R9         FB2 VOUT2  6.98k TC=0,0 
C_C12         SS1 0  4n IC=0 TC=0,0 
****
* LM25119
*****************************************************************************
* (C) Copyright 2013 Texas Instruments Incorporated. All rights reserved.                                            
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of 
** merchantability or fitness for a particular purpose.  The model is
** provided solely on an "as is" basis.  The entire risk as to its quality
** and performance is with the customer
*****************************************************************************
*
* This model is subject to change without notice. Texas Instruments
* Incorporated is not responsible for updating this model.
*
*****************************************************************************
*
** Released by: WEBENCH Design Center, Texas Instruments Inc.
* Part: LM25119
* Date: 25Mar2013
* Model Type: TRANSIENT
* Simulator: PSPICE
* Simulator Version: 16.2.0.p001
* EVM Order Number: AN-2066 LM25119
* EVM Users Guide: SNVA445A Revised September,2010
* Datasheet: SNVS680E Revised February,2013
*
* Model Version: Final 1.00
*
*****************************************************************************
*
* Updates:
*
* Final 1.00
* Release to Web.
*
*****************************************************************************
.SUBCKT LM25119_TRANS VIN UVLO FB COMP RAMP SS RT RES DEMB VCCDIS EN2 RAMP2 SS2 COMP2 
+FB2 GND PGND2 CSG2 CS2 LO2 HO2 SW2 BST2 PGND1 VCC2 CSG CS LO HO SW BST VCC
R_RES1 RES GND 1G
R_PGND1 PGND1 GND 1G
R_PGND2 PGND2 GND 1G
E_B10 GEN GND value = { IF(V(STANDBY) < 2.5 & V(GUVLO) > 2.5 ,  5 ,0)}
X_A13 CLK 3 INV_BASIC_GEN
E_B3 SS08 GND value = { IF(V(SS) < V (Vref) ,  V(ss) , V(Vref))}
V7 CSG GND
G_B14 GND SS value = { IF(V(ss) < 3 , 10u , 1u)}
V10 27 AMP
X21 VRamp 79 PWM COMPARX21x  PARAMS:  VHIGH=5 VLOW=0 
R28 LO1 LO 2
E_B8 9 GND value = {V(HO,SW)}
X5 SW 52 ZC COMPARX5  PARAMS:  VHIGH=5 VLOW=0 
X_A8 LOD 55 ZC ZCLO NAND3_BASIC_GEN
E_BDembThresh 75 0 value = { IF(V(SS) < .8 , 15 , 2.75)}
XVCO RT iCLK CLK_GEN
S5 SS 0 46 GND _S5_mod  
.MODEL _S5_mod vswitch VT=2.5 RON=.001 ROFF=100MEG
E_B13 30 GND value = {V(ramp)}
VIlim 32 GND DC=1.2
X1 Vramp2 35 PWM2 COMPARX21  PARAMS:  VHIGH=5 VLOW=0 
XIlimComp VRamp 32 Ilim ComparatorIlimComp  PARAMS:  VHIGH=5 VLOW=0  VHYS=50m 
R27 61 75 10
E_Bclk2 149 GND value = {5-V(iCLK)}
S3 4 GUVLO BST SW _S3_mod  
.MODEL _S3_mod vswitch VT=3 VH=0.25 ROFF=100MEG
XIlimCompx Vramp2 32 153 ComparatorIlimComp  PARAMS:  VHIGH=5  VLOW=0 VHYS=50m 
V5 4 GND DC=5
R15 GUVLO GND 1Meg
X_A10 28 46 INV_BASIC_GEN
C4 VRamp 30 100p
S4 70 GUVLO2 BST2 SW2 _S4_mod  
.MODEL _S4_mod vswitch VT=3 VH=0.25 ROFF=100MEG
V12 70 GND DC=5
R20 GUVLO2 GND 1Meg
R43 EN2 VCC2 50k
R7 ZCLOQ GND 100k
E_BStandby STANDBY GND value = { IF(V(UVLO) < 1.25 , 5 , IF( V(VCC) < 3.8 , 5 , 
+IF(V(VCC2) < 3.8,5,0)))}
E_B2 HO1 SW value = { IF(V(GEN) > 1 & V(H) > 2.5 , V(Bst,SW) , 0)}
G_B4 VCC UVLO value = { IF(V(UVLO) > 1.25 , 20u , 0)}
E_B6 LO1 GND value = { IF(V(GEN) > 1 & V(L) > 2.5 & V(ZCLOQ) < 2.5 , V(VCC) , 0)}
C21 61 0 100p
Q1 47 47 17 _Q2_mod 
.MODEL _Q2_mod PNP IS=1e-9
Q2 VCC 47 17 _Q3_mod 
.MODEL _Q3_mod PNP IS=1e-9
I4 47 GND DC=26m
E_Bramp 28 GND value = { IF(V(GEN) > 2.5 , 3 , 0)}
X_A1 Rzzz QB Q NOR2_BASIC_GEN
X3 61 DEMB 55 COMPARX5  PARAMS:  VHIGH=5 VLOW=0 
E_B1 62 GND value = { IF(V(SS) > 3 , 5 , 0)}
STrack track VRamp CLK GND _TRACK  
.MODEL _TRACK vswitch VT=2.5 RON=100m
S2 RAMP GND HOENB GND _S1_mod  
.MODEL _S1_mod vswitch VT=2.5 RON=10m
GTrack GND track CSG CS {10*1e-3}
R14 track GND 1k
X_A14 3 Q HEN AND2_BASIC_GEN
E_BVcc 17 GND value = { IF(V(UVLO) < .4 , 0 , IF( V(VIN) < 7.6 , V(VIN) ,7.6 ))}
R25 HO1 HO 2
V11 156 0 DC=0
V_A3 57_V GND 0.3
R_A3 57_V 57 1p
C6 HO SW 1p
X_A16x PWM Ilim Rzzz OR2_BASIC_GEN
D11 AMP2 GND _D9_modXX 
.MODEL _D9_modXX D IS=1.0e-21 N=2.7 VJ=.31
X_A2 Q CLK QB NOR2_BASIC_GEN
D1 COMP 78 _D2_mod 
.MODEL _D2_mod D N=1.09
V6 Vref GND DC=.8
X2 ZCLOQ ZQL LEN 57 65 ZCLO DFFSBRB_SHPBASIC_GEN 
D2 78 79 _D2_mod 
I1 77 GND DC=26m
V_A4 65_D GND 5
R_A4 65_D 65 1p
D12 GND AMP2 _D9_modX 
.MODEL _D9_modX D IS=1.0e-16 VJ=.31
X_A5 62 SSLatch 69 NOR2_BASIC_GEN
X_A7 69 STANDBY SSLatch NOR2_BASIC_GEN
C2 LRC GND 10p
R26 LRC LO1 10k
R8 79 GND 100k
C7 LO GND 1p
D4 LRC LO1 _D4_mod 
.MODEL _D4_mod D RS=10
X_A9 LRC LOD BUF_BASIC_GEN
Rdemb DEMB 0 50k
E_Brampx 85 GND value = { IF(V(GEN2) > 2.5 , 3 , 0)}
X_A17 9 HOENB INV_BASIC_GEN
VDembTrip 0 52 DC=.005
E_B20 88 GND value = {V(HO2,SW2)}
E_B21 125 SW2 value = { IF(V(GEN2) > 1 & V(H2) > 2.5 , V(Bst2,SW2) , 0)}
E_B22 124 GND value = {IF(V(GEN2) > 1 & V(L2) > 2.5 & V(ZCLOQ2)< 2.5,V(VCC2),0)}
G2 0 27 SS08 FB 10m
R17 AMP 0 1MEG
C17 AMP 0 .53n ;IC=2
E1 COMP 0 AMP 0 1
X7 LOF HOR DELAY  PARAMS:  TD=62n 
X8 LEN LEM DELAY  PARAMS:  TD=150n 
X10 HOF LOR DELAY  PARAMS:  TD=55n 
X_A18 HOR HEN H AND2_BASIC_GEN
X_A19 LEM LEN 73 AND2_BASIC_GEN
X_A20 LEN LOR 82 AND2_BASIC_GEN
X_A21 HEN LEN INV_BASIC_GEN
X_A22 73 82 L OR2_BASIC_GEN
Q3 77 77 90 _Q2_mod 
Q4 VCC2 77 90 _Q3_mod 
E_B7 HOF GND value = { IF(V(SW) < 0.5*V(VCC) , 5 , 0)}
E_B9 LOF GND value = { IF(V(LO) < 0.25*V(VCC) , 5 , 0)}
R12 L GND 100k
R23 H GND 100k
E_B23 SS082 GND value = { IF(V(SS2) < V (Vref) ,  V(ss2) , V(Vref))}
E_B24 92 GND value = { IF(V(SS2) > 3 , 5 , 0)}
E_BVccx 90 GND value = { IF(V(UVLO) < .4 , 0 , IF( V(VIN) < 7.6 , V(VIN) , 7.6 ))}
R30 125 HO2 2
C15 HO2 SW2 1p
X_A15 122 QB2 Q2 NOR2_BASIC_GEN
X_A16 Q2 CLK2 QB2 NOR2_BASIC_GEN
X_A23 92 SSLatch2 94 NOR2_BASIC_GEN
X_A24 94 STANDBY SSLatch2 NOR2_BASIC_GEN
R31 35 GND 100k
C18 LO2 GND 1p
X_A25 CLK2 97 INV_BASIC_GEN
X_A26 97 Q2 HEN2 AND2_BASIC_GEN
X_A27 88 HOENB2 INV_BASIC_GEN
X13 LOF2 HOR2 DELAY  PARAMS:  TD=62n 
X14 LEN2 LEM2 DELAY  PARAMS:  TD=150n 
X15 HOF2 LOR2 DELAY  PARAMS:  TD=55n 
X_A28 HOR2 HEN2 H2 AND2_BASIC_GEN
X_A29 LEM2 LEN2 98 AND2_BASIC_GEN
X_A30 LEN2 LOR2 100 AND2_BASIC_GEN
X_A31 HEN2 LEN2 INV_BASIC_GEN
X_A32 98 100 L2 OR2_BASIC_GEN
E_B26 HOF2 GND value = { IF(V(SW2) < 0.5*V(VCC2) , 5 , 0)}
E_B27 LOF2 GND value = { IF(V(LO2) < 0.25*V(VCC2) , 5 , 0)}
R32 L2 GND 100k
R33 H2 GND 100k
R34 124 LO2 2
E_B19 CLK GND value = { IF(V(iCLK,151) < 1.84 , 0 , 5)}
R39 iCLK 151 1
E3 154 GND CSG2 CS2 10
C23 151 GND 320n
E_B29 CLK2 GND value = { IF(V(149,152) < 1.84 , 0 , 5)}
E_B28 GEN2 GND value = { IF(V(STANDBY) < 2.5 &  V(EN2) > 2.5 ,  5 , 0)}
R41 149 152 1
C28 152 GND 320n
R37 154 155 20
D5 93 35 _D2_mod 
D6 COMP2 93 _D2_mod 
V17 CSG2 GND
C29 155 GND 1n
E4 track2 GND 155 GND 1
D9 AMP 156 _D9_modXX 
X_A36 85 102 INV_BASIC_GEN
S6 SS2 0 102 GND _S5_mod  
D10 0 AMP _D9_modX 
X12 SW2 52 ZC2 COMPARX12  PARAMS:  VHIGH=5 VLOW=0 
C22 Vramp2 106 500p
STrackx track2 Vramp2 CLK2 GND _TRACK  
S8 Ramp2 GND HOENB2 GND _S1_mod  
R38 track2 GND 1k
R35 ZCLOQ2 GND 100k
V_A12 104_D GND 0.1
R_A12 104_D 104 1p
X_A38 PWM2 153 122 OR2_BASIC_GEN
G4 GND 107 SS082 FB2 10m
R40 AMP2 GND 1MEG
C24 AMP2 GND 1n ;IC=2
E2 COMP2 GND AMP2 GND 1
X16 ZCLOQ2 ZQL2 LEN2 104 105 ZCLO2 DFFSBRB_SHPBASIC_GEN
G_B31 GND SS2 value = { IF(V(ss2) < 3 , 10u , 1u)}
V19 107 AMP2
E_B34 106 GND value = {V(ramp2)}
V_A33 105_D GND 5
R_A33 105_D 105 1p
C19 LRC2 GND 10p
R36 LRC2 124 10k
D3 LRC2 124 _D4_mod 
X_A34 LRC2 LOD2 BUF_BASIC_GEN
X_A35 LOD2 55 ZC2 ZCLO2 NAND3_BASIC_GEN
.ENDS
*$
.SUBCKT COMPARX21x NINV INV OUT  PARAMS: VHIGH=12 VLOW=100m
E_B1 4 0 value = { IF( V(NINV,INV) > 0  ,  {VHIGH}  ,  {VLOW})}
RO 4 OUT 1m
CO OUT 0 1PF
.ENDS
*$
.SUBCKT COMPARX5 NINV INV OUT  PARAMS: VHIGH=12 VLOW=100m
E_B1 4 0 value = { IF( V(NINV,INV) > 0  ,  {VHIGH}  ,  {VLOW})}
RO 4 OUT 1
CO OUT 0 1p
.ENDS
*$
.SUBCKT COMPARX21 NINV INV OUT  PARAMS: VHIGH=12 VLOW=100m
E_B1 4 0 value = { IF( V(NINV,INV) > 0  ,  {VHIGH}  ,  {VLOW})}
RO 4 OUT 1m
CO OUT 0 1PF
.ENDS
*$
.SUBCKT ComparatorIlimComp NINV INV OUT  PARAMS: VHIGH=5 VLOW=100m VHYS=50m
E_B2 HYS NINV value = { IF( V(OUT) > {(VHIGH+VLOW)/2} , {VHYS} , 0)}
E_B1 4 0 value = { IF( V(HYS,INV) > 0  ,  {VHIGH}  ,  {VLOW})}
RO 4 OUT 1m
CO OUT 0 1PF
.ENDS
*$
.SUBCKT PSMN5R5 4 1 2
M1 3 1 2 2 NMOS W=1611091u L=0.40u
M2 2 1 2 4 PMOS W=1611091u L=0.62u
R1 4 3 Rx 66E-4 
CGS 1 2 520E-12
DBD 2 4 DBD
.MODEL NMOS NMOS (LEVEL = 3 TOX = 7E-8  RS = 88E-4 RD = 0 NSUB = 1.44E17  
+KP = 2.1E-5 UO = 650  VMAX = 0 XJ = 5E-7 KAPPA = 7E-1 ETA = 1E-4 TPG = 1  
+IS = 0 LD = 0  CGSO = 0 CGDO = 0 CGBO = 0  NFS = 0.8E12 DELTA = 0.1)
.MODEL PMOS PMOS (LEVEL = 3 TOX = 7E-8  NSUB = 2E16 TPG = -1)
.MODEL DBD D ( VJ=0.38 M=0.4  RS=0.1 FC=0.5 IS=1E-12 TT=4.8E-8 N=1 BV=60.5)
.MODEL Rx res (TC1=11.5E-3 TC2=5.5E-6)
.ENDS
*$CJO=500E-12
.SUBCKT DFFSBRB_SHPBASIC_GEN Q QB CLK D RB SB PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 
X1 CLK CLKdel INV_DELAY_BASIC_GEN PARAMS: VDD={VDD} 
+VSS={VSS} VTHRESH={VTHRESH} DELAY = 15n
X2 CLK CLKdel CLKint AND2_BASIC_GEN PARAMS: VDD={VDD} 
+VSS={VSS} VTHRESH={VTHRESH}
GQ 0 Qint VALUE = {IF(V(SB) < {VTHRESH},5,IF(V(RB)<{VTHRESH},-5, 
+IF(V(CLKint)> {VTHRESH}, IF(V(D)> {VTHRESH},5,-5),0)))}
CQint Qint 0 1n
RQint Qint 0 1000MEG
D_D10 Qint MY5 D_D1
V1 MY5 0 {VDD}
D_D11 MYVSS Qint D_D1
V2 MYVSS 0 {VSS} 
EQ Qqq 0 Qint 0 1
X3 Qqq Qqqd1 BUF_DELAY_BASIC_GEN PARAMS: VDD={VDD} VSS={VSS} 
+VTHRESH={VTHRESH} DELAY = 20n
RQq Qqqd1 Q 1
EQb Qbr 0 VALUE = {IF( V(Q) > {VTHRESH}, {VSS},{VDD})}
RQb Qbr Qb 1 
Cdummy1 Q 0 1nF 
Cdummy2 QB 0 1nF 
.IC V(Qint) {VSS}
.ENDS DFFSBRB_SHPBASIC_GEN
*$
.SUBCKT DELAY 1 3  PARAMS: TD=1
RIN 1 2 1E4
C1 2 0 {TD/(2.3*1E4)}
E1 3 0 2 0 1
.ENDS
*$
.SUBCKT COMPARX12 NINV INV OUT  PARAMS: VHIGH=12 VLOW=100m
E_B1 4 0 value = { IF( V(NINV,INV) > 0  ,  {VHIGH}  ,  {VLOW})}
RO 4 OUT 1
CO OUT 0 10p
.ENDS
*$
.SUBCKT INV_BASIC_GEN A  Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 
E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} ,{VSS},{VDD})}}
RINT YINT Y 1
CINT Y 0 1n
.ENDS INV_BASIC_GEN
*$
.SUBCKT AND2_BASIC_GEN A B Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5
E_ABMGATE    YINT 0 VALUE {{IF(V(A) > {VTHRESH} & V(B) > {VTHRESH},{VDD},{VSS})}}
RINT YINT Y 1
CINT Y 0 1n
.ENDS AND2_BASIC_GEN
*$
.SUBCKT OR2_BASIC_GEN A B Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 
E_ABMGATE    YINT 0 VALUE {{IF(V(A) > {VTHRESH} | V(B) > {VTHRESH},{VDD},{VSS})}}
RINT YINT Y 1
CINT Y 0 1n
.ENDS OR2_BASIC_GEN
*$
.SUBCKT NOR2_BASIC_GEN A B Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 
E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} | V(B) > {VTHRESH},{VSS},{VDD})}}
RINT YINT Y 1
CINT Y 0 1n
.ENDS NOR2_BASIC_GEN
*$
.SUBCKT BUF_BASIC_GEN A  Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 
E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} ,{VDD},{VSS})}}
RINT YINT Y 1
CINT Y 0 1n
.ENDS BUF_BASIC_GEN
*$
.SUBCKT NAND3_BASIC_GEN A B C Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 
E_ABMGATE YINT 0 VALUE {{IF(V(A) > {VTHRESH} & V(B) > {VTHRESH} &
+ V(C) > {VTHRESH},{VSS},{VDD})}}
RINT YINT Y 1
CINT Y 0 1n
.ENDS NAND3_BASIC_GEN
*$
.SUBCKT INV_DELAY_BASIC_GEN A  Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 DELAY = 10n 
E_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} ,{VDD},{VSS})}}
RINT YINT1 YINT2 1
CINT YINT2 0 {DELAY*1.3}
E_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} ,{VSS},{VDD})}}
RINT2 YINT3 Y 1
CINT2 Y 0 1n
.ENDS INV_DELAY_BASIC_GEN
*$
.SUBCKT BUF_DELAY_BASIC_GEN A  Y PARAMS: VDD=5 VSS=0.1 VTHRESH=2.5 DELAY = 10n 
E_ABMGATE1 YINT1 0 VALUE {{IF(V(A) > {VTHRESH} ,{VDD},{VSS})}}
RINT YINT1 YINT2 1
CINT YINT2 0 {DELAY*1.3}
E_ABMGATE2 YINT3 0 VALUE {{IF(V(YINT2) > {VTHRESH} ,{VDD},{VSS})}}
RINT2 YINT3 Y 1
CINT2 Y 0 1n
.ENDS BUF_DELAY_BASIC_GEN
*$
.SUBCKT CLK_GEN RT CLK
IS1         0 RT 1U
XU6         4 3 RT VCR_0
XU5         4 3 D_D1_0
C2          3 0 1U 
XU2         5 4 INV_0
R5          6 0 1G 
XU4         6 5 RT VCR_1
XU3         5 3 CLK AND_0
XU1         7 6 5 COMPARATOR_0
C1          6 0 1U 
R2          0 7 1K 
R1          7 5 1K 
.ENDS
*$
.SUBCKT COMPARATOR_0  P N Y
E1 Y 0 VALUE {IF(V(P,N)>0,12,-12)}
.ENDS
*$
.SUBCKT AND_0  1 2 OUT
E1 OUT 0 VALUE {IF(V(1)>0 & V(2)>0, 3.5 , 0.3)}
.ENDS   
*$
.SUBCKT VCR_0  1 2 RT
G1 1 2 VALUE {(V(1,2)/(28.24*V(RT)+0.121))}
.ENDS
*$
.SUBCKT D_D1_0  1 2
D1 1 2 DD1
.MODEL DD1 D
+ RS=0.1n
+ N=0.1m
.ENDS D_D1_0 
*$
.SUBCKT INV_0  IN OUT
E1 OUT 0 VALUE {IF(V(IN)>0 , -12 , 12)}
.ENDS
*$
.SUBCKT VCR_1  1 2 RT
G1 1 2 VALUE {(V(1,2)*2*1.098*1E-6)/(((1E6*V(RT))+948)* 0.1923077E-9)}
.ENDS
*$
.MODEL PMEG6010 D BV=100.00 CJO=2.667776e-11 IBV=10.000e-6  IS=2.843488e-9 
+M=388.7e-3 N=1.091 RS=4.21e-1 TNOM=25.0  VJ=632.1e-3 
*$
.SUBCKT LDCR 1 2  Params: L=1 DCR=0 IC=0
L1 2 3 {L} IC={IC}
RDCR 3 1 {DCR}
.ENDS
*$
.MODEL D_D1 D( IS=1e-15 TT=10p Rs=0.05 N=.1)
*$
****
.END
