LM6142_TEST (PSpice format) ************************************** ** This file was created by TINA ** ** www.tina.com ** ** (c) DesignSoft, Inc. ** ** www.designsoftware.com ** ************************************** .TEMP 27 *.AC DEC 20 10 1MEG .TRAN 2U 1M *.DC LIN VG1 0 1 10M .OPTIONS ABSTOL=1P ITL1=150 ITL2=20 ITL4=10 TRTOL=7 .PROBE V([Vout]) VG1 3 4 DC 0 AC 1 0 + PWL TIME_SCALE_FACTOR=50U VALUE_SCALE_FACTOR=1 + REPEAT FOREVER (0 0) (0.25 1) (0.75 -1) (1 0) ENDREPEAT V2 VCCM 0 -5 V1 VCCP 0 5 R4 6 0 20K R3 7 6 1K R2 8 Vout 20K R1 9 8 1K XU3 6 8 VCCP VCCM Vout LM6142A_0 XU2 4 7 VCCP VCCM 7 LM6142A_0 XU1 3 9 VCCP VCCM 9 LM6142A_0 *$ *////////////////////////////////////////////////////////////////////// * (C) NATIONAL SEMICONDUCTOR, INC. * MODELS DEVELOPED AND UNDER COPYRIGHT BY: * NATIONAL SEMICONDUCTOR, INC. *///////////////////////////////////////////////////////////////////// * LEGAL NOTICE: THIS MATERIAL IS INTENDED FOR FREE SOFTWARE SUPPORT. * THE FILE MAY BE COPIED, AND DISTRIBUTED; HOWEVER, RESELLING THE * MATERIAL IS ILLEGAL *//////////////////////////////////////////////////////////////////// * FOR ORDERING OR TECHNICAL INFORMATION ON THESE MODELS, CONTACT: * NATIONAL SEMICONDUCTOR'S CUSTOMER RESPONSE CENTER * 7:00 A.M.--7:00 P.M. U.S. CENTRAL TIME * (800) 272-9959 * FOR APPLICATIONS SUPPORT, CONTACT THE INTERNET ADDRESS: * APPSHELP@GALAXY.NSC.COM *////////////////////////////////////////////////////////// *LM6142A OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * CONNECTIONS: NON-INVERTING INPUT * | INVERTING INPUT * | | POSITIVE POWER SUPPLY * | | | NEGATIVE POWER SUPPLY * | | | | OUTPUT * | | | | | * | | | | | .SUBCKT LM6142A_0 1 2 99 50 28 * * PINOUT ORDER +IN -IN V+ V- OUT * * CAUTION: SET .OPTIONS GMIN=1E-16 TO CORRECTLY MODEL INPUT BIAS CURRENT. * FEATURES: * OPERATES FROM SINGLE SUPPLY * RAIL-TO-RAIL OUTPUT SWING * LOW OFFSET VOLTAGE (MAX) = 1MV * INPUT CURRENT = 170NA * SLEW RATE = 27V/US * GAIN-BANDWIDTH PRODUCT = 17MHZ * LOW SUPPLY CURRENT = 600UA * * NOTE: - THIS MODEL IS FOR A SINGLE DEVICE ONLY AND THE SIMULATED * SUPPLY CURRENT IS FOR ONE OP AMP ONLY. * - NOISE IS NOT MODELED. * - ASYMMETRICAL GAIN IS NOT MODELED. * - IN THE NEXT REVISION, THE FOLLOWING WILL BE MODELLED * - VOLTAGE DEPENDENT (VIN OR VCC) SLEW RATE * - GAIN/PHASE VARIATION VS OUTPUT Z * CI1 1 50 2P CI2 2 50 2P * * 53HZ POLE CAPACITOR C3 98 9 0.30N * C4 6 5 .493P C7 98 11 3.54F * DP1 1 99 DA DP2 50 1 DX DP3 2 99 DB DP4 50 2 DX D1 9 8 DX D2 10 9 DX D3 15 20 DX D4 21 15 DX D5 26 24 DX D6 25 27 DX D7 22 99 DX D8 50 22 DX D9 0 14 DX D10 12 0 DX D11 11 33 DX D12 34 11 DX D14 31 32 DX EH 97 98 99 49 1.0 EN 0 96 0 50 1.0 * INPUT OFFSET VOLTAGE -| EOS 7 1 POLY(1) 16 49 1M 1 EP 97 0 99 0 1.0 E1 97 19 99 15 1.0 E2 18 7 32 99 1E-3 * SOURCING LOAD +VS CURRENT F1 99 0 VA2 1 * SINKING LOAD -VS CURRENT F2 0 50 VA3 1 F3 13 0 VA1 1 G1 98 9 5 6 0.1 G2 98 11 9 49 1U G3 98 15 11 49 1U * DC CMRR G4 98 16 POLY(2) 1 49 2 49 0 3.54E-8 3.54E-8 I1 99 4 23U I2 99 50 627U * LOAD DEPENDENT POLE L1 22 28 300N * * CMR LEAD L2 16 17 7.95M M1 5 2 4 99 MX M2 6 18 4 99 MX R3 5 50 3.60K R4 6 50 3.60K R5 98 9 1E7 R8 99 49 133.3K R9 49 50 133.3K R12 98 11 1E6 R13 98 17 1K * -ROUT R16 23 24 10 * +ROUT R17 23 25 18 * +ISC SLOPE CONTROL R18 20 29 12K * -ISC SLOPE CONTROL R19 21 30 12K R21 98 15 1E6 R22 22 28 900 R23 32 97 100K VA1 19 23 0V VA2 14 13 0V VA3 13 12 0V V2 97 8 0.625V V3 10 96 0.625V V4 29 22 -.186V V5 22 30 -.186V V6 26 22 0.63V V7 22 27 0.63V V8 31 50 4V V9 34 96 .346 V10 97 33 .346 * .MODEL DA D (IS=170E-9) .MODEL DB D (IS=173E-9) .MODEL DX D (IS=1.0E-14) .MODEL MX PMOS (VTO=-.6 KP=4.2E-4 GAMMA=1.1) .ENDS .END