//###########################################################################
//
// FILE:    init_misc.c
//
// TITLE:
//
// NOTES:
//  1)
//###########################################################################
//
//  Ver  | dd mmm yyyy | Who  		| Description of changes
// ======|=============|============|========================================
//  00 	   05 04 2015 	 HPCS
//
//  Texas Instruments, Inc
//  Copyright Texas Instruments 2008. All rights reserved.
//###########################################################################
#include "system_defines.h"
#include "cyclone_device.h"
#include "variables.h"
#include "function_definitions.h"
#include "software_interrupts.h"
#include "cyclone_defines.h"
#include "pmbus_common.h"
#include "pmbus_topology.h"
#include "pmbus_constants.h"


#define PMW_FREQUENCY 100000 // <--------
#define PWM_CLOCK 15625000
#define PWM_PERIOD (PWM_CLOCK)/(PMW_FREQUENCY)


#define INTERRUPT_FREQUENCY 100000 //100 KHz
#define INTERRUPT_TIMER_VAL (  15625000 / INTERRUPT_FREQUENCY  )



void init_interrupts(void)
{
	        TimerRegs.T16PWM2CMP0DAT.all = INTERRUPT_TIMER_VAL;  	//Threshold to send the pwm low. Approx 10KHz. by spec.64ns clock period
			TimerRegs.T16PWM2CMP1DAT.all = 0xffff;	//Threshold to send the pwm high
			TimerRegs.T16PWM2CMPCTRL.all = 2;		//Enables compare 0 (reset) interrupt
			TimerRegs.T16PWM2CNTCTRL.all = 0x00c;	//PWM counter is running & enables PWM counter reset by compare action on compare 0


			disable_interrupt();
			disable_fast_interrupt();  //make sure fast interrupt is disabled
			write_reqmask(CIMINT_ALL_PWM2_COMP| CIMINT_ALL_FAULT_MUX); //enable pwm2cmp
			write_firqpr (CIMINT_ALL_FAULT_MUX);
			enable_fast_interrupt();
			enable_interrupt();
}

void global_enable(void)
{
		union GLBEN_REG glben_store; //collect global enable bits for simultaneous use

		glben_store.all = 0;

		glben_store.bit.DPWM2_EN = 1;
		glben_store.bit.DPWM3_EN = 1;
		//glben_store.bit.DPWM2_EN = 1;


		glben_store.bit.FE_CTRL0_EN = 1;
		glben_store.bit.FE_CTRL1_EN =1;
		glben_store.bit.FE_CTRL2_EN =1;

		LoopMuxRegs.GLBEN = glben_store;
}

void global_disable(void)
{
		union GLBEN_REG glben_store; //collect global enable bits for simultaneous use

		glben_store.all = 0;

		glben_store.bit.DPWM0_EN = 0;
#ifdef ALL_PHASE
		glben_store.bit.DPWM1_EN=0;
		glben_store.bit.DPWM2_EN=0;
		glben_store.bit.DPWM3_EN=0;
#endif
		glben_store.bit.FE_CTRL0_EN = 0;

		LoopMuxRegs.GLBEN = glben_store;
}
void init_PWM(void)
{
		TimerRegs.T16PWM0CMP0DAT.bit.CMP_DAT = PWM_PERIOD;  //value to reset counter
		TimerRegs.T16PWM0CMP1DAT.bit.CMP_DAT = 0;
		TimerRegs.T16PWM0CMPCTRL.bit.PWM_OUT_ACTION0 = 1;//1 is for clear pin
		TimerRegs.T16PWM0CMPCTRL.bit.PWM_OUT_ACTION1 = 2;//2 is for clear pin
		TimerRegs.T16PWM0CNTCTRL.bit.CMP_RESET_ENA = 1; //enable reset by comp 0
		TimerRegs.T16PWM0CMPCTRL.bit.PWM_OUT = 0; //make sure that default is a 0
		TimerRegs.T16PWM0CMPCTRL.bit.PWM_OUT_DRV = 1; //put zero into output latch
		TimerRegs.T16PWM0CMPCTRL.bit.PWM_OUT_ENA = 1; //enable pin as an output
		TimerRegs.T16PWM0CNTCTRL.bit.SW_RESET = 1;  //allow counter to run

		TimerRegs.T16PWM1CMP0DAT.bit.CMP_DAT = PWM_PERIOD;  //value to reset counter
		TimerRegs.T16PWM1CMP1DAT.bit.CMP_DAT =  0;
		TimerRegs.T16PWM1CMPCTRL.bit.PWM_OUT_ACTION0 = 1;//1 is for clear pin
		TimerRegs.T16PWM1CMPCTRL.bit.PWM_OUT_ACTION1 = 2;//2 is for clear pin
		TimerRegs.T16PWM1CNTCTRL.bit.CMP_RESET_ENA = 1; //enable reset by comp 0
		TimerRegs.T16PWM1CMPCTRL.bit.PWM_OUT = 0; //make sure that default is a 0
		TimerRegs.T16PWM1CMPCTRL.bit.PWM_OUT_DRV = 1; //put zero into output latch
		TimerRegs.T16PWM1CMPCTRL.bit.PWM_OUT_ENA = 1; //enable pin as an output
		TimerRegs.T16PWM1CNTCTRL.bit.SW_RESET = 1;  //allow counter to run
}

void init_TCAP()
{
#if (UCD3138128 |UCD3138A64)

	    TimerRegs.T24CAPCTRL0.bit.CAP_SEL = 0;		//input signal comes from TCAP pin
		TimerRegs.T24CAPCTRL0.bit.EDGE = 01;			//enable capture on rising edge
		TimerRegs.T24CAPCTRL1.bit.CAP_SEL = 0;		//input signal comes from TCAP pin
		TimerRegs.T24CAPCTRL1.bit.EDGE = 10;			//enable capture on falling edge
		TimerRegs.T24CAPCTRL0.bit.CAP_INT_ENA=1;      // Enable rising edge interrupt.
#elif (UCD3138064| UCD3138)
		TimerRegs.T24CAPCTRL.bit.CAP_SEL = 0;		//input signal comes from TCAP pin
		TimerRegs.T24CAPCTRL.bit.EDGE = 01;			//enable capture on rising edge
		TimerRegs.T24CAPCTRL.bit.CAP_INT_ENA=1;      // Enable rising edge interrupt.
#endif
}

void init_CBC()
{
	 	//Phase 1 CBC
//		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_B_THRESH=20;
//		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_B_SEL=0; // Threshold set by ACOMP_B_THRESH
//		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_B_POL=0;
//		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_EN=1;
//		FaultMuxRegs.DPWM0CLIM.bit.ACOMP_B_EN=1;
//
//		Dpwm0Regs.DPWMCTRL0.bit.CBC_ADV_CNT_EN = 1;
//		Dpwm0Regs.DPWMCTRL0.bit.CBC_PWM_AB_EN=1;
//		Dpwm0Regs.DPWMFLTCTRL.bit.CBC_MAX_COUNT = 15;
//		Dpwm0Regs.DPWMFLTCTRL.bit.AB_MAX_COUNT = 1;
//		Dpwm0Regs.DPWMFLTCTRL.bit.ALL_FAULT_EN = 1;
//
//		//Phase 2 CBC
//		FaultMuxRegs.ACOMPCTRL1.bit.ACOMP_D_THRESH=20;
//		FaultMuxRegs.ACOMPCTRL1.bit.ACOMP_D_SEL=0;
//		FaultMuxRegs.ACOMPCTRL1.bit.ACOMP_D_POL=0;
//		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_EN=1;
//		FaultMuxRegs.DPWM1CLIM.bit.ACOMP_D_EN=1;
//
//		Dpwm1Regs.DPWMCTRL0.bit.CBC_ADV_CNT_EN = 1;
//		Dpwm1Regs.DPWMCTRL0.bit.CBC_PWM_AB_EN=1;
//		Dpwm1Regs.DPWMFLTCTRL.bit.CBC_MAX_COUNT = 15;
//		Dpwm1Regs.DPWMFLTCTRL.bit.AB_MAX_COUNT = 1;
//		Dpwm1Regs.DPWMFLTCTRL.bit.ALL_FAULT_EN = 1;
}

void init_fault()
{
	   //Battery voltage OVP
	    FaultMuxRegs.ACOMPCTRL2.bit.ACOMP_F_THRESH=( (dflash_variables.variables.OVP_battery >>5 ) +5);
		FaultMuxRegs.ACOMPCTRL2.bit.ACOMP_F_REF_SEL=0;
		FaultMuxRegs.ACOMPCTRL2.bit.ACOMP_F_SEL=0;
		FaultMuxRegs.ACOMPCTRL2.bit.ACOMP_F_POL=1;
		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_EN=1;  // <----------
		FaultMuxRegs.DPWM2FLTABDET.bit.ACOMP_F_EN=1;
		FaultMuxRegs.DPWM3FLTABDET.bit.ACOMP_F_EN=1;


		//Bus voltage OVP
		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_A_SEL=0;
		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_A_POL=1;
		FaultMuxRegs.ACOMPCTRL0.bit.ACOMP_A_THRESH=(dflash_variables.variables.OVP_system) >>5;
		FaultMuxRegs.DPWM2FLTABDET.bit.ACOMP_A_EN=1;
		FaultMuxRegs.DPWM3FLTABDET.bit.ACOMP_A_EN=1;


		Dpwm2Regs.DPWMFLTCTRL.bit.ALL_FAULT_EN=1;
		Dpwm3Regs.DPWMFLTCTRL.bit.ALL_FAULT_EN=1;

       //Maximum battery charging current of 1A
//		FaultMuxRegs.DCOMPCTRL1.bit.THRESH = 822;
//		FaultMuxRegs.DCOMPCTRL1.bit.FE_SEL = 0;
//		FaultMuxRegs.DCOMPCTRL1.bit.COMP_POL = 1;
//		FaultMuxRegs.DCOMPCTRL1.bit.CNT_THRESH = 3;
//		FaultMuxRegs.DCOMPCTRL1.bit.CNT_CLR = 0;
//		FaultMuxRegs.DCOMPCTRL1.bit.CNT_CONFIG = 1;
//		FaultMuxRegs.DCOMPCTRL1.bit.COMP_EN = 1;



		FaultMuxRegs.DPWM2FLTABDET.bit.DCOMP1_EN=1;
		FaultMuxRegs.DPWM3FLTABDET.bit.DCOMP1_EN=1;
}


void init_variables()
{
	NUMBER_OF_DFLASH_VARIABLES	=((sizeof(VAR))/4) +4;
		error_state=NO_ERROR;
		restore_from_DFLASH();
//		while(dflash_variables.variables.calibrated !=1)
//		{
//			poll_adc();
//			AdcRegs.ADCCTRL.bit.SW_START = 1;
//			converter_state=CALIBRATING;
//			pmbus_handler();
//			if(store == 3)
//				{
//					if (store_to_DFLASH_slow())
//					{
//						store=1000;
//					}
//				}
//		}

}

void init_IDE(void)
{
	FaultMuxRegs.IDECTRL.bit.DCM_LIMIT_H=0;
	FaultMuxRegs.IDECTRL.bit.DCM_LIMIT_L=0;
//	Dpwm0Regs.DPWMCTRL2.bit.IDE_DUTY_B_EN = 1;

}


