//###########################################################################
//
// FILE:    interrupts.c
//
// TITLE:
//
// NOTES:
//  1)
//###########################################################################
//
//  Ver  | dd mmm yyyy | Who  		| Description of changes
// ======|=============|============|========================================
//  00 	   08 28 2015 	 HPCS
//
//  Texas Instruments, Inc
//  Copyright Texas Instruments 2008. All rights reserved.
//###########################################################################

#include "system_defines.h"
#include "cyclone_device.h"
#include "cyclone_defines.h"
#include "pmbus_common.h"
#include "pmbus_topology.h"
#include "pmbus_constants.h"
#include "variables.h"
#include "function_definitions.h"
#include "software_interrupts.h"

#pragma INTERRUPT(undefined_instruction_exception,UDEF)
void undefined_instruction_exception(void)
{
}

#pragma INTERRUPT(abort_prefetch_exception,PABT)
void abort_prefetch_exception(void)
{
}

#pragma INTERRUPT(abort_data_fetch_exception,DABT)
void abort_data_fetch_exception(void)
{
}




#pragma INTERRUPT(fast_interrupt,FIQ)
void fast_interrupt(void)
{


/*
 * Dcomp0 fault has occured. Meaning the Vbus voltgae has dipped down
 * Need to switch from charging to discharge.
 *  1) Shutdown DPWM
 *  2) enable triggering just in case
 *  3) Change filter source of DPWM
 *  4) Switch A and B output by intra MUX.
 */


Dpwm3Regs.DPWMCTRL0.all = 0;
//Dpwm3Regs.DPWMCTRL2.all= 0x0000001;// Enable sample trigger
//LoopMuxRegs.SAMPTRIGCTRL.all = 0x00000011; // Resume triggering EADC0,EADC1 by DPWM2
LoopMuxRegs.SAMPTRIGCTRL.all = 0x00000044;      // Resume triggering EADC0,EADC1 by DPWM2
LoopMuxRegs.DPWMMUX.all=0x00000200;// Set filter 1 as the source of duty for DPWM3
Dpwm3Regs.DPWMCTRL0.all= 0x33000003;// Enable CLA, Switch A and B ,enable DPWM module


MiscAnalogRegs.GLBIOVAL.bit.DPWM0B_IO_VALUE=1;



battery_reading_before_mode_switch=adc_struct.battery_voltage_avg_32;
if ( (mini_state == BOOST_CC) || ((mini_state == BOOST_CV))  )
{

       FeCtrl1Regs.EADCDAC.bit.DAC_VALUE = reduced_voltage_loop_DAC_value;
       Filter1Regs.FILTERKPCOEF0.bit.KP_COEF_0=5000;
       mini_state= BUCK;  // ?BUCK_CHECK
}
else
{
       FeCtrl1Regs.EADCDAC.bit.DAC_VALUE =voltage_loop_DAC_value;
       mini_state=BUCK;
}


FaultMuxRegs.DCOMPCTRL0.bit.INT_EN=0;
interrupt_clearer= FaultMuxRegs.FAULTMUXINTSTAT.all;
count=0;
}



