Reset the codec	
	Register 0 = 0x00
Software Reset aka also turns off all components for power saving	
	Register 1 = 0x01
	delay(10)
Configure the PLL for a 48.0kHz sample rate	
PLL Input Clock 12.288MHz	
	Register 4 = 0x03
	Register 5 = 0x91
	Register 6 = 0x08
	Register 7 = 0x00
	Register 8 = 0x00
	Register 11 = 0x02
	Register 12 = 0x08
	Register 13 = 0x00
	Register 14 = 0x80
mute DACs	
	Register 64 = 0x0C
	delay(10)
power down NDAC divider	
	Register 11 = 0x02
Page 1 / Register 38: Left Analog Volume to SPK	
	Register 0 = 0x01
	Register 38 = 0x80
Change To Page 0	
	Register 0 = 0x00
power up NDAC divider	
	Register 11 = 0x82
Volume up the DAC	
	Register 71 = 0x82
Set the DAC volume I2S input Only	
	Register 64 = 0x00
	Register 65 = 0x00
Change To Page 0	
	Register 0 = 0x00
power up NDAC divider	
	Register 11 = 0x82
Volume up the DAC	
	Register 71 = 0x82
Set the DAC volume I2S input Only	
	Register 64 = 0x00
	Register 65 = 0x00