/*
 * Copyright (C) 2014-2017 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

#include "dra72x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "dra7-ipu-dsp-common.dtsi"

/ {
	model = "AM5708 p38 rev 1.0";
	compatible = "ti,am5718", "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";

	aliases {
		sound0 = &sound0;
	};

	chosen {
		stdout-path = &uart3;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
	};
	
	sound0: sound0 {
		compatible = "simple-audio-card";
		simple-audio-card,name = "DRA7xx-EVM";
		simple-audio-card,widgets =
			"Headphone", "Headphone Jack",
			"Line", "Line Out",
			"Microphone", "Mic Jack",
			"Line", "Line In";
		simple-audio-card,routing =
			"Headphone Jack",	"HPLOUT",
			"Headphone Jack",	"HPROUT",
			"Line Out",		"LLOUT",
			"Line Out",		"RLOUT",
			"MIC3L",		"Mic Jack",
			"MIC3R",		"Mic Jack",
			"Mic Jack",		"Mic Bias",
			"LINE1L",		"Line In",
			"LINE1R",		"Line In";
		simple-audio-card,format = "dsp_b";
		simple-audio-card,bitclock-master = <&sound0_master>;
		simple-audio-card,frame-master = <&sound0_master>;
		simple-audio-card,bitclock-inversion;

		sound0_master: simple-audio-card,cpu {
			sound-dai = <&mcasp1>;
			system-clock-frequency = <12000000>;
		};

		simple-audio-card,codec {
			sound-dai = <&tlv320aic32>;
			clocks = <&atl_clkin2_ck>;
		};
	};
	
	leds {
		compatible = "gpio-leds";

		cpu0-led {
			label = "status0:red:cpu0";
			gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
			default-state = "off";
			linux,default-trigger = "cpu0";
		};

		usr0-led {
			label = "p38:usr1";
			gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};


	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		ipu2_memory_region: ipu2-memory@95800000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x95800000 0x0 0x3800000>;
			reusable;
			status = "okay";
		};

		dsp1_memory_region: dsp1-memory@99000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x99000000 0x0 0x4000000>;
			reusable;
			status = "okay";
		};

		ipu1_memory_region: ipu1-memory@9d000000 {
			compatible = "shared-dma-pool";
			reg = <0x0 0x9d000000 0x0 0x2000000>;
			reusable;
			status = "okay";
		};
	};
	
		
	reg3: fixedregulator@0 {
		compatible = "regulator-fixed";
		status = "okay";	
		regulator-name = "3vs";
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
		regulator-always-on;
		regulator-boot-on;
	};
	
	reg18: fixedregulator@1 {
		compatible = "regulator-fixed";
		status = "okay";
		regulator-name = "18vd";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-always-on;
		regulator-boot-on;
	};
	
	mclk: fpgaosc {
        status = "okay";
		compatible = "fixed-clock";
        #clock-cells = <1>;
        clock-frequency  = <12000000>;
        clock-output-names = "mclk";
    };
	
};

&mcasp1 {
	#sound-dai-cells = <0>;
	status = "okay";
	op-mode = <1>;
	tdm-slots = <2>;
	serial-dir = <
			1 2 0 0	/* 0: INACTIVE, 1: TX, 2: RX */
			0 0 0 0
			0 0 0 0
			0 0 0 0 >;
};

&usb1 {
	status = "okay";
	dr_mode = "peripheral";
	hub: genesys@1 {
		compatible = "usb1cbe,3";
		reg = <1>;
	};
};

&usb2 {
	status = "disabled";
};

&usb2_phy1 {
	status = "okay";
};

&usb3_phy1 {
	status = "okay";
};


&rtc {
	status = "disabled";
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;

	tlv320aic32: tlv320aic32@18 {
		#sound-dai-cells = <0>;
		compatible = "ti,tlv320aic32x4";
		reg = <0x18>;
		adc-settle-ms = <40>;
		status = "okay";
		
		av-supply = <&reg3>;
		dv-supply = <&reg18>;
		iov-supply = <&reg18>;
		/*supply-av = <&reg3>;
		supply-dv = <&reg18>;
		supply-iov = <&reg18>;*/
		clocks = <&mclk 0>;
		clock-names = "mclk";
	};
};

&i2c2 {
	status = "okay";
	clock-frequency = <400000>;
};

&elm {
	status = "okay";
};

&gpmc {
	/*
	* For the existing IOdelay configuration via U-Boot we don't
	* support NAND on dra7-evm. Keep it disabled. Enabling it
	* requires a different configuration by U-Boot.
	*/
	status = "okay";
	ranges = <0 0 0x01000000 0x01000000>;	/* minimum GPMC partition = 16MB */
	
	/*CS timing config*/
	gpmc,cs-on-ns = <0>;	/*FPGA_CSONTIME*/
	gpmc,cs-rd-off-ns = <31>;	/*FPGA_CSRDOFFTIME*/
	gpmc,cs-wr-off-ns = <30>;	/*FPGA_CSWROFFTIME*/
	/*GPMC_CS_EXTRA_NODELAY*/
	
	/*ADV timing config*/
	gpmc,adv-on-ns = <0>; /*FPGA_ADVONTIME*/
	gpmc,adv-rd-off-ns = <31>; /*FPGA_ADVRDOFFTIME*/
	gpmc,adv-wr-off-ns = <31>; /*FPGA_ADVWROFFTIME*/
	gpmc,adv-aad-mux-on-ns = <0>; /*FPGA_ADVADMUXONTIME*/
	gpmc,adv-aad-mux-rd-off-ns = <0>; /*FPGA_ADVAADMUXRDOFFTIME*/
	gpmc,adv-aad-mux-wr-off-ns = <0>; /*FPGA_ADVADMUXWROFFTIME*/
	/*GPMC_ADV_EXTRA_NODELAY*/
	
	/*WE and OE timing config*/
	gpmc,we-on-ns = <3>; /*FPGA_WEONTIME*/
	gpmc,we-off-ns = <25>; /*FPGA_WEOFFTIME*/
	gpmc,oe-on-ns = <1>;	/*FPGA_OEONTIME*/
	gpmc,oe-off-ns = <31>;	/*FPGA_OEOFFTIME*/
	gpmc,oe-aad-mux-on-ns = <3>;	/*FPGA_OEAADMUXONTIME*/
	gpmc,oe-aad-mux-off-ns = <31>;	/*FPGA_OEAADMUXOFFTIME*/
	/*GPMC_WE_EXTRA_NODELAY*/
	/*GPMC_OE_EXTRA_NODELAY*/
	
	/*Access and cycle timings*/
	gpmc,page-burst-access-ns = <0>; /*FPGA_PAGEBURSTACCESSTIME*/
	gpmc,access-ns = <28>;	/*FPGA_RDACCESSTIME*/
	gpmc,rd-cycle-ns = <31>;	/*FPGA_RDACCESSTIME*/
	gpmc,wr-cycle-ns = <31>;	/*FPGA_WRCYCLETIME*/
	gpmc,bus-turnaround-ns = <0>;	/*FPGA_BUSTURNAROUND*/
	gpmc,cycle2cycle-delay-ns = <0>; /*FPGA_CYCLE2CYCLEDELAY*/
	gpmc,wr-access-ns = <22>;	/*FPGA_WRACCESSTIME*/
	gpmc,wr-data-mux-bus-ns = <15>;	/*FPGA_WRDATAONADMUXBUS*/
	gpmc,cycle2cycle-samecsen;
	/*gpmc,cycle2cycle-diffcsen; FPGA_CYCLE2CYCLEDIFFCSEN*/
	
	
};

&gpio7 {
	ti,no-reset-on-init;
	ti,no-idle-on-init;
};

&mac {
	status = "okay";
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
	status = "okay";
	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
			      <&dra7_pmx_core 0x3f8>;
};

&davinci_mdio {
	ethphy0: ethernet-phy@0 {
		reg = <0>;
		/*micrel,rmii-reference-clock-select-25-mhz; */
		max-speed = <100>;
		clocks = <&mdc>;
		clock-names = "rmii-ref";
		phy-handle = <&ethphy0>;
	};
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <0>;
	phy-mode = "rmii";
	mdc: rmii-ref {
		#clock-cells = <0>;
		compatible ="fixed-clock";
		clock-frequency = <50000000>;
	};
};


&ipu2 {
	status = "okay";
	memory-region = <&ipu2_memory_region>;
};

&ipu1 {
	status = "okay";
	memory-region = <&ipu1_memory_region>;
};

&dsp1 {
	status = "okay";
	memory-region = <&dsp1_memory_region>;
};

&dra7_pmx_core {
	uart3_pins: uart3_pins {
		pinctrl-single,pins = <
			0x34C (PIN_INPUT_SLEW | MUX_MODE4) /* mcasp5_axr0.uart3_rxd */
			0x350 (PIN_INPUT_SLEW | MUX_MODE4) /* mcasp5_axr1.uart3_txd */
		>;
	};
};

&qspi {
	status = "okay";
	spi-max-frequency = <48000000>;
	spi-cpol;
	spi-cpha;
	m25p80@0 {
		compatible = "spi-nor";
		spi-max-frequency = <48000000>;
		spi-tx-bus-width = <1>;
		spi-rx-bus-width = <4>;
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0>;
		memory-map = <0x5c000000 0x4000000>;
/* AM5708 SR1.0 */
		spi-cpol;
		spi-cpha;

		/* MTD partition table.
		 * The ROM checks the first four physical blocks
		 * for a valid file to boot and the flash here is
		 * 64KiB block size.
		 */
		partition@0 {
			label = "QSPI.SPL";
			reg = <0x00000000 0x000010000>;
		};
		partition@1 {
			label = "QSPI.SPL.backup1";
			reg = <0x00010000 0x00010000>;
		};
		partition@2 {
			label = "QSPI.SPL.backup2";
			reg = <0x00020000 0x00010000>;
		};
		partition@3 {
			label = "QSPI.SPL.backup3";
			reg = <0x00030000 0x00010000>;
		};
		partition@4 {
			label = "QSPI.u-boot";
			reg = <0x00040000 0x00100000>;
		};
		partition@5 {
			label = "QSPI.u-boot-spl-os";
			reg = <0x00140000 0x00080000>;
		};
		partition@6 {
			label = "QSPI.u-boot-env";
			reg = <0x001c0000 0x00010000>;
		};
		partition@7 {
			label = "QSPI.u-boot-env.backup1";
			reg = <0x001d0000 0x0010000>;
		};
		partition@8 {
			label = "QSPI.kernel";
			reg = <0x001e0000 0x0800000>;
		};
		partition@9 {
			label = "QSPI.file-system";
			reg = <0x009e0000 0x03620000>;
		};
	};
};

