ADC3669API

   1from samrat_api import Samrat
   2from time import sleep
   3from math import log
   4from typing import List
   5
   6
   7class ADC3669:
   8    """Python API for ADC3669 family devices.
   9    
  10    Attributes:
  11        alias: String used to identify the ADC being interfaced with
  12        device: Reference to the low level API which handles register field functions.
  13        fs: Sampling frequency of the device
  14
  15    """
  16
  17    def __init__(self, alias:str, device_handle, sample_freq:int):
  18        """Constructor for ADC3669 API.
  19        
  20        Arguments:
  21            alias: String used to identify the ADC being interfaced with
  22            device_handle: Object which handles SPI communication to the device. Contains read and write functions.
  23            sample_freq: Sampling frequency of the device.
  24        
  25        Raises:
  26            None
  27
  28        Returns:
  29            An instance of the ADC3669 API class
  30
  31        """
  32        self.alias = alias
  33        self.fs = sample_freq
  34        self.device = Samrat(device_handle, sample_freq)
  35
  36    def reg_read(self, addr: int) -> int:
  37        """Reads the value stored in a register
  38
  39        Arguments:
  40            addr:
  41                The address of the desired register
  42
  43        Raises:
  44            None
  45
  46        Returns:
  47            The value of the register that is read back
  48        """
  49        return self.device.read(addr)
  50
  51    def reg_write(self, addr: int, value: int) -> None:
  52        """Writes a value into a register
  53
  54        Arguments:
  55            addr:
  56                The address of the desired register
  57            value:
  58                The value that is to be written to the register
  59
  60        Raises:
  61            None
  62
  63        Returns:
  64            None
  65        """
  66        self.device.write(addr, value)
  67
  68    def configure_ready(self) -> int:
  69        """Indicates the status of the internal fuse load after HW reset. The device should not be programmed before the fuse load is complete.
  70
  71        Arguments:
  72            None
  73
  74        Raises:
  75            None
  76
  77        Returns:
  78            Status of the fuse autoload.
  79
  80            - 0: Fuse autoload is incomplete, and the device should not be programmed
  81            - 1: Fuse autoload is complete, the device can be programmed
  82        """
  83        return self.device.GET_FUSE_LOAD_DONE()
  84
  85    def reset(self) -> None:
  86        """Resets the device. The register will self clear after reset.
  87
  88        Arguments:
  89            None
  90
  91        Raises:
  92            None
  93
  94        Returns:
  95            None
  96        """
  97        self.device.SET_SOFTWARE_RESET(1)
  98
  99    def global_powerdown(self, value: int) -> None:
 100        """Powers down the device.
 101
 102        Arguments:
 103            value: input value
 104                - 0: Normal Operation
 105                - 1: Powerdown
 106
 107        Raises:
 108            None
 109
 110        Returns:
 111            None
 112        """
 113        self.device.SET_GLOBAL_PDN(value)
 114
 115    def fast_powerdown_cha(self, value: int) -> None:
 116        """Puts channel A into a low power state that enables a fast wake time.
 117
 118        Arguments:
 119            value: input value
 120                - 0: Normal Operation
 121                - 1: Powerdown
 122
 123        Raises:
 124            None
 125
 126        Returns:
 127            None
 128        """
 129        self.device.SET_FAST_PDN_CH0(value)
 130
 131    def fast_powerdown_chb(self, state: int) -> None:
 132        """Puts channel B into a low power state that enables a fast wake time.
 133
 134        Arguments:
 135            value: input value
 136                - 0: Normal Operation
 137                - 1: Powerdown
 138
 139        Raises:
 140            None
 141
 142        Returns:
 143            None
 144        """
 145        self.device.SET_FAST_PDN_CH1(state)
 146
 147    def sysref_detect_clear(self, value: int) -> None:
 148        """resets the SYSREF DET flag
 149
 150        Arguments:
 151            value: input value
 152                - 0: Normal operation
 153                - 1: SYSREF DET flag gets reset
 154
 155        Raises:
 156            None
 157
 158        Returns:
 159            None
 160        """
 161        self.device.SET_SYSREF_DET_CLR(value)
 162
 163    def cha_termination(self, value: int) -> None:
 164        """Sets the internal termination on channel A.
 165
 166        Arguments:
 167            value: input value
 168                - 0: 100Ω differential termination
 169                - 1: 200Ω differential termination
 170
 171        Raises:
 172            None
 173
 174        Returns:
 175            None
 176        """
 177        self.device.SET_CH0_200_OHM_TERM(value)
 178
 179    def chb_termination(self, value: int) -> None:
 180        """Sets the internal termination on channel B.
 181
 182        Arguments:
 183            value: input value
 184                - 0: 100Ω differential termination
 185                - 1: 200Ω differential termination
 186
 187        Raises:
 188            None
 189
 190        Returns:
 191            None
 192        """
 193        self.device.SET_CH1_200_OHM_TERM(value)
 194
 195    def overrange_clear(self, value) -> None:
 196        """A transition from 0 to 2 clears the clears the sticky overrange bit.
 197
 198        Arguments:
 199            value: input value
 200                - 0: Normal operation
 201                - 2: Overrange bit is cleared
 202
 203        Raises:
 204            None
 205
 206        Returns:
 207            None
 208        """
 209        self.device.SET_DIG_OVR_CLEAR(value)
 210
 211    def overrange_sticky(self, value: int) -> None:
 212        """Makes the digital Overrange sticky.
 213
 214        Arguments:
 215            value: input value
 216                - 0: Digital OVR is non-sticky (updated based on overrange_length())
 217                - 1: Digital OVR is sticky (use overrange_clear() to reset)
 218
 219        Raises:
 220            None
 221
 222        Returns:
 223            None
 224        """
 225        self.device.SET_DIG_OVR_MODE(value)
 226
 227    def overrange_length(self, value: int) -> None:
 228        """Controls the Overrange pulse expansion. The expansion width is specified in terms of number of clock cycles.
 229
 230        Arguments:
 231            value: input value
 232                8-bit integer specifying the ovr pulse expansion in number of clock cycles
 233
 234        Raises:
 235            None
 236
 237        Returns:
 238            None
 239        """
 240        self.device.SET_DIG_OVR_WIDTH(value)
 241
 242    def lvds_termination(self, value: int) -> None:
 243        """Configures the LVDS termination resistance
 244
 245        Arguments:
 246            value: input value
 247                - 0: LVDS termination is 50Ω
 248                - 1: LVDS termination is 100Ω
 249
 250        Raises:
 251            None
 252
 253        Returns:
 254            None
 255        """
 256        self.device.SET_HUNDRED_OHM_TERM(value)
 257
 258    def lvds_half_swing(self, value: int) -> None:
 259        """Reduces LVDS output swing by 50% to reduce power consumption
 260
 261        Arguments:
 262            value: input value
 263                - 0: Normal output swing
 264                - 1: Reduced output swing
 265
 266        Raises:
 267            None
 268
 269        Returns:
 270            None
 271        """
 272        self.device.SET_LVDS_HALF_SWING_EN(value)
 273
 274    def data_rate(self, value: int) -> None:
 275        """This bit configures the parallel LVDS output interface. When only a single channel is output, SDR LVDS can be enabled.
 276
 277        Arguments:
 278            value: input value
 279                - 0: Dual Data Rate (DDR)
 280                - 1: Single Data Rate (SDR)
 281
 282        Raises:
 283            None
 284
 285        Returns:
 286            None
 287        """
 288        self.device.SET_SDR(value)
 289
 290    def swap_channels(self, value: int) -> None:
 291        """Internally swaps channel A and channel B.
 292
 293        Arguments:
 294            value: input value
 295                - 0: Normal operation
 296                - 1: Channel A and channel B are swapped
 297
 298        Raises:
 299            None
 300
 301        Returns:
 302            None
 303        """
 304        self.device.SET_SWAP_CHANNELS(value)
 305
 306    def lvds_data_invert(self, value) -> None:
 307        """Inverts the polarity of individual LVDS output lanes.
 308
 309        Arguments:
 310            lanes:
 311                Value to write to the register, where each bit represents as listed in the datasheet, and the values correspond to the following functions:
 312                - 0: Normal operation
 313                - 1: LVDS Lane is inverted
 314
 315        Raises:
 316            None
 317
 318        Returns:
 319            None
 320        """
 321        self.device.SET_LVDS_DATA_INV(value)
 322
 323    def lvds_powerdown(self, value: List[int]) -> None:
 324        """Powers down the individual LVDS output lanes and puts LVDS pins into high impedance state.
 325
 326        Arguments:
 327            value: input value
 328                Value to write to the register, where each bit represents as listed in the datasheet, and the values correspond to the following functions:
 329                - 0: Normal operation
 330                - 1: Powered down
 331
 332        Raises:
 333            None
 334
 335        Returns:
 336            None
 337        """
 338        self.device.SET_LVDS_DATA_PDN(value)
 339
 340    def fclk_duty_cycle(self, value: int) -> None:
 341        """Adjusts the Frame clock duty cycle.
 342        Arguments:
 343            value: input value
 344                - 0: FCLK stays high for one DCLK cycle at the beginning of the output sample
 345                - 1: FCLK stays high for 50% of the output sample
 346
 347        Raises:
 348            None
 349
 350        Returns:
 351            None
 352        """
 353        self.device.SET_ENABLE_50PER_DUTY_FCLK(value)
 354
 355    def fclk_disable(self, value: int) -> None:
 356        """Disables the output Frame clock.
 357
 358        Arguments:
 359            value: input value
 360                - 0: FCLK replaces the LSB data and is transmitted on DOUT0
 361                - 1: FCLK is disabled and the LSB data is transmitted on DOUT0.
 362
 363        Raises:
 364            None
 365
 366        Returns:
 367            None
 368        """
 369        self.device.SET_DISABLE_FRAME_INSERTION(value)
 370
 371    def lvds_mux_enable(self, value: int) -> None:
 372        """Enables use of the LVDS output mux
 373
 374        Arguments:
 375            value: input value
 376                - 0: LVDS Mux disabled
 377                - 1: LVDS Mux enabled
 378
 379        Raises:
 380            None
 381
 382        Returns:
 383            None
 384        """
 385        self.device.SET_LVDS_CROSS_BAR_MUX_EN(value)
 386
 387    def lvds_swap_edge(self, value: int) -> None:
 388        """Swaps the output data bits transmitted on rising and falling edge of DCLK.
 389
 390        Arguments:
 391            value: input value
 392                - 0: Normal operation
 393                - 1: Output bits on rising and falling edge are swapped.
 394
 395        Raises:
 396            None
 397
 398        Returns:
 399            None
 400        """
 401        self.device.SET_LVDS_SWAP_RISE_FALL(value)
 402
 403    def lvds_scrambling(self, value: int) -> None:
 404        """Controls the scrambling and LSB insertion configuration on the output data
 405
 406        Arguments:
 407            value: input value
 408                - 0: No scrambling, Defualt Operation
 409                - 1: Data is XOR'ed with a PRBS bit. This PRBS is inserted on the LSB position
 410                - 2: OVR is inserted on the LSB position
 411                - 3: OVR is inserted on the LSB+1 position
 412                - 4: Data is XOR'ed with a PRBS bit, and the PRBS is inserted on LSB+1 position
 413                - 5: OVR is inserted on LSB+1 position, PRBS is inseted on LSB position. Data is XOR'ed with PRBS
 414                - 6: OVR is inserted on LSB+2 position, PRBS is inseted on LSB+1 position. Data is XOR'ed with PRBS
 415
 416        Raises:
 417            None
 418
 419        Returns:
 420            None
 421        """
 422        self.device.SET_LVDS_DATA_DITH_MODE(value)
 423
 424    def dout0_mux(self, data: int) -> None:
 425        """Configures the digital data output on LVDS lane 0
 426
 427        Arguments:
 428            data:
 429                The internal digital data bus lane that is being mapped
 430
 431        Raises:
 432            None
 433
 434        Returns:
 435            None
 436        """
 437        self.device.SET_LANE0_MUX_SEL(data)
 438
 439    def dout1_mux(self, data: int) -> None:
 440        """Configures the digital data output on LVDS lane 1
 441
 442        Arguments:
 443            data:
 444                The internal digital data bus lane that is being mapped
 445
 446        Raises:
 447            None
 448
 449        Returns:
 450            None
 451        """
 452        self.device.SET_LANE1_MUX_SEL(data)
 453
 454    def dout2_mux(self, data: int) -> None:
 455        """Configures the digital data output on LVDS lane 2
 456
 457        Arguments:
 458            data:
 459                The internal digital data bus lane that is being mapped
 460
 461        Raises:
 462            None
 463
 464        Returns:
 465            None
 466        """
 467        self.device.SET_LANE2_MUX_SEL(data)
 468
 469    def dout3_mux(self, data: int) -> None:
 470        """Configures the digital data output on LVDS lane 3
 471
 472        Arguments:
 473            data:
 474                The internal digital data bus lane that is being mapped
 475
 476        Raises:
 477            None
 478
 479        Returns:
 480            None
 481        """
 482        self.device.SET_LANE3_MUX_SEL(data)
 483
 484    def dout4_mux(self, data: int) -> None:
 485        """Configures the digital data output on LVDS lane 4
 486
 487        Arguments:
 488            data:
 489                The internal digital data bus lane that is being mapped
 490
 491        Raises:
 492            None
 493
 494        Returns:
 495            None
 496        """
 497        self.device.SET_LANE4_MUX_SEL(data)
 498
 499    def dout5_mux(self, data: int) -> None:
 500        """Configures the digital data output on LVDS lane 5
 501
 502        Arguments:
 503            data:
 504                The internal digital data bus lane that is being mapped
 505
 506        Raises:
 507            None
 508
 509        Returns:
 510            None
 511        """
 512        self.device.SET_LANE5_MUX_SEL(data)
 513
 514    def dout6_mux(self, data: int) -> None:
 515        """Configures the digital data output on LVDS lane 6
 516
 517        Arguments:
 518            data:
 519                The internal digital data bus lane that is being mapped
 520
 521        Raises:
 522            None
 523
 524        Returns:
 525            None
 526        """
 527        self.device.SET_LANE6_MUX_SEL(data)
 528
 529    def dout7_mux(self, data: int) -> None:
 530        """Configures the digital data output on LVDS lane 7
 531
 532        Arguments:
 533            data:
 534                The internal digital data bus lane that is being mapped
 535
 536        Raises:
 537            None
 538
 539        Returns:
 540            None
 541        """
 542        self.device.SET_LANE7_MUX_SEL(data)
 543
 544    def dout8_mux(self, data: int) -> None:
 545        """Configures the digital data output on LVDS lane 8
 546
 547        Arguments:
 548            data:
 549                The internal digital data bus lane that is being mapped
 550
 551        Raises:
 552            None
 553
 554        Returns:
 555            None
 556        """
 557        self.device.SET_LANE8_MUX_SEL(data)
 558
 559    def dout9_mux(self, data: int) -> None:
 560        """Configures the digital data output on LVDS lane 9
 561
 562        Arguments:
 563            data:
 564                The internal digital data bus lane that is being mapped
 565
 566        Raises:
 567            None
 568
 569        Returns:
 570            None
 571        """
 572        self.device.SET_LANE9_MUX_SEL(data)
 573
 574    def dout10_mux(self, data: int) -> None:
 575        """Configures the digital data output on LVDS lane 10
 576
 577        Arguments:
 578            data:
 579                The internal digital data bus lane that is being mapped
 580
 581        Raises:
 582            None
 583
 584        Returns:
 585            None
 586        """
 587        self.device.SET_LANE10_MUX_SEL(data)
 588
 589    def dout11_mux(self, data: int) -> None:
 590        """Configures the digital data output on LVDS lane 11
 591
 592        Arguments:
 593            data:
 594                The internal digital data bus lane that is being mapped
 595
 596        Raises:
 597            None
 598
 599        Returns:
 600            None
 601        """
 602        self.device.SET_LANE11_MUX_SEL(data)
 603
 604    def dout12_mux(self, data: int) -> None:
 605        """Configures the digital data output on LVDS lane 12
 606
 607        Arguments:
 608            data:
 609                The internal digital data bus lane that is being mapped
 610
 611        Raises:
 612            None
 613
 614        Returns:
 615            None
 616        """
 617        self.device.SET_LANE12_MUX_SEL(data)
 618
 619    def dout13_mux(self, data: int) -> None:
 620        """Configures the digital data output on LVDS lane 13
 621
 622        Arguments:
 623            data:
 624                The internal digital data bus lane that is being mapped
 625
 626        Raises:
 627            None
 628
 629        Returns:
 630            None
 631        """
 632        self.device.SET_LANE13_MUX_SEL(data)
 633
 634    def dout14_mux(self, data: int) -> None:
 635        """Configures the digital data output on LVDS lane 14
 636
 637        Arguments:
 638            data:
 639                The internal digital data bus lane that is being mapped
 640
 641        Raises:
 642            None
 643
 644        Returns:
 645            None
 646        """
 647        self.device.SET_LANE14_MUX_SEL(data)
 648
 649    def dout15_mux(self, data: int) -> None:
 650        """Configures the digital data output on LVDS lane 15
 651
 652        Arguments:
 653            data:
 654                The internal digital data bus lane that is being mapped
 655
 656        Raises:
 657            None
 658
 659        Returns:
 660            None
 661        """
 662        self.device.SET_LANE15_MUX_SEL(data)
 663
 664    def high_fin(self, value: int) -> None:
 665        """Enable for best AC performance for input frequencies greater than 500 MHz
 666
 667        Arguments:
 668            value: input value
 669                - 0: Normal operation
 670                - 1: Performance optimized for input frequencies greater than 500 MHz
 671
 672        Raises:
 673            None
 674
 675        Returns:
 676            None
 677        """
 678        self.device.SET_DIS_ANA_NL_CORR(value)
 679
 680    def sysref_detect(self) -> int:
 681        """Indicates if a SYSREF signal is detected. Upon detection this bit stays high until it gets reset (0x102, D6) or a device reset is issued.
 682
 683        Arguments:
 684            None
 685
 686        Raises:
 687            None
 688
 689        Returns:
 690            Status of the Sysref signal
 691            
 692            - 0: No Sysref signal detected
 693            - 1: Sysref signal detected
 694        """
 695        return self.device.GET_SYSREF_DET()
 696
 697    def sysref_or(self) -> int:
 698        """Output of the five SYSREF XOR flags logically OR'ed together
 699
 700        Arguments:
 701            None
 702
 703        Raises:
 704            None
 705
 706        Returns:
 707            Status of the SYSREF flags OR'ed together
 708            
 709            - 0: No sysref flags raised
 710            - 1: One of the five XOR flags is raised
 711        """
 712        return self.device.GET_SYSREF_OR()
 713
 714    def sysref_xor(self) -> int:
 715        """XOR flags from the SYSREF window monitoring circuitry. 
 716        
 717        The sampling clock falling edge is used to capture the SYSREF signal.
 718        If a SYSREF signal transition happens within -60/+140 ps of the SYSREF capture, the appropriate XOR flag gets raised.
 719        These bits are updated on every SYSREF rising edge.
 720
 721        Arguments:
 722            None
 723
 724        Raises:
 725            None
 726
 727        Returns:
 728            List of 5 flags as follows
 729
 730            - X0: SYSREF leading sample clock by 20 to 60ps
 731            - X1: SYSREF leading sample clock by 20ps to 0ps or SYSREF lagging sample clock by 0 to 20ps
 732            - X2: SYSREF lagging sample clock by up to 20 to 60ps
 733            - X3: SYSREF lagging sample clock by 60 to 100ps
 734            - X4: SYSREF lagging sample clock by 100 to 140ps
 735
 736            With the corresponding values:
 737            - 0: Flag not raised
 738            - 1: Flag raised
 739        """
 740        return self.device.GET_SYSREF_XOR()
 741
 742    def gpio_config(self, value: int) -> None:
 743        """Configures the functionaliy of the two GPIO pins
 744
 745        Arguments:
 746            value: input value
 747            
 748        | Value  | GPIO 1              | GPIO 0              |
 749        |:------:|:-------------------:|:-------------------:|
 750        | 0      | NOT USED            | SYSREF              |
 751        | 3      | GLOBAL POWER DOWN   | SYSREF              |
 752        | 4      | EXTERNAL REFERENCE  | SYSREF              |
 753        | 5      | NCO SWITCH 1        | NCO SWITCH 0        |
 754        | 8      | NOT USED            | SYSREF              |
 755        | 9      | OVR CHB/CHA         | SYSREF              |
 756        | 10     | NOT USED            | GLOBAL POWER DOWN   |
 757        | 11     | OVR CHB/CHA         | GLOBAL POWER DOWN   |
 758        | 12     | OVR CHB             | OVR CHA             |
 759
 760        Raises:
 761            None
 762
 763        Returns:
 764            None
 765        """
 766        self.device.SET_GPIO_CONFIG(value)
 767
 768    def pattern_clk(self, value: int) -> None:
 769        """Controls the clock of the pattern signal generator.
 770
 771        Arguments:
 772            value: input value
 773                - 0: Normal operation
 774                - 1: Decimation CLK is used for the pattern generator
 775
 776        Raises:
 777            None
 778
 779        Returns:
 780            None
 781        """
 782        self.device.SET_PATTERN_CLK(value)
 783
 784    def test_pattern(self, value: int) -> None:
 785        """Controls the type of test pattern.
 786        
 787        The generated pattern is 20 bits wide. In 16 bit resolution mode, 16 MSBs of the pattern mode are sent out.
 788        In 32 bit resolution mode, 12 zeros are padded to the generated pattern and sent out.
 789
 790        Arguments:
 791            value: input value
 792                - 0: Test pattern is disabled
 793                - 1: Ramp pattern with a step of 1 (at 20 bit level, which is equivalent to 1/16 at 16 bit level)
 794                - 2: Ramp pattern with a step value set by CUSTOM PATTERN.
 795                - 3: Not used
 796                - 4: Static pattern set by CUSTOM PATTERN
 797                - 5: Pattern toggles between CUSTOM PATTERN and invert of CUSTOM PATTERN
 798                - 6: Pattern toggles between CUSTOM PATTERN and 0
 799
 800        Raises:
 801            None
 802
 803        Returns:
 804            None
 805        """
 806        self.device.SET_TEST_PATTERN_MODE(value)
 807
 808    def custom_pattern(self, value: int) -> None:
 809        """Controls the pattern generator. This controls different functions depending on the TEST PATTERN setting
 810
 811        Arguments:
 812            value:
 813                20-bit custom pattern data
 814
 815        Raises:
 816            None
 817
 818        Returns:
 819            None
 820        """
 821        # if value != 0:
 822        #     if not ((int(log(value, 2)) + 1) <= 20):
 823        #         raise Exception("Custom pattern value must be 20 bits long or less")
 824        self.device.SET_CUSTOM_PATTERN(value)
 825
 826    def digital_gain_cha(self, value: int) -> None:
 827        """Controls digital gain for channel A. Maximum gain is 6dB.
 828
 829        Arguments:
 830            value:
 831                Desired value to write into the register, where:
 832                Gain = (20 x log(1+(Value / 128)))
 833
 834        Raises:
 835            None
 836
 837        Returns:
 838            None
 839        """
 840        self.device.SET_CH0_PROG_GAIN(value)
 841
 842    def digital_gain_chb(self, value: int) -> None:
 843        """Controls digital gain for channel B. Maximum gain is 6dB.
 844
 845        Arguments:
 846            value:
 847                Desired value to write into the register, where:
 848                Gain = (20 x log(1+(Value / 128)))
 849
 850        Raises:
 851            None
 852
 853        Returns:
 854            None
 855        """
 856        self.device.SET_CH1_PROG_GAIN(value)
 857
 858    def sysref_mode(self, value: int) -> None:
 859        """Controls the global SYSREF mask
 860
 861        Arguments:
 862            value: input value
 863                - 0: Pass all SYSREF pulses
 864                - 1: Pass the first SYSREF pulse and gates subsequent pulses
 865                - 2: Gate all SYSREF pulses
 866                - 3: Issue new SYSREF pulse. The pulse is issued when the state transitions to 11
 867
 868        Raises:
 869            None
 870
 871        Returns:
 872            None
 873        """
 874        self.device.SET_SYSREF_MODE(value)
 875
 876    def lvds_sysref_mask(self, value: int) -> None:
 877        """Controls the SYSREF pulse going to the LVDS block.
 878
 879        Arguments:
 880            value: input value
 881                - 0: Pass all SYSREF pulses
 882                - 1: Pass the first SYSREF pulse and gates subsequent pulses
 883                - 2: Gate all SYSREF pulses
 884                - 3: Issue new SYSREF pulse. The pulse is issued when the state transitions to 11
 885
 886        Raises:
 887            None
 888
 889        Returns:
 890            None
 891        """
 892        self.device.SET_LVDS_SYSREF_MASK(value)
 893
 894    def ddc_sysref_mask(self, value: int) -> None:
 895        """Controls the SYSREF pulse of DDC block.
 896
 897        Arguments:
 898            value: input value
 899                - 0: Pass all SYSREF pulses
 900                - 1: Pass the first SYSREF pulse and gates subsequent pulses
 901                - 2: Gate all SYSREF pulses
 902                - 3: Issue new SYSREF pulse. The pulse is issued when the state transitions to 11
 903
 904        Raises:
 905            None
 906
 907        Returns:
 908            None
 909        """
 910        self.device.SET_DECIMATION_SYSREF_MASK(value)
 911
 912    def nco_sysref_mask(self, value: int) -> None:
 913        """Controls the SYSREF pulse of NCO block.
 914
 915        Arguments:
 916            value: input value
 917                - 0: Pass all SYSREF pulses
 918                - 1: Pass the first SYSREF pulse and gates subsequent pulses
 919                - 2: Gate all SYSREF pulses
 920                - 3: Issue new SYSREF pulse. The pulse is issued when the state transitions to 11
 921
 922        Raises:
 923            None
 924
 925        Returns:
 926            None
 927        """
 928        self.device.SET_NCO_SYSREF_MASK(value)
 929
 930    def timer_sysref_mask(self, value: int) -> None:
 931        """Controls the SYSREF pulse of TIMER block.
 932
 933        Arguments:
 934            value: input value
 935                - 0: Pass all SYSREF pulses
 936                - 1: Pass the first SYSREF pulse and gates subsequent pulses
 937                - 2: Gate all SYSREF pulses
 938                - 3: Issue new SYSREF pulse. The pulse is issued when the state transitions to 11
 939
 940        Raises:
 941            None
 942
 943        Returns:
 944            None
 945        """
 946        self.device.SET_TIMER_SYSREF_MASK(value)
 947
 948    def sysref_time_stamp(self, value: int) -> None:
 949        """Allows the SYSREF to be passed on the FRAME_INDICATOR lane. OVR_ON_LSB setting takes precedence
 950
 951        Arguments:
 952            value: input value
 953                - 0: Normal operation
 954                - 3: Pass sysref time stamp on the frame indicator lane
 955
 956        Raises:
 957            None
 958
 959        Returns:
 960            None
 961        """
 962        self.device.SET_SYSREF_TIME_STAMP(value)
 963
 964    def gain_override(self, value: int) -> None:
 965        """Controls 6dB gain setting of the DDC. The 6dB gain is applied in COMPLEX DDC mode by default. This will force 6 dB gain on the DDC output, irrespective of the DDC mode
 966
 967        Arguments:
 968            value: input value
 969                - 0: Normal operation
 970                - 2: Unity gain
 971                - 3: 6dB gain override
 972
 973        Raises:
 974            None
 975
 976        Returns:
 977            None
 978        """
 979        self.device.SET_SIX_DB_GAIN_OVERRIDE(value)
 980
 981    def complex_decimation(self, value: int) -> None:
 982        """Enables/disables complex decimation for all DDCs.
 983
 984        Arguments:
 985            value: input value
 986                - 0: Real Deciamtion
 987                - 1: Complex Decimation
 988
 989        Raises:
 990            None
 991
 992        Returns:
 993            None
 994        """
 995        self.device.SET_EN_COMPLEX_DDC(value)
 996
 997    def output_resolution(self, value: int) -> None:
 998        """Configures the output resolution for 16-bit or 32-bit
 999
1000        Arguments:
1001            value: input value
1002                - 0: 16-bit output resolution
1003                - 1: 32-bit output resolution
1004
1005        Raises:
1006            None
1007
1008        Returns:
1009            None
1010        """
1011        self.device.SET_OUTPUT_RESOLUTION(value)
1012
1013    def output_format(self, value: int) -> None:
1014        """Configures the output data format
1015
1016        Arguments:
1017            value: input value
1018                - 0: Output format is 2s complement
1019                - 1: Output format is offset binary
1020
1021        Raises:
1022            None
1023
1024        Returns:
1025            None
1026        """
1027        self.device.SET_OUTPUT_FORMAT(value)
1028
1029    def ddc0_mux(self, input: int) -> None:
1030        """Sets the input data source to decimation filter 0.
1031
1032        Arguments:
1033            ddc:
1034                The DDC for which the input data source is being configured
1035            input:
1036                Input to the DDC
1037                - 0: Channel A
1038                - 1: Channel B
1039                - 2: 2x Average ((ChA + ChB)/2)
1040                - 3: 2x Average ((ChA - ChB)/2)
1041
1042        Raises:
1043            None
1044
1045        Returns:
1046            None
1047        """
1048        self.device.SET_DDC0_MUX(input)
1049
1050    def ddc1_mux(self, input: int) -> None:
1051        """Sets the input data source to decimation filter 1.
1052
1053        Arguments:
1054            ddc:
1055                The DDC for which the input data source is being configured
1056            input:
1057                Input to the DDC
1058                - 0: Channel B
1059                - 1: Channel A
1060                - 2: 2x Average ((ChA + ChB)/2)
1061                - 3: 2x Average ((ChA - ChB)/2)
1062
1063        Raises:
1064            None
1065
1066        Returns:
1067            None
1068        """
1069        self.device.SET_DDC1_MUX(input)
1070
1071    def ddc2_mux(self, input: int) -> None:
1072        """Sets the input data source to decimation filter 2.
1073
1074        Arguments:
1075            ddc:
1076                The DDC for which the input data source is being configured
1077            input:
1078                Input to the DDC
1079                - 0: Channel A
1080                - 1: Channel B
1081                - 2: 2x Average ((ChA + ChB)/2)
1082                - 3: 2x Average ((ChA - ChB)/2)
1083
1084        Raises:
1085            None
1086
1087        Returns:
1088            None
1089        """
1090        self.device.SET_DDC2_MUX(input)
1091
1092    def ddc3_mux(self, input: int) -> None:
1093        """Sets the input data source to decimation filter 3.
1094
1095        Arguments:
1096            ddc:
1097                The DDC for which the input data source is being configured
1098            input:
1099                Input to the DDC
1100                - 0: Channel B
1101                - 1: Channel A
1102                - 2: 2x Average ((ChA + ChB)/2)
1103                - 3: 2x Average ((ChA - ChB)/2)
1104
1105        Raises:
1106            None
1107
1108        Returns:
1109            None
1110        """
1111        self.device.SET_DDC3_MUX(input)
1112
1113    def nco0_update(self, value: int) -> None:
1114        """Updates the four NCO frequencies of NCO0.
1115
1116        Arguments:
1117            value: input value
1118                - 0: Normal operation
1119                - 1: Update NCO0 frequencies
1120
1121        Raises:
1122            None
1123
1124        Returns:
1125            None
1126        """
1127        self.device.SET_NCO0_UPDATE(value)
1128
1129    def nco1_update(self, value: int) -> None:
1130        """Updates the four NCO frequencies of NCO1.
1131
1132        Arguments:
1133            value: input value
1134                - 0: Normal operation
1135                - 1: Update NCO1 frequencies
1136
1137        Raises:
1138            None
1139
1140        Returns:
1141            None
1142        """
1143        self.device.SET_NCO1_UPDATE(value)
1144
1145    def nco2_update(self, value: int) -> None:
1146        """Updates the four NCO frequencies of NCO2.
1147
1148        Arguments:
1149            value: input value
1150                - 0: Normal operation
1151                - 1: Update NCO2 frequencies
1152
1153        Raises:
1154            None
1155
1156        Returns:
1157            None
1158        """
1159        self.device.SET_NCO2_UPDATE(value)
1160
1161    def nco3_update(self, value: int) -> None:
1162        """Updates the four NCO frequencies of NCO3.
1163
1164        Arguments:
1165            value: input value
1166                - 0: Normal operation
1167                - 1: Update NCO3 frequencies
1168
1169        Raises:
1170            None
1171
1172        Returns:
1173            None
1174        """
1175        self.device.SET_NCO3_UPDATE(value)
1176
1177    def select_negative_image(self, value: int) -> None:
1178        """Controls the selection of the negative frequency image. Applicable only in Complex DDC mode.
1179
1180        Arguments:
1181            value: input value
1182                - 0: Normal operation
1183                - 1: Negative image
1184
1185        Raises:
1186            None
1187
1188        Returns:
1189            None
1190        """
1191        self.device.SET_NCO_SEL_NEG_IMAGE(value)
1192
1193    def nco_mode(self, value: int) -> None:
1194        """Configures the NCOs operating mode.
1195
1196        Arguments:
1197            value: input value
1198                - 0: Phase continuous
1199                - 1: Infinite phase coherent
1200
1201        Raises:
1202            None
1203
1204        Returns:
1205            None
1206        """
1207        self.device.SET_NCO_MODE(value)
1208
1209    def low_latency_enable(self, value: int) -> None:
1210        """Enables low latency mode by byapssing all digital features
1211
1212        Arguments:
1213            value: input value
1214                - 0: Normal Operation
1215                - 1: Low Latency Mode
1216
1217        Raises:
1218            None
1219
1220        Returns:
1221            None
1222        """
1223        self.device.SET_ENABLE_LOW_LATENCY(value)
1224
1225    def disable_nco_auto_update(self, value: int) -> None:
1226        """Disables the automatic update when switching the NCOs using GPIO pins
1227
1228        Arguments:
1229            value: input value
1230                - 0: Automatic update enabled
1231                - 1: Automatic update disabled
1232
1233        Raises:
1234            None
1235
1236        Returns:
1237            None
1238        """
1239        self.device.SET_DISABLE_NCO_AUTO_UPDATE(value)
1240
1241    def nco_select_enable(self, value: int) -> None:
1242        """This bit enables NCO frequency selection via SPI register 0x166 instead of GPIO pins.
1243
1244        Arguments:
1245            value: input value
1246                - 0: NCO Select via GPIO Pins
1247                - 1: NCO Select via SPI Write
1248
1249        Raises:
1250            None
1251
1252        Returns:
1253            None
1254        """
1255        self.device.SET_ENABLE_NCO_SEL(value)
1256
1257    def nco_common_update(self, value: int) -> None:
1258        """Updates the four NCO frequencies of all NCOs.
1259
1260        Arguments:
1261            value: input value
1262                - 0: Normal operation
1263                - 1: Update NCO frequencies
1264
1265        Raises:
1266            None
1267
1268        Returns:
1269            None
1270        """
1271        self.device.SET_NCO_COMMON_UPDATE(value)
1272
1273    def ddc0_nco_select(self, nco: int) -> None:
1274        """Selects which of the 4 frequencies is active for DDC0.
1275
1276        Arguments:
1277            nco:
1278                NCO word to set as the active frequency
1279
1280        Raises:
1281            None
1282
1283        Returns:
1284            None
1285        """
1286        self.device.SET_DDC0_NCO_SEL(nco)
1287
1288    def ddc1_nco_select(self, nco: int) -> None:
1289        """Selects which of the 4 frequencies is active for DDC1.
1290
1291        Arguments:
1292            nco:
1293                NCO word to set as the active frequency
1294
1295        Raises:
1296            None
1297
1298        Returns:
1299            None
1300        """
1301        self.device.SET_DDC1_NCO_SEL(nco)
1302
1303    def ddc2_nco_select(self, nco: int) -> None:
1304        """Selects which of the 4 frequencies is active for DDC2.
1305
1306        Arguments:
1307            nco:
1308                NCO word to set as the active frequency
1309
1310        Raises:
1311            None
1312
1313        Returns:
1314            None
1315        """
1316        self.device.SET_DDC2_NCO_SEL(nco)
1317
1318    def ddc3_nco_select(self, nco: int) -> None:
1319        """Selects which of the 4 frequencies is active for DDC3.
1320
1321        Arguments:
1322            nco:
1323                NCO word to set as the active frequency
1324
1325        Raises:
1326            None
1327
1328        Returns:
1329            None
1330        """
1331        self.device.SET_DDC3_NCO_SEL(nco)
1332
1333    def ddc0_decimation(self, value: int) -> None:
1334        """Sets the decimation filter factors for DDC0 when using unequal decimation factors.
1335
1336        Arguments:
1337            value:
1338                value to write to the register such that Decimation Factor = 2^value.
1339
1340        Raises:
1341            None
1342
1343        Returns:
1344            None
1345        """
1346        self.device.SET_DDC0_DECIMATION_MODE(value)
1347
1348    def ddc1_decimation(self, value: int) -> None:
1349        """Sets the decimation filter factors for DDC1 when using unequal decimation factors.
1350
1351        Arguments:
1352            value:
1353                value to write to the register such that Decimation Factor = 2^value.
1354
1355        Raises:
1356            None
1357
1358        Returns:
1359            None
1360        """
1361        self.device.SET_DDC1_DECIMATION_MODE(value)
1362
1363    def ddc2_decimation(self, value: int) -> None:
1364        """Sets the decimation filter factors for DDC2 when using unequal decimation factors.
1365
1366        Arguments:
1367            value:
1368                value to write to the register such that Decimation Factor = 2^value.
1369
1370        Raises:
1371            None
1372
1373        Returns:
1374            None
1375        """
1376        self.device.SET_DDC2_DECIMATION_MODE(value)
1377
1378    def ddc3_decimation(self, value: int) -> None:
1379        """Sets the decimation filter factors for DDC3 when using unequal decimation factors.
1380
1381        Arguments:
1382            value:
1383                value to write to the register such that Decimation Factor = 2^value.
1384
1385        Raises:
1386            None
1387
1388        Returns:
1389            None
1390        """
1391        self.device.SET_DDC3_DECIMATION_MODE(value)
1392
1393    def unequal_decimation(self, value: int) -> None:
1394        """Enables configuration of DDC0 thru DDC3 to have unequal decimation factors.
1395
1396        Arguments:
1397            value: input value
1398                - 0: Normal operation
1399                - 1: Unequal decimation factors enabled
1400
1401        Raises:
1402            None:
1403
1404        Returns:
1405            None
1406        """
1407        self.device.SET_SELECT_INDEPENDENT_DECIMATION(value)
1408
1409    def number_of_ddcs(self, value: int) -> None:
1410        """This register configures the # of active DDCs.
1411
1412        Arguments:
1413            value: input value
1414                - 0: Single DDC per channel (Total two DDCs are enabled)
1415                - 1: Dual DDCs per channel (Total 4 DDCs are enabled)
1416                - 2: Just one DDC is enabled (1 DDC is active)
1417                - 3: Dual DDC for a single channel (Total two DDCs are enabled)
1418
1419        Raises:
1420            None
1421
1422        Returns:
1423            None
1424        """
1425        lsb = value & 1
1426        msb = value >> 1
1427        self.device.SET_EN_DUAL_BAND(lsb)
1428        self.device.SET_DIS_DUAL_CHANNEL(msb)
1429
1430    def common_decimation(self, value: int) -> None:
1431        """Sets the decimation filter factor for all active DDCs.
1432
1433        Arguments:
1434            value:
1435                value to write to the register such that Decimation Factor = 2^value.
1436
1437        Raises:
1438            None
1439
1440        Returns:
1441            None
1442        """
1443        self.device.SET_COMMON_DECIMATION_MODE(value)
1444
1445    def update_nyqusit_zone(self, value: int) -> None:
1446        """Must be pulsed after the Nyquist zone if programmed.
1447        
1448        A 0 to 1 transition on this bit copies the NYQUIST ZONE field to an internal register.
1449
1450        Argument:
1451            value: input value
1452                - 0: Normal Operation
1453                - 1: Nyquist zone value is updated
1454
1455        Raises:
1456            None
1457
1458        Returns:
1459            None
1460        """
1461        self.device.SET_UPDATE_NYQUIST(value)
1462
1463    def nyquist_zone(self, value: int) -> None:
1464        """Sets the nyquist zone of operation.
1465        
1466        The internal calibration of the device depends on the NYQUIST ZONE of the signal being sampled.
1467        This field must be programmed based on the operating Nyquist zone.
1468
1469        Arguments:
1470            value:
1471                Operating nyquist zone (0 - 7)
1472
1473        Raises:
1474            None
1475
1476        Returns:
1477            None
1478        """
1479        self.device.SET_NYQUIST_ZONE(value)
1480
1481    def ddc0_nco_frequency0(self, value: int) -> None:
1482        """Configures the 48-bit NCO frequency word 0 of DDC0.
1483
1484        Arguments:
1485            value:
1486                Value to write to the NCO frequency word, such that:\n
1487                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1488                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1489
1490        Raises:
1491            None
1492
1493        Returns:
1494            None
1495        """
1496        self.device.SET_DDC0_NCO_FREQ0(value)
1497
1498    def ddc0_nco_frequency1(self, value: int) -> None:
1499        """Configures the 48-bit NCO frequency word 1 of DDC0.
1500
1501        Arguments:
1502            value:
1503                Value to write to the NCO frequency word, such that:\n
1504                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1505                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1506
1507        Raises:
1508            None
1509
1510        Returns:
1511            None
1512        """
1513        self.device.SET_DDC0_NCO_FREQ1(value)
1514
1515    def ddc0_nco_frequency2(self, value: int) -> None:
1516        """Configures the 48-bit NCO frequency word 2 of DDC0.
1517
1518        Arguments:
1519            value:
1520                Value to write to the NCO frequency word, such that:\n
1521                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1522                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1523
1524        Raises:
1525            None
1526
1527        Returns:
1528            None
1529        """
1530        self.device.SET_DDC0_NCO_FREQ2(value)
1531
1532    def ddc0_nco_frequency3(self, value: int) -> None:
1533        """Configures the 48-bit NCO frequency word 3 of DDC0.
1534
1535        Arguments:
1536            value:
1537                Value to write to the NCO frequency word, such that:\n
1538                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1539                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1540
1541        Raises:
1542            None
1543
1544        Returns:
1545            None
1546        """
1547        self.device.SET_DDC0_NCO_FREQ3(value)
1548
1549    def ddc1_nco_frequency0(self, value: int) -> None:
1550        """Configures the 48-bit NCO frequency word 0 of DDC1.
1551
1552        Arguments:
1553            value:
1554                Value to write to the NCO frequency word, such that:\n
1555                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1556                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1557
1558        Raises:
1559            None
1560
1561        Returns:
1562            None
1563        """
1564        self.device.SET_DDC1_NCO_FREQ0(value)
1565
1566    def ddc1_nco_frequency1(self, value: int) -> None:
1567        """Configures the 48-bit NCO frequency word 1 of DDC1.
1568
1569        Arguments:
1570            value:
1571                Value to write to the NCO frequency word, such that:\n
1572                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1573                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1574
1575        Raises:
1576            None
1577
1578        Returns:
1579            None
1580        """
1581        self.device.SET_DDC1_NCO_FREQ1(value)
1582
1583    def ddc1_nco_frequency2(self, value: int) -> None:
1584        """Configures the 48-bit NCO frequency word 2 of DDC1.
1585
1586        Arguments:
1587            value:
1588                Value to write to the NCO frequency word, such that:\n
1589                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1590                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1591
1592        Raises:
1593            None
1594
1595        Returns:
1596            None
1597        """
1598        self.device.SET_DDC1_NCO_FREQ2(value)
1599
1600    def ddc1_nco_frequency3(self, value: int) -> None:
1601        """Configures the 48-bit NCO frequency word 3 of DDC1.
1602
1603        Arguments:
1604            value:
1605                Value to write to the NCO frequency word, such that:\n
1606                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1607                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1608
1609        Raises:
1610            None
1611
1612        Returns:
1613            None
1614        """
1615        self.device.SET_DDC1_NCO_FREQ3(value)
1616
1617    def ddc2_nco_frequency0(self, value: int) -> None:
1618        """Configures the 48-bit NCO frequency word 0 of DDC2.
1619
1620        Arguments:
1621            value:
1622                Value to write to the NCO frequency word, such that:\n
1623                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1624                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1625
1626        Raises:
1627            None
1628
1629        Returns:
1630            None
1631        """
1632        self.device.SET_DDC2_NCO_FREQ0(value)
1633
1634    def ddc2_nco_frequency1(self, value: int) -> None:
1635        """Configures the 48-bit NCO frequency word 1 of DDC2.
1636
1637        Arguments:
1638            value:
1639                Value to write to the NCO frequency word, such that:\n
1640                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1641                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1642
1643        Raises:
1644            None
1645
1646        Returns:
1647            None
1648        """
1649        self.device.SET_DDC2_NCO_FREQ1(value)
1650
1651    def ddc2_nco_frequency2(self, value: int) -> None:
1652        """Configures the 48-bit NCO frequency word 2 of DDC2.
1653
1654        Arguments:
1655            value:
1656                Value to write to the NCO frequency word, such that:\n
1657                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1658                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1659
1660        Raises:
1661            None
1662
1663        Returns:
1664            None
1665        """
1666        self.device.SET_DDC2_NCO_FREQ2(value)
1667
1668    def ddc2_nco_frequency3(self, value: int) -> None:
1669        """Configures the 48-bit NCO frequency word 3 of DDC2.
1670
1671        Arguments:
1672            value:
1673                Value to write to the NCO frequency word, such that:\n
1674                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1675                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1676
1677        Raises:
1678            None
1679
1680        Returns:
1681            None
1682        """
1683        self.device.SET_DDC2_NCO_FREQ3(value)
1684
1685    def ddc3_nco_frequency0(self, value: int) -> None:
1686        """Configures the 48-bit NCO frequency word 0 of DDC3.
1687
1688        Arguments:
1689            value:
1690                Value to write to the NCO frequency word, such that:\n
1691                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1692                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1693
1694        Raises:
1695            None
1696
1697        Returns:
1698            None
1699        """
1700        self.device.SET_DDC3_NCO_FREQ0(value)
1701
1702    def ddc3_nco_frequency1(self, value: int) -> None:
1703        """Configures the 48-bit NCO frequency word 1 of DDC3.
1704
1705        Arguments:
1706            value:
1707                Value to write to the NCO frequency word, such that:\n
1708                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1709                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1710
1711        Raises:
1712            None
1713
1714        Returns:
1715            None
1716        """
1717        self.device.SET_DDC3_NCO_FREQ1(value)
1718
1719    def ddc3_nco_frequency2(self, value: int) -> None:
1720        """Configures the 48-bit NCO frequency word 2 of DDC3.
1721
1722        Arguments:
1723            value:
1724                Value to write to the NCO frequency word, such that:\n
1725                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1726                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1727
1728        Raises:
1729            None
1730
1731        Returns:
1732            None
1733        """
1734        self.device.SET_DDC3_NCO_FREQ2(value)
1735
1736    def ddc3_nco_frequency3(self, value: int) -> None:
1737        """Configures the 48-bit NCO frequency word 3 of DDC3.
1738
1739        Arguments:
1740            value:
1741                Value to write to the NCO frequency word, such that:\n
1742                When 0 > NCO frequency ≥ FS/2: value = fNCO * 2^48 / FS\n
1743                When -FS/2 ≤ NCO frequency < 0: value = (fNCO + FS) * 2^48 / FS
1744
1745        Raises:
1746            None
1747
1748        Returns:
1749            None
1750        """
1751        self.device.SET_DDC3_NCO_FREQ3(value)
1752
1753    def ddc0_nco_phase0(self, value: int) -> None:
1754        """Configures the starting phase for NCO Frequency 0 of DDC0
1755
1756        Arguments:
1757            value:
1758                Value to write to the NCO phase word, such that:
1759                value = 90° / Phase
1760        Raises:
1761            None
1762
1763        Returns:
1764            None
1765        """
1766        self.device.SET_DDC0_NCO_PHASE0(value)
1767
1768    def ddc0_nco_phase1(self, value: int) -> None:
1769        """Configures the starting phase for NCO Frequency 1 of DDC0
1770
1771        Arguments:
1772            value:
1773                Value to write to the NCO phase word, such that:
1774                value = 90° / Phase
1775        Raises:
1776            None
1777
1778        Returns:
1779            None
1780        """
1781        self.device.SET_DDC0_NCO_PHASE1(value)
1782
1783    def ddc0_nco_phase2(self, value: int) -> None:
1784        """Configures the starting phase for NCO Frequency 2 of DDC0
1785
1786        Arguments:
1787            value:
1788                Value to write to the NCO phase word, such that:
1789                value = 90° / Phase
1790        Raises:
1791            None
1792
1793        Returns:
1794            None
1795        """
1796        self.device.SET_DDC0_NCO_PHASE2(value)
1797
1798    def ddc0_nco_phase3(self, value: int) -> None:
1799        """Configures the starting phase for NCO Frequency 3 of DDC0
1800
1801        Arguments:
1802            value:
1803                Value to write to the NCO phase word, such that:
1804                value = 90° / Phase
1805        Raises:
1806            None
1807
1808        Returns:
1809            None
1810        """
1811        self.device.SET_DDC0_NCO_PHASE3(value)
1812
1813    def ddc1_nco_phase0(self, value: int) -> None:
1814        """Configures the starting phase for NCO Frequency 0 of DDC1
1815
1816        Arguments:
1817            value:
1818                Value to write to the NCO phase word, such that:
1819                value = 90° / Phase
1820        Raises:
1821            None
1822
1823        Returns:
1824            None
1825        """
1826        self.device.SET_DDC1_NCO_PHASE0(value)
1827
1828    def ddc1_nco_phase1(self, value: int) -> None:
1829        """Configures the starting phase for NCO Frequency 1 of DDC1
1830
1831        Arguments:
1832            value:
1833                Value to write to the NCO phase word, such that:
1834                value = 90° / Phase
1835        Raises:
1836            None
1837
1838        Returns:
1839            None
1840        """
1841        self.device.SET_DDC1_NCO_PHASE1(value)
1842
1843    def ddc1_nco_phase2(self, value: int) -> None:
1844        """Configures the starting phase for NCO Frequency 2 of DDC1
1845
1846        Arguments:
1847            value:
1848                Value to write to the NCO phase word, such that:
1849                value = 90° / Phase
1850        Raises:
1851            None
1852
1853        Returns:
1854            None
1855        """
1856        self.device.SET_DDC1_NCO_PHASE2(value)
1857
1858    def ddc1_nco_phase3(self, value: int) -> None:
1859        """Configures the starting phase for NCO Frequency 3 of DDC1
1860
1861        Arguments:
1862            value:
1863                Value to write to the NCO phase word, such that:
1864                value = 90° / Phase
1865        Raises:
1866            None
1867
1868        Returns:
1869            None
1870        """
1871        self.device.SET_DDC1_NCO_PHASE3(value)
1872
1873    def ddc2_nco_phase0(self, value: int) -> None:
1874        """Configures the starting phase for NCO Frequency 0 of DDC2
1875
1876        Arguments:
1877            value:
1878                Value to write to the NCO phase word, such that:
1879                value = 90° / Phase
1880        Raises:
1881            None
1882
1883        Returns:
1884            None
1885        """
1886        self.device.SET_DDC2_NCO_PHASE0(value)
1887
1888    def ddc2_nco_phase1(self, value: int) -> None:
1889        """Configures the starting phase for NCO Frequency 1 of DDC2
1890
1891        Arguments:
1892            value:
1893                Value to write to the NCO phase word, such that:
1894                value = 90° / Phase
1895        Raises:
1896            None
1897
1898        Returns:
1899            None
1900        """
1901        self.device.SET_DDC2_NCO_PHASE1(value)
1902
1903    def ddc2_nco_phase2(self, value: int) -> None:
1904        """Configures the starting phase for NCO Frequency 2 of DDC2
1905
1906        Arguments:
1907            value:
1908                Value to write to the NCO phase word, such that:
1909                value = 90° / Phase
1910        Raises:
1911            None
1912
1913        Returns:
1914            None
1915        """
1916        self.device.SET_DDC2_NCO_PHASE2(value)
1917
1918    def ddc2_nco_phase3(self, value: int) -> None:
1919        """Configures the starting phase for NCO Frequency 3 of DDC2
1920
1921        Arguments:
1922            value:
1923                Value to write to the NCO phase word, such that:
1924                value = 90° / Phase
1925        Raises:
1926            None
1927
1928        Returns:
1929            None
1930        """
1931        self.device.SET_DDC2_NCO_PHASE3(value)
1932
1933    def ddc3_nco_phase0(self, value: int) -> None:
1934        """Configures the starting phase for NCO Frequency 0 of DDC3
1935
1936        Arguments:
1937            value:
1938                Value to write to the NCO phase word, such that:
1939                value = 90° / Phase
1940        Raises:
1941            None
1942
1943        Returns:
1944            None
1945        """
1946        self.device.SET_DDC3_NCO_PHASE0(value)
1947
1948    def ddc3_nco_phase1(self, value: int) -> None:
1949        """Configures the starting phase for NCO Frequency 1 of DDC3
1950
1951        Arguments:
1952            value:
1953                Value to write to the NCO phase word, such that:
1954                value = 90° / Phase
1955        Raises:
1956            None
1957
1958        Returns:
1959            None
1960        """
1961        self.device.SET_DDC3_NCO_PHASE1(value)
1962
1963    def ddc3_nco_phase2(self, value: int) -> None:
1964        """Configures the starting phase for NCO Frequency 2 of DDC3
1965
1966        Arguments:
1967            value:
1968                Value to write to the NCO phase word, such that:
1969                value = 90° / Phase
1970        Raises:
1971            None
1972
1973        Returns:
1974            None
1975        """
1976        self.device.SET_DDC3_NCO_PHASE2(value)
1977
1978    def ddc3_nco_phase3(self, value: int) -> None:
1979        """Configures the starting phase for NCO Frequency 3 of DDC3
1980
1981        Arguments:
1982            value:
1983                Value to write to the NCO phase word, such that:
1984                value = 90° / Phase
1985        Raises:
1986            None
1987
1988        Returns:
1989            None
1990        """
1991        self.device.SET_DDC3_NCO_PHASE3(value)
1992
1993    def enable_dclk_divider(self, value: int) -> None:
1994        """Enables the Data Clock divider for higher decimation rates.
1995
1996        Arguments:
1997            value: input value
1998                - 0: DCLK divider is disabled. DCLK is equal to the Sample CLK
1999                - 1: DCLK divider is enabled. DCLK is divided down from Sample CLK
2000
2001        Raises:
2002            None
2003
2004        Returns:
2005            None
2006        """
2007        self.device.SET_DIG_CLK_DDC(value)
2008
2009    def dclk_powerdown(self, value: int) -> None:
2010        """Powers down the LVDS output clock.
2011
2012        Arguments:
2013            value: input value
2014                - 0: Normal operation
2015                - 1: Dclk powered down
2016
2017        Raises:
2018            None
2019
2020        Returns:
2021            None
2022        """
2023        self.device.SET_DCLK_PDN(value)
2024
2025    ######################################################################################################################################
2026    # ███╗   ███╗ █████╗  ██████╗██████╗  ██████╗ ███████╗
2027    # ████╗ ████║██╔══██╗██╔════╝██╔══██╗██╔═══██╗██╔════╝
2028    # ██╔████╔██║███████║██║     ██████╔╝██║   ██║███████╗
2029    # ██║╚██╔╝██║██╔══██║██║     ██╔══██╗██║   ██║╚════██║
2030    # ██║ ╚═╝ ██║██║  ██║╚██████╗██║  ██║╚██████╔╝███████║
2031    # ╚═╝     ╚═╝╚═╝  ╚═╝ ╚═════╝╚═╝  ╚═╝ ╚═════╝ ╚══════╝
2032    ######################################################################################################################################
2033
2034    def pulse_overrange_clear(self) -> None:
2035        """Macro Function. Clears the Digital Overrange by pulsing a value of 2 on the OVR_CLR register field
2036
2037        Arguments:
2038            None
2039
2040        Raises:
2041            None
2042
2043        Returns:
2044            None
2045        """
2046        self.device.SET_DIG_OVR_CLEAR(0x0)
2047        sleep(0.1)
2048        self.device.SET_DIG_OVR_CLEAR(0x2)
2049        sleep(0.1)
2050        self.device.SET_DIG_OVR_CLEAR(0x0)
2051
2052    def invert_lvds_lanes(self, lanes: List[int]) -> None:
2053        """Macro Function. Inverts the polarity of individual LVDS output lanes.
2054
2055        Arguments:
2056            lanes:
2057                List of 16 lanes with the corresponding values:
2058                - 0: Polarity as shown in pin diagram.
2059                - 1: Polarity inverted
2060
2061        Raises:
2062            None
2063
2064        Returns:
2065            None
2066        """
2067        lanes = int("".join(map(str, lanes)), 2)
2068        self.device.SET_LVDS_DATA_INV(lanes)
2069
2070    def powerdown_lvds_lanes(self, lanes: List[int]) -> None:
2071        """Macro Function. Powers down the individual LVDS output lanes and puts LVDS pins into high impedance state.
2072
2073        Arguments:
2074            lanes:
2075                List of bits which enable or disable the LVDS lanes as follows
2076                - 0: Normal operation
2077                - 1: Powered down
2078
2079        Raises:
2080            None
2081
2082        Returns:
2083            None
2084        """
2085        lanes = int("".join(map(str, lanes)), 2)
2086        self.device.SET_LVDS_DATA_PDN(lanes)
2087
2088    def dout_mux(self, lane: int, data: int) -> None:
2089        """Macro Function. Configures the data bus assignments for each individual output lane
2090
2091        Arguments:
2092            lane:
2093                The DOUT output pin to be mapped to
2094            data:
2095                The internal digital data bus lane that is being mapped
2096
2097        Raises:
2098            None
2099
2100        Returns:
2101            None
2102        """
2103        if lane == 0:
2104            self.device.SET_LANE0_MUX_SEL(data)
2105        elif lane == 1:
2106            self.device.SET_LANE1_MUX_SEL(data)
2107        elif lane == 2:
2108            self.device.SET_LANE2_MUX_SEL(data)
2109        elif lane == 3:
2110            self.device.SET_LANE3_MUX_SEL(data)
2111        elif lane == 4:
2112            self.device.SET_LANE4_MUX_SEL(data)
2113        elif lane == 5:
2114            self.device.SET_LANE5_MUX_SEL(data)
2115        elif lane == 6:
2116            self.device.SET_LANE6_MUX_SEL(data)
2117        elif lane == 7:
2118            self.device.SET_LANE7_MUX_SEL(data)
2119        elif lane == 8:
2120            self.device.SET_LANE8_MUX_SEL(data)
2121        elif lane == 9:
2122            self.device.SET_LANE9_MUX_SEL(data)
2123        elif lane == 10:
2124            self.device.SET_LANE10_MUX_SEL(data)
2125        elif lane == 11:
2126            self.device.SET_LANE11_MUX_SEL(data)
2127        elif lane == 12:
2128            self.device.SET_LANE12_MUX_SEL(data)
2129        elif lane == 13:
2130            self.device.SET_LANE13_MUX_SEL(data)
2131        elif lane == 14:
2132            self.device.SET_LANE14_MUX_SEL(data)
2133        elif lane == 15:
2134            self.device.SET_LANE15_MUX_SEL(data)
2135
2136    def lvds_mirror_all(self, lane: int) -> None:
2137        """Macro Function. Mirrors all LVDS lanes to data of chosen lane
2138
2139        Arguments:
2140            lane:
2141                The desired lane data to mirror to all output lanes
2142
2143        Raises:
2144            None
2145
2146        Returns:
2147            None
2148        """
2149        for i in range(0, 16):
2150            self.dout_mux(i, lane)
2151
2152    def cha_digital_gain(self, value: int) -> None:
2153        """Macro Function. Controls digital gain for channel A. Maximum gain is 6dB.
2154
2155        Arguments:
2156            value:
2157                Desired gain value in dB
2158
2159        Raises:
2160            None
2161
2162        Returns:
2163            None
2164        """
2165        gain = 20 * log(1 + (value / 128), 10)
2166        self.device.SET_CH0_PROG_GAIN(gain)
2167
2168    def chb_digital_gain(self, value: int) -> None:
2169        """Macro Function. Controls digital gain for channel B. Maximum gain is 6dB.
2170
2171        Arguments:
2172            value:
2173                Desired gain value in dB
2174
2175        Raises:
2176            None
2177
2178        Returns:
2179            None
2180        """
2181        gain = 20 * log(1 + (value / 128), 10)
2182        self.device.SET_CH1_PROG_GAIN(gain)
2183
2184    def sysref_pulse(self) -> None:
2185        """Macro Function. Pulses the sysref signal
2186
2187        Arguments:
2188            None
2189
2190        Raises:
2191            None
2192
2193        Returns:
2194            None
2195        """
2196        self.sysref_mode(0)
2197        sleep(0.1)
2198        self.sysref_mode(3)
2199        sleep(0.1)
2200        self.sysref_mode(0)
2201
2202    def ddc_input_source(self, ddc: int, input: int) -> None:
2203        """Macro Function. Sets the input data source to each of the decimation filters.
2204
2205        Arguments:
2206            ddc:
2207                The DDC for which the input data source is being configured
2208            input:
2209                Input to the DDC
2210                - 0: Channel A
2211                - 1: Channel B
2212                - 2: 2x Average ((ChA + ChB)/2)
2213                - 3: 2x Average ((ChA - ChB)/2)
2214
2215        Raises:
2216            None
2217
2218        Returns:
2219            None
2220        """
2221        if ddc == 0:
2222            self.device.SET_DDC0_MUX(input)
2223        elif ddc == 1:
2224            if input == 0:
2225                input = 1
2226            elif input == 1:
2227                input = 0
2228            self.device.SET_DDC1_MUX(input)
2229        elif ddc == 2:
2230            self.device.SET_DDC2_MUX(input)
2231        elif ddc == 3:
2232            if input == 0:
2233                input = 1
2234            elif input == 1:
2235                input = 0
2236            self.device.SET_DDC3_MUX(input)
2237
2238    def nco_update(self, nco: int) -> None:
2239        """Macro Function. Updates the frequency of the selected NCO by pulsing a value of 1 on the corresponding NCO_UPDATE field
2240
2241        Arguments:
2242            nco:
2243                NCO that is being configured
2244
2245        Raises:
2246            None
2247
2248        Returns:
2249            None
2250        """
2251        if nco == 0:
2252            self.device.SET_NCO0_UPDATE(0)
2253            sleep(0.1)
2254            self.device.SET_NCO0_UPDATE(1)
2255            sleep(0.1)
2256            self.device.SET_NCO0_UPDATE(1)
2257        elif nco == 1:
2258            self.device.SET_NCO1_UPDATE(0)
2259            sleep(0.1)
2260            self.device.SET_NCO1_UPDATE(1)
2261            sleep(0.1)
2262            self.device.SET_NCO1_UPDATE(1)
2263        elif nco == 2:
2264            self.device.SET_NCO2_UPDATE(0)
2265            sleep(0.1)
2266            self.device.SET_NCO2_UPDATE(1)
2267            sleep(0.1)
2268            self.device.SET_NCO2_UPDATE(1)
2269        elif nco == 3:
2270            self.device.SET_NCO3_UPDATE(0)
2271            sleep(0.1)
2272            self.device.SET_NCO3_UPDATE(1)
2273            sleep(0.1)
2274            self.device.SET_NCO3_UPDATE(1)
2275
2276    def nco_update_common(self) -> None:
2277        """Macro Function. Updates the four NCO frequencies of all NCOs by pulsing a vlaue of 1 on the NCO_COMMON_UPDATE field
2278
2279        Arguments:
2280            None
2281
2282        Raises:
2283            None
2284
2285        Returns:
2286            None
2287        """
2288        self.device.SET_NCO_COMMON_UPDATE(0)
2289        sleep(0.1)
2290        self.device.SET_NCO_COMMON_UPDATE(1)
2291        sleep(0.1)
2292        self.device.SET_NCO_COMMON_UPDATE(0)
2293
2294    def ddc_nco_select(self, ddc: int, nco: int) -> None:
2295        """Macro Function. These bits select which of the 4 frequencies are active in the respective DDCs/NCOs.
2296
2297        Arguments:
2298            ddc:
2299                DDC of which to configure the nco frequency
2300            nco:
2301                NCO frequency to set as the active frequency
2302
2303        Raises:
2304            None
2305
2306        Returns:
2307            None
2308        """
2309        if ddc == 0:
2310            self.device.SET_DDC0_NCO_SEL(nco)
2311        elif ddc == 1:
2312            self.device.SET_DDC1_NCO_SEL(nco)
2313        elif ddc == 2:
2314            self.device.SET_DDC2_NCO_SEL(nco)
2315        elif ddc == 3:
2316            self.device.SET_DDC3_NCO_SEL(nco)
2317
2318    def ddc_decimation_factor(self, ddc: int, factor: int) -> None:
2319        """Macro Function. Sets the decimation factor for each DDC
2320
2321        Arguments:
2322            ddc:
2323                The DDC for which the decimation factor is being configured
2324            factor:
2325                Desired decimation factor
2326
2327        Raises:
2328            None
2329
2330        Returns:
2331            None
2332        """
2333        if factor == 0:
2334            n = factor
2335        else:
2336            n = int(log(factor, 2))
2337
2338        self.device.SET_SELECT_INDEPENDENT_DECIMATION(
2339            1
2340        )  # Configure for different decimation factors for each DDC
2341
2342        if ddc == 0:
2343            self.device.SET_DDC0_DECIMATION_MODE(n)
2344        elif ddc == 1:
2345            self.device.SET_DDC1_DECIMATION_MODE(n)
2346        elif ddc == 2:
2347            self.device.SET_DDC2_DECIMATION_MODE(n)
2348        elif ddc == 3:
2349            self.device.SET_DDC3_DECIMATION_MODE(n)
2350
2351    def decimation_factor_common(self, factor: int) -> None:
2352        """Macro Function. Enables decimation for all DDCs and sets the common decimation factor for all DDCs
2353
2354        Arguments:
2355            factor:
2356                Desired decimation factor
2357
2358        Raises:
2359            None
2360
2361        Returns:
2362            None
2363        """
2364        if factor == 0:
2365            n = factor
2366        else:
2367            n = int(log(factor, 2))
2368
2369        self.device.SET_SELECT_INDEPENDENT_DECIMATION(
2370            0
2371        )  # Configure for common decimation factors for all DDCs
2372        self.device.SET_COMMON_DECIMATION_MODE(n)
2373
2374    def ddc_nco_frequency(self, ddc: int, nco: int, freq: int) -> None:
2375        """Macro Function. Configures the 48-bit frequency words for the four DDCs/NCOs.
2376
2377        Arguments:
2378            ddc:
2379                DDC of which the frequency is being configured
2380            nco:
2381                NCO frequency which is being configured (0-3)
2382            freq:
2383                Desired frequency
2384
2385        Raises:
2386            None
2387
2388        Returns:
2389            None
2390        """
2391        if freq > 0:
2392            nco_word = int(
2393                freq * (2**48) / self.fs
2394            )  # Formula for calulating this value is in the datasheet
2395        else:
2396            nco_word = int(
2397                ((self.device.fs + freq) * (2**48) / self.fs) - 1
2398            )  # Formula for calulating this value is in the datasheet
2399
2400        if ddc == 0:
2401            if nco == 0:
2402                self.device.SET_DDC0_NCO_FREQ0(nco_word)
2403            elif nco == 1:
2404                self.device.SET_DDC0_NCO_FREQ1(nco_word)
2405            elif nco == 2:
2406                self.device.SET_DDC0_NCO_FREQ2(nco_word)
2407            elif nco == 3:
2408                self.device.SET_DDC0_NCO_FREQ3(nco_word)
2409        elif ddc == 1:
2410            if nco == 0:
2411                self.device.SET_DDC1_NCO_FREQ0(nco_word)
2412            elif nco == 1:
2413                self.device.SET_DDC1_NCO_FREQ1(nco_word)
2414            elif nco == 2:
2415                self.device.SET_DDC1_NCO_FREQ2(nco_word)
2416            elif nco == 3:
2417                self.device.SET_DDC1_NCO_FREQ3(nco_word)
2418        elif ddc == 2:
2419            if nco == 0:
2420                self.device.SET_DDC2_NCO_FREQ0(nco_word)
2421            elif nco == 1:
2422                self.device.SET_DDC2_NCO_FREQ1(nco_word)
2423            elif nco == 2:
2424                self.device.SET_DDC2_NCO_FREQ2(nco_word)
2425            elif nco == 3:
2426                self.device.SET_DDC2_NCO_FREQ3(nco_word)
2427        elif ddc == 3:
2428            if nco == 0:
2429                self.device.SET_DDC3_NCO_FREQ0(nco_word)
2430            elif nco == 1:
2431                self.device.SET_DDC3_NCO_FREQ1(nco_word)
2432            elif nco == 2:
2433                self.device.SET_DDC3_NCO_FREQ2(nco_word)
2434            elif nco == 3:
2435                self.device.SET_DDC3_NCO_FREQ3(nco_word)
2436
2437    def ddc_nco_phase(self, ddc: int, nco: int, phase: int) -> None:
2438        """Macro Function. Configure the starting phase of the frequency for the DDCs/NCOs. The phase value is: 90° / <16-bit register>
2439
2440        Arguments:
2441            ddc:
2442                DDC of which the phase is being configured
2443            nco:
2444                NCO of which the phase is being configured
2445            phase:
2446                desired phase in degrees
2447
2448        Raises:
2449            None
2450
2451        Returns:
2452            None
2453        """
2454        if phase == 0:
2455            phaseval = 0
2456        else:
2457            phaseval = int(90 / phase)
2458
2459        if ddc == 0:
2460            if nco == 0:
2461                self.device.SET_DDC0_NCO_PHASE0(phaseval)
2462            elif nco == 1:
2463                self.device.SET_DDC0_NCO_PHASE1(phaseval)
2464            elif nco == 2:
2465                self.device.SET_DDC0_NCO_PHASE2(phaseval)
2466            elif nco == 3:
2467                self.device.SET_DDC0_NCO_PHASE3(phaseval)
2468        elif ddc == 1:
2469            if nco == 0:
2470                self.device.SET_DDC0_NCO_PHASE0(phaseval)
2471            elif nco == 1:
2472                self.device.SET_DDC1_NCO_PHASE1(phaseval)
2473            elif nco == 2:
2474                self.device.SET_DDC2_NCO_PHASE2(phaseval)
2475            elif nco == 3:
2476                self.device.SET_DDC3_NCO_PHASE3(phaseval)
2477        elif ddc == 2:
2478            if nco == 0:
2479                self.device.SET_DDC0_NCO_PHASE0(phaseval)
2480            elif nco == 1:
2481                self.device.SET_DDC1_NCO_PHASE1(phaseval)
2482            elif nco == 2:
2483                self.device.SET_DDC2_NCO_PHASE2(phaseval)
2484            elif nco == 3:
2485                self.device.SET_DDC3_NCO_PHASE3(phaseval)
2486        elif ddc == 3:
2487            if nco == 0:
2488                self.device.SET_DDC0_NCO_PHASE0(phaseval)
2489            elif nco == 1:
2490                self.device.SET_DDC1_NCO_PHASE1(phaseval)
2491            elif nco == 2:
2492                self.device.SET_DDC2_NCO_PHASE2(phaseval)
2493            elif nco == 3:
2494                self.device.SET_DDC3_NCO_PHASE3(phaseval)
2495
2496    def read_all_regs(self) -> None:
2497        """Macro Function. Reads all registers for configuration debug purposes.
2498
2499        Arguments:
2500            None
2501
2502        Raises:
2503            None
2504
2505        Returns:
2506            None
2507        """
2508        self.device.debugReadback()