From 0b8f70468ccf7ceb18a314ab784047c3a78a8c48 Mon Sep 17 00:00:00 2001
From: Karan Saxena <karan@ti.com>
Date: Mon, 29 Jun 2020 20:42:52 +0530
Subject: [PATCH] dts: Add MCAN0 and MCAN2 support in linux

- Add PINMUX for CAN TX and CAN RX
- Enable transceivers for MCAN0 and MCAN1

Signed-off-by: Karan Saxena <karan@ti.com>
---
 .../boot/dts/ti/k3-j721e-common-proc-board.dts     | 82 ++++++++++++++++++++++
 arch/arm64/boot/dts/ti/k3-j721e-main.dtsi          | 29 ++++++++
 2 files changed, 111 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 0bc4805..79e6926 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -208,6 +208,7 @@
 };
 
 &wkup_pmx0 {
+
 	mcu_cpsw_pins_default: mcu_cpsw_pins_default {
 		pinctrl-single,pins = <
 			J721E_WKUP_IOPAD(0x0058, PIN_OUTPUT, 0) /* MCU_RGMII1_TX_CTL */
@@ -315,7 +316,46 @@
 	status = "disabled";
 };
 
+&m_can0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcan0_gpio_pins_default>;
+	can-transceiver {
+		max-bitrate = <5000000>;
+	};
+};
+
+&m_can2 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&mcan2_gpio_pins_default &mygpio1_pins_default>;
+	can-transceiver {
+		max-bitrate = <5000000>;
+	};
+};
+
 &main_pmx0 {
+
+	mygpio1_pins_default: mygpio1_pins_default {
+		pinctrl-single,pins = <
+			J721E_IOPAD(0x200, PIN_INPUT, 7) /* (AC4) UART1_CTSn.GPIO0_127 */
+		>;
+	};
+
+	mcan0_gpio_pins_default: mcan0_gpio_pins_default {
+		pinctrl-single,pins = <
+			J721E_IOPAD(0x0208, PIN_INPUT, 0) /* (W5) MCAN0_RX:GPIO1_1 */
+			J721E_IOPAD(0x020c, PIN_OUTPUT, 0) /* (W6) MCAN0_TX:GPIO1_2 */
+		>;
+	};
+
+	mcan2_gpio_pins_default: mcan2_gpio_pins_default {
+		pinctrl-single,pins = <
+			J721E_IOPAD(0x01f0, PIN_INPUT, 3) /* (AC2) MCAN2_RX.GPIO0_123 */
+			J721E_IOPAD(0x01f4, PIN_OUTPUT, 3) /* (AB1) MCAN2_TX.GPIO0_124 */
+		>;
+	};
+
 	main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {
 		pinctrl-single,pins = <
 			J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */
@@ -483,6 +523,22 @@
 		gpio-controller;
 		#gpio-cells = <2>;
 
+		p06 {
+			/* P06 - MCAN0_EN  */
+			gpio-hog;
+			gpios = <6 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "MCAN0_EN";
+		};
+
+		p07 {
+			/* P07 - MCAN0_STB#  */
+			gpio-hog;
+			gpios = <7 GPIO_ACTIVE_HIGH>;
+			output-high;
+			line-name = "MCAN0_STB#";
+		};
+
 		p09 {
 			/* P11 - MCASP/TRACE_MUX_S0 */
 			gpio-hog;
@@ -498,9 +554,35 @@
 			output-high;
 			line-name = "MCASP/TRACE_MUX_S1";
 		};
+
+                p13 {
+			/* P13 - MLB_MUX_SEL  */
+			gpio-hog;
+			gpios = <11 GPIO_ACTIVE_HIGH>;
+			output-low;
+			line-name = "MLB_MUX_SEL";
+                };
+
+                p14 {
+			/* P14 - MCAN_MUX_SEL  */
+			gpio-hog;
+			gpios = <12 GPIO_ACTIVE_HIGH>;
+			output-low;
+			line-name = "MCAN_MUX_SEL";
+                };
+
 	};
 };
 
+&main_gpio0 {
+		p127 {
+			gpio-hog;
+			gpios = <127 GPIO_ACTIVE_HIGH>;
+			output-low;
+			line-name = "MCAN2_STB";
+		};
+};
+
 &main_i2c1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_i2c1_pins_default>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index 70745bd..44b3dfd 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -1266,6 +1266,7 @@
 		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 105 0>;
 		clock-names = "gpio";
+
 	};
 
 	main_gpio1: gpio@601000 {
@@ -2504,4 +2505,32 @@
 		assigned-clocks = <&k3_clks 253 1>;
 		assigned-clock-parents = <&k3_clks 253 5>;
 	};
+
+	m_can0: mcan@2701000 {
+		compatible = "bosch,m_can";
+		reg = <0x0 0x2701000 0x0 0x200>,
+		      <0x0 0x2708000 0x0 0x8000>;
+		reg-names = "m_can", "message_ram";
+		power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 156 1>, <&k3_clks 156 0>;
+		clock-names = "cclk", "hclk";
+		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "int0", "int1";
+		bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
+	};
+
+	m_can2: mcan@2721000 {
+		compatible = "bosch,m_can";
+		reg = <0x0 0x2721000 0x0 0x200>,
+		      <0x0 0x2728000 0x0 0x8000>;
+		reg-names = "m_can", "message_ram";
+		power-domains = <&k3_pds 160 TI_SCI_PD_EXCLUSIVE>;
+		clocks = <&k3_clks 160 1>, <&k3_clks 160 0>;
+		clock-names = "cclk", "hclk";
+		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+			     <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "int0", "int1";
+		bosch,mram-cfg = <0x0 0 0 32 0 0 1 1>;
+	};
 };
-- 
2.7.4

